Commit 121d69e6 by Richard Sandiford Committed by Richard Sandiford

mips.c (mips_expand_prologue): Use a single insn to allocate 32768 bytes of stack.

	* config/mips/mips.c (mips_expand_prologue): Use a single insn to
	allocate 32768 bytes of stack.  Use addition rather than subtraction
	when a single insn is enough.
	* config/mips/mips.md: Remove insns and splitters for subtracting
	constants.
	(subsi3): Only accept register operands.
	(subsi3_internal): Likewise.  Use for TARGET_MIPS16 as well.
	(subdi3_internal_3, subsi3_internal_2): Likewise.
	(casesi): Use expand_binop to subtract the lower bound.

From-SVN: r69357
parent 3485245e
2003-07-14 Richard Sandiford <rsandifo@redhat.com> 2003-07-14 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.c (mips_expand_prologue): Use a single insn to
allocate 32768 bytes of stack. Use addition rather than subtraction
when a single insn is enough.
* config/mips/mips.md: Remove insns and splitters for subtracting
constants.
(subsi3): Only accept register operands.
(subsi3_internal): Likewise. Use for TARGET_MIPS16 as well.
(subdi3_internal_3, subsi3_internal_2): Likewise.
(casesi): Use expand_binop to subtract the lower bound.
2003-07-14 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.c (mips_in_small_data_p): Don't handle * config/mips/mips.c (mips_in_small_data_p): Don't handle
TARGET_MIPS16 specially. TARGET_MIPS16 specially.
......
...@@ -7424,27 +7424,24 @@ mips_expand_prologue () ...@@ -7424,27 +7424,24 @@ mips_expand_prologue ()
{ {
rtx tsize_rtx = GEN_INT (tsize); rtx tsize_rtx = GEN_INT (tsize);
/* If we are doing svr4-abi, sp move is done by /* In mips16 mode with a large frame, we save the registers before
function_prologue. In mips16 mode with a large frame, we adjusting the stack. */
save the registers before adjusting the stack. */ if (!TARGET_MIPS16 || tsize <= 32768)
if (!TARGET_MIPS16 || tsize <= 32767) {
if (tsize > 32768)
{ {
rtx adjustment_rtx; rtx adjustment_rtx;
if (tsize > 32767)
{
adjustment_rtx = gen_rtx (REG, Pmode, MIPS_TEMP1_REGNUM); adjustment_rtx = gen_rtx (REG, Pmode, MIPS_TEMP1_REGNUM);
emit_move_insn (adjustment_rtx, tsize_rtx); emit_move_insn (adjustment_rtx, tsize_rtx);
} emit_insn (gen_sub3_insn (stack_pointer_rtx,
else stack_pointer_rtx,
adjustment_rtx = tsize_rtx;
if (Pmode == DImode)
emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx,
adjustment_rtx)); adjustment_rtx));
}
else else
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, emit_insn (gen_add3_insn (stack_pointer_rtx,
adjustment_rtx)); stack_pointer_rtx,
GEN_INT (-tsize)));
mips_set_frame_expr mips_set_frame_expr
(gen_rtx_SET (VOIDmode, stack_pointer_rtx, (gen_rtx_SET (VOIDmode, stack_pointer_rtx,
...@@ -7460,7 +7457,7 @@ mips_expand_prologue () ...@@ -7460,7 +7457,7 @@ mips_expand_prologue ()
emit_insn (gen_cprestore emit_insn (gen_cprestore
(GEN_INT (current_function_outgoing_args_size))); (GEN_INT (current_function_outgoing_args_size)));
if (TARGET_MIPS16 && tsize > 32767) if (TARGET_MIPS16 && tsize > 32768)
{ {
rtx reg_rtx; rtx reg_rtx;
...@@ -7470,12 +7467,7 @@ mips_expand_prologue () ...@@ -7470,12 +7467,7 @@ mips_expand_prologue ()
reg_rtx = gen_rtx (REG, Pmode, 3); reg_rtx = gen_rtx (REG, Pmode, 3);
emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx); emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
emit_move_insn (reg_rtx, tsize_rtx); emit_move_insn (reg_rtx, tsize_rtx);
if (Pmode == DImode) emit_insn (gen_sub3_insn (hard_frame_pointer_rtx,
emit_insn (gen_subdi3 (hard_frame_pointer_rtx,
hard_frame_pointer_rtx,
reg_rtx));
else
emit_insn (gen_subsi3 (hard_frame_pointer_rtx,
hard_frame_pointer_rtx, hard_frame_pointer_rtx,
reg_rtx)); reg_rtx));
emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx); emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
......
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