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Commit 107eea2c by Jürgen Urban Committed by Richard Sandiford
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gcc/ 

2013-06-03  Jürgen Urban  <JuergenUrban@gmx.de>

	* config.gcc (mipsr5900-*-elf*, mipsr5900el-*-elf*, mips64r5900-*-elf*)
	(mips64r5900el-*-elf*): New configurations.
	* config/mips/mips-cpus.def (r5900): New processor.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.c (mips_rtx_cost_data): Add an R5900 entry.
	(mips_issue_rate): Handle PROCESSOR_R5900.
	(mips_reorg_process_insns): Force reorder mode for the R5900.
	* config/mips/mips.h (TARGET_MIPS5900): Define.
	(ISA_HAS_CONDMOVE, ISA_HAS_PREFETCH, ISA_HAS_HILO_INTERLOCKS): Include
	TARGET_MIPS5900.
	(ISA_HAS_LOAD_DELAY, ISA_HAS_XFER_DELAY, ISA_HAS_FCMP_DELAY): Exclude
	TARGET_MIPS5900.
	* config/mips/mips.md (processor): Add r5900.
	(MOVECC): Disallow CCmode conditions for TARGET_MIPS5900.

libgcc/
2013-06-03  Jürgen Urban  <JuergenUrban@gmx.de>

	* config.host (mipsr5900-*-elf*, mipsr5900el-*-elf*, mips64r5900-*-elf*)
	(mips64r5900el-*-elf*): New configurations.

From-SVN: r199666
parent ce6a6ae1
Showing with 91 additions and 6 deletions
gcc/ChangeLog
2013-06-04 Jürgen Urban <JuergenUrban@gmx.de>
* config.gcc (mipsr5900-*-elf*, mipsr5900el-*-elf*, mips64r5900-*-elf*)
(mips64r5900el-*-elf*): New configurations.
* config/mips/mips-cpus.def (r5900): New processor.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.c (mips_rtx_cost_data): Add an R5900 entry.
(mips_issue_rate): Handle PROCESSOR_R5900.
(mips_reorg_process_insns): Force reorder mode for the R5900.
* config/mips/mips.h (TARGET_MIPS5900): Define.
(ISA_HAS_CONDMOVE, ISA_HAS_PREFETCH, ISA_HAS_HILO_INTERLOCKS): Include
TARGET_MIPS5900.
(ISA_HAS_LOAD_DELAY, ISA_HAS_XFER_DELAY, ISA_HAS_FCMP_DELAY): Exclude
TARGET_MIPS5900.
* config/mips/mips.md (processor): Add r5900.
(MOVECC): Disallow CCmode conditions for TARGET_MIPS5900.
2013-06-04 Ian Bolton <ian.bolton@arm.com>
* config/aarch64/aarch64.md (*mov<mode>_aarch64): Call
......
gcc/config.gcc
......@@ -1935,10 +1935,15 @@ mipsisa64sb1-*-elf* | mipsisa64sb1el-*-elf*)
tmake_file="mips/t-elf mips/t-sb1"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=64 MIPS_CPU_STRING_DEFAULT=\\\"sb1\\\" MIPS_ABI_DEFAULT=ABI_O64"
;;
mips-*-elf* | mipsel-*-elf*)
mips-*-elf* | mipsel-*-elf* | mipsr5900-*-elf* | mipsr5900el-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file="mips/t-elf"
;;
mips64r5900-*-elf* | mips64r5900el-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file="mips/t-elf"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_N32"
;;
mips64-*-elf* | mips64el-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file="mips/t-elf"
......@@ -2977,6 +2982,19 @@ if test x$with_cpu = x ; then
;;
esac
;;
mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
with_arch=r5900
with_tune=r5900
if test x$with_llsc = x; then
# r5900 doesn't support ll, sc, lld and scd instructions:
with_llsc=no
fi
if test x$with_float = x; then
# r5900 doesn't support 64 bit float:
# 32 bit float doesn't comply with IEEE 754.
with_float=soft
fi
;;
mips*-*-vxworks)
with_arch=mips2
;;
......
gcc/config/mips/mips-cpus.def
......@@ -68,6 +68,7 @@ MIPS_CPU ("r4600", PROCESSOR_R4600, 3, 0)
MIPS_CPU ("orion", PROCESSOR_R4600, 3, 0)
MIPS_CPU ("r4650", PROCESSOR_R4650, 3, 0)
MIPS_CPU ("r4700", PROCESSOR_R4700, 3, 0)
MIPS_CPU ("r5900", PROCESSOR_R5900, 3, 0)
/* ST Loongson 2E/2F processors. */
MIPS_CPU ("loongson2e", PROCESSOR_LOONGSON_2E, 3, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("loongson2f", PROCESSOR_LOONGSON_2F, 3, PTF_AVOID_BRANCHLIKELY)
......
gcc/config/mips/mips.c
......@@ -1029,6 +1029,19 @@ static const struct mips_rtx_cost_data
1, /* branch_cost */
4 /* memory_latency */
},
{ /* R5900 */
COSTS_N_INSNS (4), /* fp_add */
COSTS_N_INSNS (4), /* fp_mult_sf */
COSTS_N_INSNS (256), /* fp_mult_df */
COSTS_N_INSNS (8), /* fp_div_sf */
COSTS_N_INSNS (256), /* fp_div_df */
COSTS_N_INSNS (4), /* int_mult_si */
COSTS_N_INSNS (256), /* int_mult_di */
COSTS_N_INSNS (37), /* int_div_si */
COSTS_N_INSNS (256), /* int_div_di */
1, /* branch_cost */
4 /* memory_latency */
},
{ /* R7000 */
/* The only costs that are changed here are
integer multiplication. */
......@@ -13005,6 +13018,7 @@ mips_issue_rate (void)
case PROCESSOR_R4130:
case PROCESSOR_R5400:
case PROCESSOR_R5500:
case PROCESSOR_R5900:
case PROCESSOR_R7000:
case PROCESSOR_R9000:
case PROCESSOR_OCTEON:
......@@ -16025,8 +16039,9 @@ mips_reorg_process_insns (void)
cfun->machine->all_noreorder_p = false;
/* Code compiled with -mfix-vr4120 or -mfix-24k can't be all noreorder
because we rely on the assembler to work around some errata. */
if (TARGET_FIX_VR4120 || TARGET_FIX_24K)
because we rely on the assembler to work around some errata.
The r5900 too has several bugs. */
if (TARGET_FIX_VR4120 || TARGET_FIX_24K || TARGET_MIPS5900)
cfun->machine->all_noreorder_p = false;
/* The same is true for -mfix-vr4130 if we might generate MFLO or
......
gcc/config/mips/mips.h
......@@ -222,6 +222,7 @@ struct mips_cpu_info {
#define TARGET_MIPS4130 (mips_arch == PROCESSOR_R4130)
#define TARGET_MIPS5400 (mips_arch == PROCESSOR_R5400)
#define TARGET_MIPS5500 (mips_arch == PROCESSOR_R5500)
#define TARGET_MIPS5900 (mips_arch == PROCESSOR_R5900)
#define TARGET_MIPS7000 (mips_arch == PROCESSOR_R7000)
#define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000)
#define TARGET_OCTEON (mips_arch == PROCESSOR_OCTEON \
......@@ -836,7 +837,9 @@ struct mips_cpu_info {
/* ISA has the integer conditional move instructions introduced in mips4 and
ST Loongson 2E/2F. */
#define ISA_HAS_CONDMOVE (ISA_HAS_FP_CONDMOVE || TARGET_LOONGSON_2EF)
#define ISA_HAS_CONDMOVE (ISA_HAS_FP_CONDMOVE \
|| TARGET_MIPS5900 \
|| TARGET_LOONGSON_2EF)
/* ISA has LDC1 and SDC1. */
#define ISA_HAS_LDC1_SDC1 (!ISA_MIPS1 && !TARGET_MIPS16)
......@@ -949,6 +952,7 @@ struct mips_cpu_info {
/* ISA has data prefetch instructions. This controls use of 'pref'. */
#define ISA_HAS_PREFETCH ((ISA_MIPS4 \
|| TARGET_LOONGSON_2EF \
|| TARGET_MIPS5900 \
|| ISA_MIPS32 \
|| ISA_MIPS32R2 \
|| ISA_MIPS64 \
......@@ -1010,15 +1014,18 @@ struct mips_cpu_info {
and "addiu $4,$4,1". */
#define ISA_HAS_LOAD_DELAY (ISA_MIPS1 \
&& !TARGET_MIPS3900 \
&& !TARGET_MIPS5900 \
&& !TARGET_MIPS16 \
&& !TARGET_MICROMIPS)
/* Likewise mtc1 and mfc1. */
#define ISA_HAS_XFER_DELAY (mips_isa <= 3 \
&& !TARGET_MIPS5900 \
&& !TARGET_LOONGSON_2EF)
/* Likewise floating-point comparisons. */
#define ISA_HAS_FCMP_DELAY (mips_isa <= 3 \
&& !TARGET_MIPS5900 \
&& !TARGET_LOONGSON_2EF)
/* True if mflo and mfhi can be immediately followed by instructions
......@@ -1038,6 +1045,7 @@ struct mips_cpu_info {
|| ISA_MIPS64 \
|| ISA_MIPS64R2 \
|| TARGET_MIPS5500 \
|| TARGET_MIPS5900 \
|| TARGET_LOONGSON_2EF)
/* ISA includes synci, jr.hb and jalr.hb. */
......
gcc/config/mips/mips.md
......@@ -55,6 +55,7 @@
r5000
r5400
r5500
r5900
r7000
r8000
r9000
......@@ -755,7 +756,9 @@
;; This mode iterator allows :MOVECC to be used anywhere that a
;; conditional-move-type condition is needed.
(define_mode_iterator MOVECC [SI (DI "TARGET_64BIT")
(CC "TARGET_HARD_FLOAT && !TARGET_LOONGSON_2EF")])
(CC "TARGET_HARD_FLOAT
&& !TARGET_LOONGSON_2EF
&& !TARGET_MIPS5900")])
;; 32-bit integer moves for which we provide move patterns.
(define_mode_iterator IMOVE32
......
libgcc/ChangeLog
2013-06-04 Jürgen Urban <JuergenUrban@gmx.de>
* config.host (mipsr5900-*-elf*, mipsr5900el-*-elf*, mips64r5900-*-elf*)
(mips64r5900el-*-elf*): New configurations.
2013-06-04 Alan Modra <amodra@gmail.com>
* config/rs6000/ibm-ldouble.c: Enable for little-endian.
......
libgcc/config.host
......@@ -739,7 +739,17 @@ mips*-*-netbsd*) # NetBSD/mips, either endian.
;;
mips*-*-linux*) # Linux MIPS, either endian.
extra_parts="$extra_parts crtfastmath.o"
tmake_file="${tmake_file} t-crtfm mips/t-mips16"
tmake_file="${tmake_file} t-crtfm"
# Check for MicroMIPS support.
case ${host} in
mips64r5900* | mipsr5900*)
# The MIPS16 support code uses floating point
# instructions that are not supported on r5900.
;;
*)
tmake_file="${tmake_file} mips/t-mips16"
;;
esac
md_unwind_header=mips/linux-unwind.h
if test "${ac_cv_sizeof_long_double}" = 16; then
tmake_file="${tmake_file} mips/t-tpbit"
......@@ -777,10 +787,18 @@ mips-*-elf* | mipsel-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-crtstuff mips/t-mips16"
extra_parts="$extra_parts crti.o crtn.o"
;;
mipsr5900-*-elf* | mipsr5900el-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-crtstuff"
extra_parts="$extra_parts crti.o crtn.o"
;;
mips64-*-elf* | mips64el-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-crtstuff mips/t-mips16"
extra_parts="$extra_parts crti.o crtn.o"
;;
mips64r5900-*-elf* | mips64r5900el-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-crtstuff"
extra_parts="$extra_parts crti.o crtn.o"
;;
mips64vr-*-elf* | mips64vrel-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-vr mips/t-crtstuff"
extra_parts="$extra_parts crti.o crtn.o"
......
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