Commit 0f1d3965 by Yuri Rumyantsev Committed by Jakub Jelinek

i386.c (ix86_lea_outperforms): Fix formatting.

	* config/i386/i386.c (ix86_lea_outperforms): Fix formatting.
	(ix86_avoid_lea_for_addr): Likewise.
	(exact_dependency_1): Likewise.
	(ix86_adjust_cost): Likewise.
	(swap_top_of_ready_list): Fix formatting and !reload_completed check
	removed.
	(do_reorder_for_imul): Fix typo, formatting and
	!reload_completed check removed.
	(ix86_sched_reorder): Fix typo and formatting.
	(fold_builtin_cpu): Move M_INTEL_SLM at the end of processor types
	list.

	* config/i386/cpuinfo.c (INTEL_SLM): New enum value.

From-SVN: r199611
parent 3bc30db4
2013-06-03 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com>
* config/i386/i386.c (ix86_lea_outperforms): Fix formatting.
(ix86_avoid_lea_for_addr): Likewise.
(exact_dependency_1): Likewise.
(ix86_adjust_cost): Likewise.
(swap_top_of_ready_list): Fix formatting and !reload_completed check
removed.
(do_reorder_for_imul): Fix typo, formatting and
!reload_completed check removed.
(ix86_sched_reorder): Fix typo and formatting.
(fold_builtin_cpu): Move M_INTEL_SLM at the end of processor types
list.
2013-06-03 Sofiane Naci <sofiane.naci@arm.com> 2013-06-03 Sofiane Naci <sofiane.naci@arm.com>
* config/aarch64/aarch64.md (*movdi_aarch64): Define "simd" attribute. * config/aarch64/aarch64.md (*movdi_aarch64): Define "simd" attribute.
...@@ -269,8 +283,6 @@ ...@@ -269,8 +283,6 @@
* config/i386/i386.md (cpu): Add new value "slm". * config/i386/i386.md (cpu): Add new value "slm".
(slm.md): Include slm.md. (slm.md): Include slm.md.
* libgcc/config/i386/cpuinfo.c (INTEL_SLM): New enum value.
2013-05-30 Bernd Schmidt <bernds@codesourcery.com> 2013-05-30 Bernd Schmidt <bernds@codesourcery.com>
Zhenqiang Chen <zhenqiang.chen@linaro.org> Zhenqiang Chen <zhenqiang.chen@linaro.org>
......
...@@ -24688,7 +24688,7 @@ ia32_multipass_dfa_lookahead (void) ...@@ -24688,7 +24688,7 @@ ia32_multipass_dfa_lookahead (void)
ready list. ready list.
Return index of IMUL producer if it was found and -1 otherwise. */ Return index of IMUL producer if it was found and -1 otherwise. */
static int static int
do_reoder_for_imul(rtx *ready, int n_ready) do_reorder_for_imul (rtx *ready, int n_ready)
{ {
rtx insn, set, insn1, insn2; rtx insn, set, insn1, insn2;
sd_iterator_def sd_it; sd_iterator_def sd_it;
...@@ -24699,10 +24699,6 @@ do_reoder_for_imul(rtx *ready, int n_ready) ...@@ -24699,10 +24699,6 @@ do_reoder_for_imul(rtx *ready, int n_ready)
if (ix86_tune != PROCESSOR_ATOM) if (ix86_tune != PROCESSOR_ATOM)
return index; return index;
/* Do not perform ready list reodering for pre-reload schedule pass. */
if (!reload_completed)
return index;
/* Check that IMUL instruction is on the top of ready list. */ /* Check that IMUL instruction is on the top of ready list. */
insn = ready[n_ready - 1]; insn = ready[n_ready - 1];
set = single_set (insn); set = single_set (insn);
...@@ -24713,7 +24709,7 @@ do_reoder_for_imul(rtx *ready, int n_ready) ...@@ -24713,7 +24709,7 @@ do_reoder_for_imul(rtx *ready, int n_ready)
return index; return index;
/* Search for producer of independent IMUL instruction. */ /* Search for producer of independent IMUL instruction. */
for (i = n_ready - 2; i>= 0; i--) for (i = n_ready - 2; i >= 0; i--)
{ {
insn = ready[i]; insn = ready[i];
if (!NONDEBUG_INSN_P (insn)) if (!NONDEBUG_INSN_P (insn))
...@@ -24769,7 +24765,7 @@ do_reoder_for_imul(rtx *ready, int n_ready) ...@@ -24769,7 +24765,7 @@ do_reoder_for_imul(rtx *ready, int n_ready)
scheduled earlier. Applied for Silvermont only. scheduled earlier. Applied for Silvermont only.
Return true if top 2 insns must be interchanged. */ Return true if top 2 insns must be interchanged. */
static bool static bool
swap_top_of_ready_list(rtx *ready, int n_ready) swap_top_of_ready_list (rtx *ready, int n_ready)
{ {
rtx top = ready[n_ready - 1]; rtx top = ready[n_ready - 1];
rtx next = ready[n_ready - 2]; rtx next = ready[n_ready - 2];
...@@ -24782,8 +24778,6 @@ swap_top_of_ready_list(rtx *ready, int n_ready) ...@@ -24782,8 +24778,6 @@ swap_top_of_ready_list(rtx *ready, int n_ready)
if (ix86_tune != PROCESSOR_SLM) if (ix86_tune != PROCESSOR_SLM)
return false; return false;
if (!reload_completed)
return false;
if (!NONDEBUG_INSN_P (top)) if (!NONDEBUG_INSN_P (top))
return false; return false;
...@@ -24842,7 +24836,7 @@ swap_top_of_ready_list(rtx *ready, int n_ready) ...@@ -24842,7 +24836,7 @@ swap_top_of_ready_list(rtx *ready, int n_ready)
/* Perform possible reodering of ready list for Atom/Silvermont only. /* Perform possible reodering of ready list for Atom/Silvermont only.
Return issue rate. */ Return issue rate. */
static int static int
ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready, ix86_sched_reorder (FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
int clock_var) int clock_var)
{ {
int issue_rate = -1; int issue_rate = -1;
...@@ -24852,7 +24846,7 @@ ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready, ...@@ -24852,7 +24846,7 @@ ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
int index = -1; int index = -1;
/* Set up issue rate. */ /* Set up issue rate. */
issue_rate = ix86_issue_rate(); issue_rate = ix86_issue_rate ();
/* Do reodering for Atom/SLM only. */ /* Do reodering for Atom/SLM only. */
if (ix86_tune != PROCESSOR_ATOM && ix86_tune != PROCESSOR_SLM) if (ix86_tune != PROCESSOR_ATOM && ix86_tune != PROCESSOR_SLM)
...@@ -24866,14 +24860,14 @@ ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready, ...@@ -24866,14 +24860,14 @@ ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
if (!reload_completed) if (!reload_completed)
return issue_rate; return issue_rate;
if ((index = do_reoder_for_imul (ready, n_ready)) >= 0) if ((index = do_reorder_for_imul (ready, n_ready)) >= 0)
{ {
if (sched_verbose > 1) if (sched_verbose > 1)
fprintf(dump, ";;\tatom sched_reorder: put %d insn on top\n", fprintf (dump, ";;\tatom sched_reorder: put %d insn on top\n",
INSN_UID (ready[index])); INSN_UID (ready[index]));
/* Put IMUL producer (ready[index]) at the top of ready list. */ /* Put IMUL producer (ready[index]) at the top of ready list. */
insn= ready[index]; insn = ready[index];
for (i = index; i < n_ready - 1; i++) for (i = index; i < n_ready - 1; i++)
ready[i] = ready[i + 1]; ready[i] = ready[i + 1];
ready[n_ready - 1] = insn; ready[n_ready - 1] = insn;
...@@ -24882,7 +24876,7 @@ ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready, ...@@ -24882,7 +24876,7 @@ ix86_sched_reorder(FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
if (clock_var != 0 && swap_top_of_ready_list (ready, n_ready)) if (clock_var != 0 && swap_top_of_ready_list (ready, n_ready))
{ {
if (sched_verbose > 1) if (sched_verbose > 1)
fprintf(dump, ";;\tslm sched_reorder: swap %d and %d insns\n", fprintf (dump, ";;\tslm sched_reorder: swap %d and %d insns\n",
INSN_UID (ready[n_ready - 1]), INSN_UID (ready[n_ready - 2])); INSN_UID (ready[n_ready - 1]), INSN_UID (ready[n_ready - 2]));
/* Swap 2 top elements of ready list. */ /* Swap 2 top elements of ready list. */
insn = ready[n_ready - 1]; insn = ready[n_ready - 1];
...@@ -30054,11 +30048,11 @@ fold_builtin_cpu (tree fndecl, tree *args) ...@@ -30054,11 +30048,11 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_AMD, M_AMD,
M_CPU_TYPE_START, M_CPU_TYPE_START,
M_INTEL_ATOM, M_INTEL_ATOM,
M_INTEL_SLM,
M_INTEL_CORE2, M_INTEL_CORE2,
M_INTEL_COREI7, M_INTEL_COREI7,
M_AMDFAM10H, M_AMDFAM10H,
M_AMDFAM15H, M_AMDFAM15H,
M_INTEL_SLM,
M_CPU_SUBTYPE_START, M_CPU_SUBTYPE_START,
M_INTEL_COREI7_NEHALEM, M_INTEL_COREI7_NEHALEM,
M_INTEL_COREI7_WESTMERE, M_INTEL_COREI7_WESTMERE,
2013-06-03 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com>
* config/i386/cpuinfo.c (INTEL_SLM): New enum value.
2013-05-28 Eric Botcazou <ebotcazou@adacore.com> 2013-05-28 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set * config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set
......
...@@ -47,14 +47,16 @@ enum processor_vendor ...@@ -47,14 +47,16 @@ enum processor_vendor
VENDOR_MAX VENDOR_MAX
}; };
/* Any new types or subtypes have to be inserted at the end. */
enum processor_types enum processor_types
{ {
INTEL_ATOM = 1, INTEL_ATOM = 1,
INTEL_SLM,
INTEL_CORE2, INTEL_CORE2,
INTEL_COREI7, INTEL_COREI7,
AMDFAM10H, AMDFAM10H,
AMDFAM15H, AMDFAM15H,
INTEL_SLM,
CPU_TYPE_MAX CPU_TYPE_MAX
}; };
......
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