re PR target/36627 (X86: wrong mode in subqi_2)

	PR target/36627
	* config/i386/i386.md : Change constraints of HImode and QImode
	immediate operands from "i" to "n".  Change SImode "ni" constraint to
	"i" and SImode "rmi" constraint to "g".  Remove all constraints
	from const0_operand and const1_operand predicated operands.
	(i): Change QImode and HImode attribute from "i" to "n".
	(*subqi_2): Change HImode operands to QImode.
	(*subqi_3): Ditto.

From-SVN: r137122

gcc/ChangeLog

+2008-06-25 Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/36627
+	* config/i386/i386.md : Change constraints of HImode and QImode
+	immediate operands from "i" to "n".  Change SImode "ni" constraint to
+	"i" and SImode "rmi" constraint to "g".  Remove all constraints
+	from const0_operand and const1_operand predicated operands.
+	(i): Change QImode and HImode attribute from "i" to "n".
+	(*subqi_2): Change HImode operands to QImode.
+	(*subqi_3): Ditto.
+
 2008-06-25  Olivier Hainque  <hainque@adacore.com>
 
 	* Makefile.in (GTFILES_H): Use | instead of ; as separator in
@@ -51,7 +62,7 @@
 	the memory instead of the memory itself for the save area.
 
 2008-06-24  Olivier Hainque  <hainque@adacore.com>
-            Nicolas Roche  <roche@adacore.com>
+	    Nicolas Roche  <roche@adacore.com>
 
 	* gengtype.c (srcdir_len): size_t instead of int.
 	(get_file_realbasename): New function.  For F a filename, the real
@@ -79,7 +90,7 @@
 
 2008-06-23  Uros Bizjak  <ubizjak@gmail.com>
 
-	PR middle-end/PR36584
+	PR middle-end/36584
 	* calls.c (expand_call): Increase alignment for recursive functions.
 
 2008-06-23  Anatoly Sokolov  <aesok@post.ru>

gcc/config/i386/i386.md

@@ -597,7 +597,7 @@
 (define_mode_attr r [(QI "q") (HI "r") (SI "r") (DI "r")])
 
 ;; Immediate operand constraint for integer modes.
-(define_mode_attr i [(QI "i") (HI "i") (SI "i") (DI "e")])
+(define_mode_attr i [(QI "n") (HI "n") (SI "i") (DI "e")])
 
 ;; General operand predicate for integer modes.
 (define_mode_attr general_operand
@@ -725,7 +725,7 @@
 (define_insn "cmpdi_ccno_1_rex64"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:DI 0 "nonimmediate_operand" "r,?mr")
-		 (match_operand:DI 1 "const0_operand" "n,n")))]
+		 (match_operand:DI 1 "const0_operand" "")))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{q}\t%0, %0
@@ -764,7 +764,7 @@
 (define_insn "*cmpsi_ccno_1"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
-		 (match_operand:SI 1 "const0_operand" "n,n")))]
+		 (match_operand:SI 1 "const0_operand" "")))]
   "ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{l}\t%0, %0
@@ -803,7 +803,7 @@
 (define_insn "*cmphi_ccno_1"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
-		 (match_operand:HI 1 "const0_operand" "n,n")))]
+		 (match_operand:HI 1 "const0_operand" "")))]
   "ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{w}\t%0, %0
@@ -815,7 +815,7 @@
 (define_insn "*cmphi_minus_1"
   [(set (reg FLAGS_REG)
 	(compare (minus:HI (match_operand:HI 0 "nonimmediate_operand" "rm,r")
-			   (match_operand:HI 1 "general_operand" "ri,mr"))
+			   (match_operand:HI 1 "general_operand" "rn,mr"))
 		 (const_int 0)))]
   "ix86_match_ccmode (insn, CCGOCmode)"
   "cmp{w}\t{%1, %0|%0, %1}"
@@ -825,7 +825,7 @@
 (define_insn "*cmphi_1"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:HI 0 "nonimmediate_operand" "rm,r")
-		 (match_operand:HI 1 "general_operand" "ri,mr")))]
+		 (match_operand:HI 1 "general_operand" "rn,mr")))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))
    && ix86_match_ccmode (insn, CCmode)"
   "cmp{w}\t{%1, %0|%0, %1}"
@@ -835,7 +835,7 @@
 (define_insn "*cmpqi_ccno_1"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
-		 (match_operand:QI 1 "const0_operand" "n,n")))]
+		 (match_operand:QI 1 "const0_operand" "")))]
   "ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{b}\t%0, %0
@@ -847,7 +847,7 @@
 (define_insn "*cmpqi_1"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:QI 0 "nonimmediate_operand" "qm,q")
-		 (match_operand:QI 1 "general_operand" "qi,mq")))]
+		 (match_operand:QI 1 "general_operand" "qn,mq")))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))
     && ix86_match_ccmode (insn, CCmode)"
   "cmp{b}\t{%1, %0|%0, %1}"
@@ -857,7 +857,7 @@
 (define_insn "*cmpqi_minus_1"
   [(set (reg FLAGS_REG)
 	(compare (minus:QI (match_operand:QI 0 "nonimmediate_operand" "qm,q")
-			   (match_operand:QI 1 "general_operand" "qi,mq"))
+			   (match_operand:QI 1 "general_operand" "qn,mq"))
 		 (const_int 0)))]
   "ix86_match_ccmode (insn, CCGOCmode)"
   "cmp{b}\t{%1, %0|%0, %1}"
@@ -900,7 +900,7 @@
 	      (match_operand 0 "ext_register_operand" "Q")
 	      (const_int 8)
 	      (const_int 8)) 0)
-	  (match_operand:QI 1 "const0_operand" "n")))]
+	  (match_operand:QI 1 "const0_operand" "")))]
   "ix86_match_ccmode (insn, CCNOmode)"
   "test{b}\t%h0, %h0"
   [(set_attr "type" "test")
@@ -1006,7 +1006,7 @@
 	(unspec:HI
 	  [(compare:CCFP
 	     (match_operand 1 "register_operand" "f")
-	     (match_operand 2 "const0_operand" "X"))]
+	     (match_operand 2 "const0_operand" ""))]
 	UNSPEC_FNSTSW))]
   "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
    && GET_MODE (operands[1]) == GET_MODE (operands[2])"
@@ -1025,7 +1025,7 @@
   [(set (reg:CCFP FLAGS_REG)
 	(compare:CCFP
 	  (match_operand 1 "register_operand" "f")
-	  (match_operand 2 "const0_operand" "X")))
+	  (match_operand 2 "const0_operand" "")))
    (clobber (match_operand:HI 0 "register_operand" "=a"))]
   "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
    && TARGET_SAHF && !TARGET_CMOVE
@@ -1415,7 +1415,7 @@
 
 (define_insn "*movsi_xor"
   [(set (match_operand:SI 0 "register_operand" "=r")
-	(match_operand:SI 1 "const0_operand" "i"))
+	(match_operand:SI 1 "const0_operand" ""))
    (clobber (reg:CC FLAGS_REG))]
   "reload_completed && (!TARGET_USE_MOV0 || optimize_size)"
   "xor{l}\t%0, %0"
@@ -1440,9 +1440,9 @@
 
 (define_insn "*movsi_1"
   [(set (match_operand:SI 0 "nonimmediate_operand"
-			"=r  ,m  ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
+			"=r,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
 	(match_operand:SI 1 "general_operand"
-			"rinm,rin,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
+			"g ,ri,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -1571,7 +1571,7 @@
 ;; For 64BIT abi we always round up to 8 bytes.
 (define_insn "*pushhi2_rex64"
   [(set (match_operand:HI 0 "push_operand" "=X")
-	(match_operand:HI 1 "nonmemory_no_elim_operand" "ri"))]
+	(match_operand:HI 1 "nonmemory_no_elim_operand" "rn"))]
   "TARGET_64BIT"
   "push{q}\t%q1"
   [(set_attr "type" "push")
@@ -1706,7 +1706,7 @@
 
 (define_insn "*movstricthi_xor"
   [(set (strict_low_part (match_operand:HI 0 "register_operand" "+r"))
-	(match_operand:HI 1 "const0_operand" "i"))
+	(match_operand:HI 1 "const0_operand" ""))
    (clobber (reg:CC FLAGS_REG))]
   "reload_completed
    && ((!TARGET_USE_MOV0 && !TARGET_PARTIAL_REG_STALL) || optimize_size)"
@@ -1736,7 +1736,7 @@
 ;; For 64BIT abi we always round up to 8 bytes.
 (define_insn "*pushqi2_rex64"
   [(set (match_operand:QI 0 "push_operand" "=X")
-	(match_operand:QI 1 "nonmemory_no_elim_operand" "qi"))]
+	(match_operand:QI 1 "nonmemory_no_elim_operand" "qn"))]
   "TARGET_64BIT"
   "push{q}\t%q1"
   [(set_attr "type" "push")
@@ -1863,7 +1863,7 @@
 
 (define_insn "*movstrictqi_xor"
   [(set (strict_low_part (match_operand:QI 0 "q_regs_operand" "+q"))
-	(match_operand:QI 1 "const0_operand" "i"))
+	(match_operand:QI 1 "const0_operand" ""))
    (clobber (reg:CC FLAGS_REG))]
   "reload_completed && (!TARGET_USE_MOV0 || optimize_size)"
   "xor{b}\t%0, %0"
@@ -2189,7 +2189,7 @@
 
 (define_insn "*movdi_xor_rex64"
   [(set (match_operand:DI 0 "register_operand" "=r")
-	(match_operand:DI 1 "const0_operand" "i"))
+	(match_operand:DI 1 "const0_operand" ""))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && (!TARGET_USE_MOV0 || optimize_size)
    && reload_completed"
@@ -5606,7 +5606,7 @@
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
 	  (plus:QI (plus:QI (match_operand:QI 3 "ix86_carry_flag_operator" "")
 			    (match_operand:QI 1 "nonimmediate_operand" "%0,0"))
-		   (match_operand:QI 2 "general_operand" "qi,qm")))
+		   (match_operand:QI 2 "general_operand" "qn,qm")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, QImode, operands)"
   "adc{b}\t{%2, %0|%0, %2}"
@@ -5618,7 +5618,7 @@
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	  (plus:HI (plus:HI (match_operand:HI 3 "ix86_carry_flag_operator" "")
 			    (match_operand:HI 1 "nonimmediate_operand" "%0,0"))
-		   (match_operand:HI 2 "general_operand" "ri,rm")))
+		   (match_operand:HI 2 "general_operand" "rn,rm")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, HImode, operands)"
   "adc{w}\t{%2, %0|%0, %2}"
@@ -5666,7 +5666,7 @@
 (define_insn "addqi3_cc"
   [(set (reg:CC FLAGS_REG)
 	(unspec:CC [(match_operand:QI 1 "nonimmediate_operand" "%0,0")
-		    (match_operand:QI 2 "general_operand" "qi,qm")]
+		    (match_operand:QI 2 "general_operand" "qn,qm")]
 		   UNSPEC_ADD_CARRY))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
 	(plus:QI (match_dup 1) (match_dup 2)))]
@@ -6144,7 +6144,7 @@
 (define_insn "*addsi_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm,r")
 	(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,r")
-		 (match_operand:SI 2 "general_operand" "rmni,rni,lni")))
+		 (match_operand:SI 2 "general_operand" "g,ri,li")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, SImode, operands)"
 {
@@ -6228,7 +6228,7 @@
   [(set (match_operand:DI 0 "register_operand" "=r,r")
 	(zero_extend:DI
 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r")
-		   (match_operand:SI 2 "general_operand" "rmni,lni"))))
+		   (match_operand:SI 2 "general_operand" "g,li"))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
 {
@@ -6294,7 +6294,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0")
-		   (match_operand:SI 2 "general_operand" "rmni,rni"))
+		   (match_operand:SI 2 "general_operand" "g,ri"))
 	  (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
 	(plus:SI (match_dup 1) (match_dup 2)))]
@@ -6342,7 +6342,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
-		   (match_operand:SI 2 "general_operand" "rmni"))
+		   (match_operand:SI 2 "general_operand" "g"))
 	  (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
@@ -6385,7 +6385,7 @@
 
 (define_insn "*addsi_3"
   [(set (reg FLAGS_REG)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
+	(compare (neg:SI (match_operand:SI 2 "general_operand" "g"))
 		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCZmode)
@@ -6430,7 +6430,7 @@
 ;; See comment for addsi_1_zext why we do use nonimmediate_operand
 (define_insn "*addsi_3_zext"
   [(set (reg FLAGS_REG)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
+	(compare (neg:SI (match_operand:SI 2 "general_operand" "g"))
 		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
    (set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
@@ -6520,7 +6520,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
-		   (match_operand:SI 2 "general_operand" "rmni"))
+		   (match_operand:SI 2 "general_operand" "g"))
 	  (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
@@ -6577,7 +6577,7 @@
 (define_insn "*addhi_1_lea"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r")
 	(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r")
-		 (match_operand:HI 2 "general_operand" "ri,rm,lni")))
+		 (match_operand:HI 2 "general_operand" "rn,rm,ln")))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_PARTIAL_REG_STALL
    && ix86_binary_operator_ok (PLUS, HImode, operands)"
@@ -6620,7 +6620,7 @@
 (define_insn "*addhi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-		 (match_operand:HI 2 "general_operand" "ri,rm")))
+		 (match_operand:HI 2 "general_operand" "rn,rm")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_PARTIAL_REG_STALL
    && ix86_binary_operator_ok (PLUS, HImode, operands)"
@@ -6660,7 +6660,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-		   (match_operand:HI 2 "general_operand" "rmni,rni"))
+		   (match_operand:HI 2 "general_operand" "rmn,rn"))
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(plus:HI (match_dup 1) (match_dup 2)))]
@@ -6700,7 +6700,7 @@
 
 (define_insn "*addhi_3"
   [(set (reg FLAGS_REG)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
+	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmn"))
 		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCZmode)
@@ -6780,7 +6780,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
-		   (match_operand:HI 2 "general_operand" "rmni"))
+		   (match_operand:HI 2 "general_operand" "rmn"))
 	  (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
@@ -6966,7 +6966,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
-		   (match_operand:QI 2 "general_operand" "qmni,qni"))
+		   (match_operand:QI 2 "general_operand" "qmn,qn"))
 	  (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(plus:QI (match_dup 1) (match_dup 2)))]
@@ -7005,7 +7005,7 @@
 
 (define_insn "*addqi_3"
   [(set (reg FLAGS_REG)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
+	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmn"))
 		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCZmode)
@@ -7084,7 +7084,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
-		   (match_operand:QI 2 "general_operand" "qmni"))
+		   (match_operand:QI 2 "general_operand" "qmn"))
 	  (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCGOCmode)
@@ -7348,7 +7348,7 @@
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
 	  (minus:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
 	    (plus:QI (match_operand:QI 3 "ix86_carry_flag_operator" "")
-	       (match_operand:QI 2 "general_operand" "qi,qm"))))
+	       (match_operand:QI 2 "general_operand" "qn,qm"))))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, QImode, operands)"
   "sbb{b}\t{%2, %0|%0, %2}"
@@ -7360,7 +7360,7 @@
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	  (minus:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
 	    (plus:HI (match_operand:HI 3 "ix86_carry_flag_operator" "")
-	       (match_operand:HI 2 "general_operand" "ri,rm"))))
+	       (match_operand:HI 2 "general_operand" "rn,rm"))))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, HImode, operands)"
   "sbb{w}\t{%2, %0|%0, %2}"
@@ -7489,7 +7489,7 @@
 (define_insn "*subhi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	(minus:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
-		  (match_operand:HI 2 "general_operand" "ri,rm")))
+		  (match_operand:HI 2 "general_operand" "rn,rm")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, HImode, operands)"
   "sub{w}\t{%2, %0|%0, %2}"
@@ -7500,7 +7500,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (minus:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
-		    (match_operand:HI 2 "general_operand" "ri,rm"))
+		    (match_operand:HI 2 "general_operand" "rn,rm"))
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	(minus:HI (match_dup 1) (match_dup 2)))]
@@ -7513,7 +7513,7 @@
 (define_insn "*subhi_3"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:HI 1 "nonimmediate_operand" "0,0")
-		 (match_operand:HI 2 "general_operand" "ri,rm")))
+		 (match_operand:HI 2 "general_operand" "rn,rm")))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	(minus:HI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCmode)
@@ -7533,7 +7533,7 @@
 (define_insn "*subqi_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
 	(minus:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
-		  (match_operand:QI 2 "general_operand" "qn,qmn")))
+		  (match_operand:QI 2 "general_operand" "qn,qm")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, QImode, operands)"
   "sub{b}\t{%2, %0|%0, %2}"
@@ -7543,7 +7543,7 @@
 (define_insn "*subqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(minus:QI (match_dup 0)
-		  (match_operand:QI 1 "general_operand" "qn,qmn")))
+		  (match_operand:QI 1 "general_operand" "qn,qm")))
    (clobber (reg:CC FLAGS_REG))]
   "(! TARGET_PARTIAL_REG_STALL || optimize_size)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -7555,10 +7555,10 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (minus:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
-		    (match_operand:QI 2 "general_operand" "qi,qm"))
+		    (match_operand:QI 2 "general_operand" "qn,qm"))
 	  (const_int 0)))
-   (set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
-	(minus:HI (match_dup 1) (match_dup 2)))]
+   (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
+	(minus:QI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (MINUS, QImode, operands)"
   "sub{b}\t{%2, %0|%0, %2}"
@@ -7568,9 +7568,9 @@
 (define_insn "*subqi_3"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:QI 1 "nonimmediate_operand" "0,0")
-		 (match_operand:QI 2 "general_operand" "qi,qm")))
-   (set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
-	(minus:HI (match_dup 1) (match_dup 2)))]
+		 (match_operand:QI 2 "general_operand" "qn,qm")))
+   (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q")
+	(minus:QI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCmode)
    && ix86_binary_operator_ok (MINUS, QImode, operands)"
   "sub{b}\t{%2, %0|%0, %2}"
@@ -7732,7 +7732,7 @@
 (define_insn "*mulhi3_1"
   [(set (match_operand:HI 0 "register_operand" "=r,r,r")
 	(mult:HI (match_operand:HI 1 "nonimmediate_operand" "%rm,rm,0")
-		 (match_operand:HI 2 "general_operand" "K,i,mr")))
+		 (match_operand:HI 2 "general_operand" "K,n,mr")))
    (clobber (reg:CC FLAGS_REG))]
   "!(MEM_P (operands[1]) && MEM_P (operands[2]))"
   "@
@@ -8543,7 +8543,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "%!*a,r,rm")
-		  (match_operand:SI 1 "general_operand" "in,in,rin"))
+		  (match_operand:SI 1 "general_operand" "i,i,ri"))
 	  (const_int 0)))]
   "ix86_match_ccmode (insn, CCNOmode)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -9044,7 +9044,7 @@
 (define_insn "*andhi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r")
 	(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm")
-		(match_operand:HI 2 "general_operand" "ri,rm,L")))
+		(match_operand:HI 2 "general_operand" "rn,rm,L")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (AND, HImode, operands)"
 {
@@ -9068,7 +9068,7 @@
 (define_insn "*andhi_2"
   [(set (reg FLAGS_REG)
 	(compare (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-			 (match_operand:HI 2 "general_operand" "g,ri"))
+			 (match_operand:HI 2 "general_operand" "rmn,rn"))
 		 (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(and:HI (match_dup 1) (match_dup 2)))]
@@ -9090,7 +9090,7 @@
 (define_insn "*andqi_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
 	(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		(match_operand:QI 2 "general_operand" "qi,qmi,ri")))
+		(match_operand:QI 2 "general_operand" "qn,qmn,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (AND, QImode, operands)"
   "@
@@ -9103,7 +9103,7 @@
 (define_insn "*andqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(and:QI (match_dup 0)
-		(match_operand:QI 1 "general_operand" "qi,qmi")))
+		(match_operand:QI 1 "general_operand" "qn,qmn")))
    (clobber (reg:CC FLAGS_REG))]
   "(! TARGET_PARTIAL_REG_STALL || optimize_size)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -9115,7 +9115,7 @@
   [(set (reg FLAGS_REG)
 	(compare (and:QI
 		      (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		      (match_operand:QI 2 "general_operand" "qim,qi,i"))
+		      (match_operand:QI 2 "general_operand" "qmn,qn,n"))
 		 (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r")
 	(and:QI (match_dup 1) (match_dup 2)))]
@@ -9139,7 +9139,7 @@
   [(set (reg FLAGS_REG)
 	(compare (and:QI
 		   (match_operand:QI 1 "nonimmediate_operand" "%0,0")
-		   (match_operand:QI 2 "general_operand" "qim,qi"))
+		   (match_operand:QI 2 "general_operand" "qmn,qn"))
 		 (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(and:QI (match_dup 1) (match_dup 2)))]
@@ -9153,7 +9153,7 @@
   [(set (reg FLAGS_REG)
 	(compare (and:QI
 		   (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
-		   (match_operand:QI 1 "nonimmediate_operand" "qmi,qi"))
+		   (match_operand:QI 1 "nonimmediate_operand" "qmn,qn"))
 		 (const_int 0)))
    (set (strict_low_part (match_dup 0))
 	(and:QI (match_dup 0) (match_dup 1)))]
@@ -9470,7 +9470,7 @@
 (define_insn "*iorhi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,m")
 	(ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-		(match_operand:HI 2 "general_operand" "g,ri")))
+		(match_operand:HI 2 "general_operand" "rmn,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (IOR, HImode, operands)"
   "or{w}\t{%2, %0|%0, %2}"
@@ -9480,7 +9480,7 @@
 (define_insn "*iorhi_2"
   [(set (reg FLAGS_REG)
 	(compare (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-			 (match_operand:HI 2 "general_operand" "g,ri"))
+			 (match_operand:HI 2 "general_operand" "rmn,rn"))
 		 (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(ior:HI (match_dup 1) (match_dup 2)))]
@@ -9493,7 +9493,7 @@
 (define_insn "*iorhi_3"
   [(set (reg FLAGS_REG)
 	(compare (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
-			 (match_operand:HI 2 "general_operand" "g"))
+			 (match_operand:HI 2 "general_operand" "rmn"))
 		 (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCNOmode)
@@ -9514,7 +9514,7 @@
 (define_insn "*iorqi_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r")
 	(ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		(match_operand:QI 2 "general_operand" "qmi,qi,ri")))
+		(match_operand:QI 2 "general_operand" "qmn,qn,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (IOR, QImode, operands)"
   "@
@@ -9527,7 +9527,7 @@
 (define_insn "*iorqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+q,m"))
 	(ior:QI (match_dup 0)
-		(match_operand:QI 1 "general_operand" "qmi,qi")))
+		(match_operand:QI 1 "general_operand" "qmn,qn")))
    (clobber (reg:CC FLAGS_REG))]
   "(! TARGET_PARTIAL_REG_STALL || optimize_size)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -9538,7 +9538,7 @@
 (define_insn "*iorqi_2"
   [(set (reg FLAGS_REG)
 	(compare (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
-			 (match_operand:QI 2 "general_operand" "qim,qi"))
+			 (match_operand:QI 2 "general_operand" "qmn,qn"))
 		 (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(ior:QI (match_dup 1) (match_dup 2)))]
@@ -9551,7 +9551,7 @@
 (define_insn "*iorqi_2_slp"
   [(set (reg FLAGS_REG)
 	(compare (ior:QI (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
-			 (match_operand:QI 1 "general_operand" "qim,qi"))
+			 (match_operand:QI 1 "general_operand" "qmn,qn"))
 		 (const_int 0)))
    (set (strict_low_part (match_dup 0))
 	(ior:QI (match_dup 0) (match_dup 1)))]
@@ -9565,7 +9565,7 @@
 (define_insn "*iorqi_3"
   [(set (reg FLAGS_REG)
 	(compare (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
-			 (match_operand:QI 2 "general_operand" "qim"))
+			 (match_operand:QI 2 "general_operand" "qmn"))
 		 (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCNOmode)
@@ -9843,7 +9843,7 @@
 (define_insn "*xorhi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,m")
 	(xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-		(match_operand:HI 2 "general_operand" "g,ri")))
+		(match_operand:HI 2 "general_operand" "rmn,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (XOR, HImode, operands)"
   "xor{w}\t{%2, %0|%0, %2}"
@@ -9853,7 +9853,7 @@
 (define_insn "*xorhi_2"
   [(set (reg FLAGS_REG)
 	(compare (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-			 (match_operand:HI 2 "general_operand" "g,ri"))
+			 (match_operand:HI 2 "general_operand" "rmn,rn"))
 		 (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(xor:HI (match_dup 1) (match_dup 2)))]
@@ -9866,7 +9866,7 @@
 (define_insn "*xorhi_3"
   [(set (reg FLAGS_REG)
 	(compare (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
-			 (match_operand:HI 2 "general_operand" "g"))
+			 (match_operand:HI 2 "general_operand" "rmn"))
 		 (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCNOmode)
@@ -9887,7 +9887,7 @@
 (define_insn "*xorqi_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r")
 	(xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		(match_operand:QI 2 "general_operand" "qmi,qi,ri")))
+		(match_operand:QI 2 "general_operand" "qmn,qn,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (XOR, QImode, operands)"
   "@
@@ -9900,7 +9900,7 @@
 (define_insn "*xorqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(xor:QI (match_dup 0)
-		(match_operand:QI 1 "general_operand" "qi,qmi")))
+		(match_operand:QI 1 "general_operand" "qn,qmn")))
    (clobber (reg:CC FLAGS_REG))]
   "(! TARGET_PARTIAL_REG_STALL || optimize_size)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -9985,7 +9985,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
-		  (match_operand:QI 2 "general_operand" "qim,qi"))
+		  (match_operand:QI 2 "general_operand" "qmn,qn"))
 	  (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(xor:QI (match_dup 1) (match_dup 2)))]
@@ -9998,7 +9998,7 @@
 (define_insn "*xorqi_2_slp"
   [(set (reg FLAGS_REG)
 	(compare (xor:QI (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
-			 (match_operand:QI 1 "general_operand" "qim,qi"))
+			 (match_operand:QI 1 "general_operand" "qmn,qn"))
 		 (const_int 0)))
    (set (strict_low_part (match_dup 0))
 	(xor:QI (match_dup 0) (match_dup 1)))]
@@ -10013,7 +10013,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
-		  (match_operand:QI 2 "general_operand" "qim"))
+		  (match_operand:QI 2 "general_operand" "qmn"))
 	  (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCNOmode)
@@ -12492,7 +12492,7 @@
   [(set (reg FLAGS_REG)
 	(compare
 	  (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
-		       (match_operand:QI 2 "const1_operand" "I"))
+		       (match_operand:QI 2 "const1_operand" ""))
 	  (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "(TARGET_SHIFT1 || optimize_size)
@@ -14040,7 +14040,7 @@
   [(set (pc)
 	(if_then_else (match_operator 1 "comparison_operator"
 			[(match_operand:SWI 2 "register_operand" "<r>")
-			 (match_operand:SWI 3 "const0_operand" "n")])
+			 (match_operand:SWI 3 "const0_operand" "")])
 	 (label_ref (match_operand 0 "" ""))
 	 (pc)))]
   "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT"
@@ -14055,7 +14055,7 @@
   [(set (pc)
 	(if_then_else (match_operator 1 "comparison_operator"
 			[(match_operand:SWI 2 "register_operand" "<r>")
-			 (match_operand:SWI 3 "const0_operand" "n")])
+			 (match_operand:SWI 3 "const0_operand" "")])
 	 (pc)
 	 (label_ref (match_operand 0 "" ""))))]
   "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT"
@@ -14510,7 +14510,7 @@
   [(set (pc)
 	(if_then_else (match_operator 0 "comparison_operator"
 			[(match_operand 1 "register_operand" "f")
-			 (match_operand 2 "const0_operand" "X")])
+			 (match_operand 2 "const0_operand" "")])
 	  (label_ref (match_operand 3 "" ""))
 	  (pc)))
    (clobber (reg:CCFP FPSR_REG))

gcc/testsuite/ChangeLog

@@ -22,7 +22,7 @@
 
 2008-06-23  Uros Bizjak  <ubizjak@gmail.com>
 
-	PR middle-end/PR36584
+	PR middle-end/36584
 	* testsuite/gcc.dg/pr36584.c: New test.
 	* testsuite/gcc.target/i386/local2.c: Remove invalid test.