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Commit 0ddc0ebc by Thomas Preud'homme Committed by Thomas Preud'homme
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[ARM] Consistently check for neon in vect effective targets 

Conditions checked for ARM targets in vector-related effective targets
are inconsistent:

* sometimes arm*-*-* is checked
* sometimes Neon is checked
* sometimes arm_neon_ok and sometimes arm_neon is used for neon check
* sometimes check_effective_target_* is used, sometimes
* is-effective-target

This patch consolidate all of these check into using is-effective-target
arm_neon and when little endian was checked, the check is kept.

2017-06-28  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * lib/target-supports.exp (check_effective_target_vect_int): Replace
    current ARM check by ARM NEON's availability check.
    (check_effective_target_vect_intfloat_cvt): Likewise.
    (check_effective_target_vect_uintfloat_cvt): Likewise.
    (check_effective_target_vect_floatint_cvt): Likewise.
    (check_effective_target_vect_floatuint_cvt): Likewise.
    (check_effective_target_vect_shift): Likewise.
    (check_effective_target_whole_vector_shift): Likewise.
    (check_effective_target_vect_bswap): Likewise.
    (check_effective_target_vect_shift_char): Likewise.
    (check_effective_target_vect_long): Likewise.
    (check_effective_target_vect_float): Likewise.
    (check_effective_target_vect_perm): Likewise.
    (check_effective_target_vect_perm_byte): Likewise.
    (check_effective_target_vect_perm_short): Likewise.
    (check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise.
    (check_effective_target_vect_widen_sum_qi_to_hi): Likewise.
    (check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
    (check_effective_target_vect_widen_mult_hi_to_si): Likewise.
    (check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise.
    (check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise.
    (check_effective_target_vect_widen_shift): Likewise.
    (check_effective_target_vect_extract_even_odd): Likewise.
    (check_effective_target_vect_interleave): Likewise.
    (check_effective_target_vect_multiple_sizes): Likewise.
    (check_effective_target_vect64): Likewise.
    (check_effective_target_vect_max_reduc): Likewise.

From-SVN: r249744
parent 8afb5358
Showing with 58 additions and 38 deletions
gcc/testsuite/ChangeLog
2017-06-28 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_vect_int): Replace
current ARM check by ARM NEON's availability check.
(check_effective_target_vect_intfloat_cvt): Likewise.
(check_effective_target_vect_uintfloat_cvt): Likewise.
(check_effective_target_vect_floatint_cvt): Likewise.
(check_effective_target_vect_floatuint_cvt): Likewise.
(check_effective_target_vect_shift): Likewise.
(check_effective_target_whole_vector_shift): Likewise.
(check_effective_target_vect_bswap): Likewise.
(check_effective_target_vect_shift_char): Likewise.
(check_effective_target_vect_long): Likewise.
(check_effective_target_vect_float): Likewise.
(check_effective_target_vect_perm): Likewise.
(check_effective_target_vect_perm_byte): Likewise.
(check_effective_target_vect_perm_short): Likewise.
(check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise.
(check_effective_target_vect_widen_sum_qi_to_hi): Likewise.
(check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
(check_effective_target_vect_widen_mult_hi_to_si): Likewise.
(check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise.
(check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise.
(check_effective_target_vect_widen_shift): Likewise.
(check_effective_target_vect_extract_even_odd): Likewise.
(check_effective_target_vect_interleave): Likewise.
(check_effective_target_vect_multiple_sizes): Likewise.
(check_effective_target_vect64): Likewise.
(check_effective_target_vect_max_reduc): Likewise.
2017-06-28 Richard Biener <rguenther@suse.de>
PR middle-end/81227
......
gcc/testsuite/lib/target-supports.exp
......@@ -2974,7 +2974,7 @@ proc check_effective_target_vect_int { } {
|| [istarget alpha*-*-*]
|| [istarget ia64-*-*]
|| [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mips_loongson]
|| [et-is-effective-target mips_msa])) } {
......@@ -3002,8 +3002,7 @@ proc check_effective_target_vect_intfloat_cvt { } {
if { [istarget i?86-*-*] || [istarget x86_64-*-*]
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa]) } {
set et_vect_intfloat_cvt_saved($et_index) 1
......@@ -3045,8 +3044,7 @@ proc check_effective_target_vect_uintfloat_cvt { } {
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
|| [istarget aarch64*-*-*]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa]) } {
set et_vect_uintfloat_cvt_saved($et_index) 1
......@@ -3074,8 +3072,7 @@ proc check_effective_target_vect_floatint_cvt { } {
if { [istarget i?86-*-*] || [istarget x86_64-*-*]
|| ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa]) } {
set et_vect_floatint_cvt_saved($et_index) 1
......@@ -3101,8 +3098,7 @@ proc check_effective_target_vect_floatuint_cvt { } {
set et_vect_floatuint_cvt_saved($et_index) 0
if { ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok])
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa]) } {
set et_vect_floatuint_cvt_saved($et_index) 1
......@@ -4978,7 +4974,7 @@ proc check_effective_target_vect_shift { } {
|| [istarget ia64-*-*]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& ([et-is-effective-target mips_msa]
|| [et-is-effective-target mips_loongson])) } {
......@@ -4996,7 +4992,7 @@ proc check_effective_target_whole_vector_shift { } {
|| [istarget ia64-*-*]
|| [istarget aarch64*-*-*]
|| [istarget powerpc64*-*-*]
|| ([check_effective_target_arm32]
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian])
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_loongson]) } {
......@@ -5020,8 +5016,7 @@ proc check_effective_target_vect_bswap { } {
} else {
set et_vect_bswap_saved($et_index) 0
if { [istarget aarch64*-*-*]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon])
|| [is-effective-target arm_neon]
} {
set et_vect_bswap_saved($et_index) 1
}
......@@ -5044,7 +5039,7 @@ proc check_effective_target_vect_shift_char { } {
set et_vect_shift_char_saved($et_index) 0
if { ([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
|| [check_effective_target_arm32]
|| [is-effective-target arm_neon]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa]) } {
set et_vect_shift_char_saved($et_index) 1
......@@ -5062,10 +5057,10 @@ proc check_effective_target_vect_shift_char { } {
proc check_effective_target_vect_long { } {
if { [istarget i?86-*-*] || [istarget x86_64-*-*]
|| (([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
|| (([istarget powerpc*-*-*]
&& ![istarget powerpc-*-linux*paired*])
&& [check_effective_target_ilp32])
|| [check_effective_target_arm32]
|| [is-effective-target arm_neon]
|| ([istarget sparc*-*-*] && [check_effective_target_ilp32])
|| [istarget aarch64*-*-*]
|| ([istarget mips*-*-*]
......@@ -5100,7 +5095,7 @@ proc check_effective_target_vect_float { } {
|| [istarget aarch64*-*-*]
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| [check_effective_target_arm32] } {
|| [is-effective-target arm_neon] } {
set et_vect_float_saved($et_index) 1
}
}
......@@ -5249,7 +5244,7 @@ proc check_effective_target_vect_perm { } {
verbose "check_effective_target_vect_perm: using cached result" 2
} else {
set et_vect_perm_saved($et_index) 0
if { [is-effective-target arm_neon_ok]
if { [is-effective-target arm_neon]
|| [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| [istarget spu-*-*]
......@@ -5278,7 +5273,7 @@ proc check_effective_target_vect_perm_byte { } {
verbose "check_effective_target_vect_perm_byte: using cached result" 2
} else {
set et_vect_perm_byte_saved($et_index) 0
if { ([is-effective-target arm_neon_ok]
if { ([is-effective-target arm_neon]
&& [is-effective-target arm_little_endian])
|| ([istarget aarch64*-*-*]
&& [is-effective-target aarch64_little_endian])
......@@ -5307,7 +5302,7 @@ proc check_effective_target_vect_perm_short { } {
verbose "check_effective_target_vect_perm_short: using cached result" 2
} else {
set et_vect_perm_short_saved($et_index) 0
if { ([is-effective-target arm_neon_ok]
if { ([is-effective-target arm_neon]
&& [is-effective-target arm_little_endian])
|| ([istarget aarch64*-*-*]
&& [is-effective-target aarch64_little_endian])
......@@ -5339,8 +5334,7 @@ proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
if { [istarget powerpc*-*-*]
|| [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] &&
[check_effective_target_arm_neon_ok])
|| [is-effective-target arm_neon]
|| [istarget ia64-*-*] } {
set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
}
......@@ -5394,7 +5388,7 @@ proc check_effective_target_vect_widen_sum_qi_to_hi { } {
} else {
set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
if { [check_effective_target_vect_unpack]
|| [check_effective_target_arm_neon_ok]
|| [is-effective-target arm_neon]
|| [istarget ia64-*-*] } {
set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
}
......@@ -5452,7 +5446,7 @@ proc check_effective_target_vect_widen_mult_qi_to_hi { } {
}
if { [istarget powerpc*-*-*]
|| [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
|| [is-effective-target arm_neon] } {
set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
}
}
......@@ -5489,8 +5483,7 @@ proc check_effective_target_vect_widen_mult_hi_to_si { } {
|| [istarget ia64-*-*]
|| [istarget aarch64*-*-*]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok]) } {
|| [is-effective-target arm_neon] } {
set et_vect_widen_mult_hi_to_si_saved($et_index) 1
}
}
......@@ -5514,8 +5507,7 @@ proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
} else {
set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
if { [istarget powerpc*-*-*]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok]
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian]) } {
set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
}
......@@ -5543,8 +5535,7 @@ proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
|| [istarget spu-*-*]
|| [istarget ia64-*-*]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok]
|| ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian]) } {
set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
}
......@@ -5591,7 +5582,7 @@ proc check_effective_target_vect_widen_shift { } {
verbose "check_effective_target_vect_widen_shift: using cached result" 2
} else {
set et_vect_widen_shift_saved($et_index) 0
if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
if { [is-effective-target arm_neon] } {
set et_vect_widen_shift_saved($et_index) 1
}
}
......@@ -6145,7 +6136,7 @@ proc check_effective_target_vect_extract_even_odd { } {
set et_vect_extract_even_odd_saved($et_index) 0
if { [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| [is-effective-target arm_neon_ok]
|| [is-effective-target arm_neon]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| [istarget ia64-*-*]
|| [istarget spu-*-*]
......@@ -6173,7 +6164,7 @@ proc check_effective_target_vect_interleave { } {
set et_vect_interleave_saved($et_index) 0
if { [istarget aarch64*-*-*]
|| [istarget powerpc*-*-*]
|| [is-effective-target arm_neon_ok]
|| [is-effective-target arm_neon]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| [istarget ia64-*-*]
|| [istarget spu-*-*]
......@@ -6227,7 +6218,7 @@ proc check_effective_target_vect_multiple_sizes { } {
set et_vect_multiple_sizes_saved($et_index) 0
if { [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
|| [is-effective-target arm_neon]
|| (([istarget i?86-*-*] || [istarget x86_64-*-*])
&& ([check_avx_available] && ![check_prefer_avx128])) } {
set et_vect_multiple_sizes_saved($et_index) 1
......@@ -6248,8 +6239,7 @@ proc check_effective_target_vect64 { } {
verbose "check_effective_target_vect64: using cached result" 2
} else {
set et_vect64_saved($et_index) 0
if { ([istarget arm*-*-*]
&& [check_effective_target_arm_neon_ok]
if { ([is-effective-target arm_neon]
&& [check_effective_target_arm_little_endian])
|| [istarget aarch64*-*-*]
|| [istarget sparc*-*-*] } {
......@@ -8274,7 +8264,7 @@ proc check_effective_target_builtin_eh_return { } {
# Return 1 if the target supports max reduction for vectors.
proc check_effective_target_vect_max_reduc { } {
if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
return 1
}
return 0
......
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