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lvzhengyang
riscv-gcc-1
Commits
0da9afa6
Commit
0da9afa6
authored
Aug 08, 2000
by
Nick Clifton
Committed by
Nick Clifton
Aug 08, 2000
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Fix most compile time warning messages
From-SVN: r35559
parent
94260abd
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3 changed files
with
50 additions
and
44 deletions
+50
-44
gcc/ChangeLog
+4
-1
gcc/config/mips/mips-protos.h
+1
-0
gcc/config/mips/mips.c
+45
-43
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gcc/ChangeLog
View file @
0da9afa6
2000-08-07 Nick Clifton <nickc@cygnus.com>
2000-08-07 Nick Clifton <nickc@redhat.com>
* config/mips/mips.c: Fix compile time warning messages.
* config/mips/mips-protos.h: Add prototype for equality_op.
* mn10300.h (TARGET_SWITCHES): Document `-mam33'.
...
...
gcc/config/mips/mips-protos.h
View file @
0da9afa6
...
...
@@ -96,6 +96,7 @@ extern int reg_or_0_operand PARAMS ((rtx, enum machine_mode));
extern
int
true_reg_or_0_operand
PARAMS
((
rtx
,
enum
machine_mode
));
extern
int
simple_memory_operand
PARAMS
((
rtx
,
enum
machine_mode
));
extern
int
double_memory_operand
PARAMS
((
rtx
,
enum
machine_mode
));
extern
int
equality_op
PARAMS
((
rtx
,
enum
machine_mode
));
extern
int
small_int
PARAMS
((
rtx
,
enum
machine_mode
));
extern
int
uns_arith_operand
PARAMS
((
rtx
,
enum
machine_mode
));
extern
struct
rtx_def
*
embedded_pic_offset
PARAMS
((
rtx
));
...
...
gcc/config/mips/mips.c
View file @
0da9afa6
...
...
@@ -692,7 +692,7 @@ mips16_simple_memory_operand (reg, offset, mode)
off
=
0x100
;
else
off
=
0x20
;
if
(
INTVAL
(
offset
)
>=
0
&&
INTVAL
(
offset
)
<
off
*
size
)
if
(
INTVAL
(
offset
)
>=
0
&&
INTVAL
(
offset
)
<
(
HOST_WIDE_INT
)(
off
*
size
)
)
return
1
;
return
0
;
}
...
...
@@ -715,7 +715,7 @@ simple_memory_operand (op, mode)
/* ??? This isn't strictly correct. It is OK to accept multiword modes
here, since the length attributes are being set correctly, but only
if the address is offsettable. LO_SUM is not offsettable. */
if
(
GET_MODE_SIZE
(
GET_MODE
(
op
))
>
UNITS_PER_WORD
)
if
(
GET_MODE_SIZE
(
GET_MODE
(
op
))
>
(
unsigned
)
UNITS_PER_WORD
)
return
0
;
/* Decode the address now. */
...
...
@@ -868,7 +868,7 @@ double_memory_operand (op, mode)
address will get reloaded anyhow. */
if
(
GET_CODE
(
addr
)
==
PLUS
&&
GET_CODE
(
XEXP
(
addr
,
0
))
==
REG
&&
(
REGNO
(
XEXP
(
addr
,
0
))
==
HARD_FRAME_POINTER_REGNUM
&&
(
REGNO
(
XEXP
(
addr
,
0
))
==
(
unsigned
)
HARD_FRAME_POINTER_REGNUM
||
REGNO
(
XEXP
(
addr
,
0
))
==
STACK_POINTER_REGNUM
)
&&
((
GET_CODE
(
XEXP
(
addr
,
1
))
==
CONST_INT
&&
!
SMALL_INT
(
XEXP
(
addr
,
1
)))
...
...
@@ -885,7 +885,7 @@ double_memory_operand (op, mode)
maddr
=
XEXP
(
addr
,
0
);
if
(
GET_CODE
(
maddr
)
==
PLUS
&&
GET_CODE
(
XEXP
(
maddr
,
0
))
==
REG
&&
(
REGNO
(
XEXP
(
maddr
,
0
))
==
HARD_FRAME_POINTER_REGNUM
&&
(
REGNO
(
XEXP
(
maddr
,
0
))
==
(
unsigned
)
HARD_FRAME_POINTER_REGNUM
||
REGNO
(
XEXP
(
maddr
,
0
))
==
STACK_POINTER_REGNUM
)
&&
((
GET_CODE
(
XEXP
(
maddr
,
1
))
==
CONST_INT
&&
!
SMALL_INT
(
XEXP
(
maddr
,
1
)))
...
...
@@ -905,7 +905,7 @@ double_memory_operand (op, mode)
addr
=
XEXP
(
XEXP
(
addr
,
0
),
0
);
if
(
GET_CODE
(
addr
)
==
PLUS
&&
GET_CODE
(
XEXP
(
addr
,
0
))
==
REG
&&
(
REGNO
(
XEXP
(
addr
,
0
))
==
HARD_FRAME_POINTER_REGNUM
&&
(
REGNO
(
XEXP
(
addr
,
0
))
==
(
unsigned
)
HARD_FRAME_POINTER_REGNUM
||
REGNO
(
XEXP
(
addr
,
0
))
==
STACK_POINTER_REGNUM
)
&&
((
GET_CODE
(
XEXP
(
addr
,
1
))
==
CONST_INT
&&
!
SMALL_INT
(
XEXP
(
addr
,
1
)))
...
...
@@ -1199,7 +1199,7 @@ mips_check_split (address, mode)
{
/* ??? This is the same check used in simple_memory_operand.
We use it here because LO_SUM is not offsettable. */
if
(
GET_MODE_SIZE
(
mode
)
>
UNITS_PER_WORD
)
if
(
GET_MODE_SIZE
(
mode
)
>
(
unsigned
)
UNITS_PER_WORD
)
return
0
;
if
((
GET_CODE
(
address
)
==
SYMBOL_REF
&&
!
SYMBOL_REF_FLAG
(
address
))
...
...
@@ -1619,7 +1619,7 @@ mips_fill_delay_slot (ret, type, operands, cur_insn)
dslots_number_nops
=
num_nops
;
mips_load_reg
=
set_reg
;
if
(
GET_MODE_SIZE
(
mode
)
>
(
FP_REG_P
(
REGNO
(
set_reg
))
?
UNITS_PER_FPREG
:
UNITS_PER_WORD
))
>
(
unsigned
)
(
FP_REG_P
(
REGNO
(
set_reg
))
?
UNITS_PER_FPREG
:
UNITS_PER_WORD
))
mips_load_reg2
=
gen_rtx_REG
(
SImode
,
REGNO
(
set_reg
)
+
1
);
else
mips_load_reg2
=
0
;
...
...
@@ -3183,7 +3183,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src)
rtx
bytes_rtx
;
int
leftover
;
if
(
bytes
<
2
*
MAX_MOVE_BYTES
)
if
(
bytes
<
2
U
*
MAX_MOVE_BYTES
)
abort
();
leftover
=
bytes
%
MAX_MOVE_BYTES
;
...
...
@@ -3250,7 +3250,7 @@ block_move_call (dest_reg, src_reg, bytes_rtx)
/* We want to pass the size as Pmode, which will normally be SImode
but will be DImode if we are using 64 bit longs and pointers. */
if
(
GET_MODE
(
bytes_rtx
)
!=
VOIDmode
&&
GET_MODE
(
bytes_rtx
)
!=
Pmode
)
&&
GET_MODE
(
bytes_rtx
)
!=
(
unsigned
)
Pmode
)
bytes_rtx
=
convert_to_mode
(
Pmode
,
bytes_rtx
,
1
);
#ifdef TARGET_MEM_FUNCTIONS
...
...
@@ -3292,7 +3292,7 @@ expand_block_move (operands)
if
(
constp
&&
bytes
==
0
)
return
;
if
(
align
>
UNITS_PER_WORD
)
if
(
align
>
(
unsigned
)
UNITS_PER_WORD
)
align
=
UNITS_PER_WORD
;
/* Move the address into scratch registers. */
...
...
@@ -3302,18 +3302,18 @@ expand_block_move (operands)
if
(
TARGET_MEMCPY
)
block_move_call
(
dest_reg
,
src_reg
,
bytes_rtx
);
else
if
(
constp
&&
bytes
<=
2
*
MAX_MOVE_BYTES
&&
align
==
UNITS_PER_WORD
)
else
if
(
constp
&&
bytes
<=
2
U
*
MAX_MOVE_BYTES
&&
align
==
(
unsigned
)
UNITS_PER_WORD
)
move_by_pieces
(
orig_dest
,
orig_src
,
bytes
,
align
*
BITS_PER_WORD
);
else
if
(
constp
&&
bytes
<=
2
*
MAX_MOVE_BYTES
)
else
if
(
constp
&&
bytes
<=
2
U
*
MAX_MOVE_BYTES
)
emit_insn
(
gen_movstrsi_internal
(
change_address
(
orig_dest
,
BLKmode
,
dest_reg
),
change_address
(
orig_src
,
BLKmode
,
src_reg
),
bytes_rtx
,
align_rtx
));
else
if
(
constp
&&
align
>=
UNITS_PER_WORD
&&
optimize
)
else
if
(
constp
&&
align
>=
(
unsigned
)
UNITS_PER_WORD
&&
optimize
)
block_move_loop
(
dest_reg
,
src_reg
,
bytes
,
align
,
orig_dest
,
orig_src
);
else
if
(
constp
&&
optimize
)
...
...
@@ -3857,7 +3857,7 @@ function_arg (cum, mode, type, named)
rtx
ret
;
int
regbase
=
-
1
;
int
bias
=
0
;
int
*
arg_words
=
&
cum
->
arg_words
;
unsigned
int
*
arg_words
=
&
cum
->
arg_words
;
int
struct_p
=
(
type
!=
0
&&
(
TREE_CODE
(
type
)
==
RECORD_TYPE
||
TREE_CODE
(
type
)
==
UNION_TYPE
...
...
@@ -3938,7 +3938,7 @@ function_arg (cum, mode, type, named)
/* Drops through. */
case
BLKmode
:
if
(
type
!=
NULL_TREE
&&
TYPE_ALIGN
(
type
)
>
BITS_PER_WORD
if
(
type
!=
NULL_TREE
&&
TYPE_ALIGN
(
type
)
>
(
unsigned
)
BITS_PER_WORD
&&
!
TARGET_64BIT
&&
mips_abi
!=
ABI_EABI
)
cum
->
arg_words
+=
(
cum
->
arg_words
&
1
);
regbase
=
GP_ARG_FIRST
;
...
...
@@ -3957,7 +3957,7 @@ function_arg (cum, mode, type, named)
regbase
=
GP_ARG_FIRST
;
}
if
(
*
arg_words
>=
MAX_ARGS_IN_REGISTERS
)
if
(
*
arg_words
>=
(
unsigned
)
MAX_ARGS_IN_REGISTERS
)
{
if
(
TARGET_DEBUG_E_MODE
)
fprintf
(
stderr
,
"<stack>%s
\n
"
,
struct_p
?
", [struct]"
:
""
);
...
...
@@ -4007,7 +4007,7 @@ function_arg (cum, mode, type, named)
chunks
=
tree_low_cst
(
TYPE_SIZE_UNIT
(
type
),
1
)
/
UNITS_PER_WORD
;
if
(
chunks
+
*
arg_words
+
bias
>
MAX_ARGS_IN_REGISTERS
)
if
(
chunks
+
*
arg_words
+
bias
>
(
unsigned
)
MAX_ARGS_IN_REGISTERS
)
chunks
=
MAX_ARGS_IN_REGISTERS
-
*
arg_words
-
bias
;
/* assign_parms checks the mode of ENTRY_PARM, so we must
...
...
@@ -4110,7 +4110,7 @@ function_arg_partial_nregs (cum, mode, type, named)
if
((
mode
==
BLKmode
||
GET_MODE_CLASS
(
mode
)
!=
MODE_COMPLEX_INT
||
GET_MODE_CLASS
(
mode
)
!=
MODE_COMPLEX_FLOAT
)
&&
cum
->
arg_words
<
MAX_ARGS_IN_REGISTERS
&&
cum
->
arg_words
<
(
unsigned
)
MAX_ARGS_IN_REGISTERS
&&
mips_abi
!=
ABI_EABI
)
{
int
words
;
...
...
@@ -4120,7 +4120,7 @@ function_arg_partial_nregs (cum, mode, type, named)
else
words
=
(
GET_MODE_SIZE
(
mode
)
+
UNITS_PER_WORD
-
1
)
/
UNITS_PER_WORD
;
if
(
words
+
cum
->
arg_words
<=
MAX_ARGS_IN_REGISTERS
)
if
(
words
+
cum
->
arg_words
<=
(
unsigned
)
MAX_ARGS_IN_REGISTERS
)
return
0
;
/* structure fits in registers */
if
(
TARGET_DEBUG_E_MODE
)
...
...
@@ -4130,7 +4130,7 @@ function_arg_partial_nregs (cum, mode, type, named)
return
MAX_ARGS_IN_REGISTERS
-
cum
->
arg_words
;
}
else
if
(
mode
==
DImode
&&
cum
->
arg_words
==
MAX_ARGS_IN_REGISTERS
-
1
else
if
(
mode
==
DImode
&&
cum
->
arg_words
==
MAX_ARGS_IN_REGISTERS
-
1U
&&
!
TARGET_64BIT
&&
mips_abi
!=
ABI_EABI
)
{
if
(
TARGET_DEBUG_E_MODE
)
...
...
@@ -4638,7 +4638,7 @@ override_options ()
user. */
#ifdef TARGET_DEFAULT
if
(
TARGET_SINGLE_FLOAT
&&
TARGET_SOFT_FLOAT
)
target_flags
&=
~
(
TARGET_DEFAULT
&
(
MASK_SOFT_FLOAT
|
MASK_SINGLE_FLOAT
));
target_flags
&=
~
(
(
TARGET_DEFAULT
)
&
(
MASK_SOFT_FLOAT
|
MASK_SINGLE_FLOAT
));
#endif
/* Get the architectural level. */
...
...
@@ -4755,10 +4755,10 @@ override_options ()
mips_cpu_string
=
MIPS_CPU_STRING_DEFAULT
;
#endif
/* Identify the processor type */
/* Identify the processor type
.
*/
if
(
mips_cpu_string
==
0
||
!
strcmp
(
mips_cpu_string
,
"default"
)
||
!
strcmp
(
mips_cpu_string
,
"DEFAULT"
))
||
!
strcmp
(
mips_cpu_string
,
"default"
)
||
!
strcmp
(
mips_cpu_string
,
"DEFAULT"
))
{
switch
(
mips_isa
)
{
...
...
@@ -4780,7 +4780,6 @@ override_options ()
break
;
}
}
else
{
const
char
*
p
=
mips_cpu_string
;
...
...
@@ -6419,7 +6418,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
&&
GET_MODE
(
base_reg_rtx
)
==
SImode
)
{
insn
=
emit_move_insn
(
base_reg_rtx
,
GEN_INT
(
gp_offset
&
0xffff0000
));
GEN_INT
(
gp_offset
&
0xffff0000
U
));
if
(
store_p
)
RTX_FRAME_RELATED_P
(
insn
)
=
1
;
insn
...
...
@@ -6637,7 +6636,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
&&
GET_MODE
(
base_reg_rtx
)
==
SImode
)
{
insn
=
emit_move_insn
(
base_reg_rtx
,
GEN_INT
(
fp_offset
&
0xffff0000
));
GEN_INT
(
fp_offset
&
0xffff0000
U
));
if
(
store_p
)
RTX_FRAME_RELATED_P
(
insn
)
=
1
;
insn
=
emit_insn
(
gen_iorsi3
(
base_reg_rtx
,
base_reg_rtx
,
...
...
@@ -6839,9 +6838,9 @@ function_prologue (file, size)
dest
=
SET_DEST
(
set
);
if
(
GET_CODE
(
dest
)
!=
MEM
)
continue
;
if
(
GET_MODE_SIZE
(
GET_MODE
(
dest
))
==
UNITS_PER_WORD
)
if
(
GET_MODE_SIZE
(
GET_MODE
(
dest
))
==
(
unsigned
)
UNITS_PER_WORD
)
;
else
if
(
GET_MODE_SIZE
(
GET_MODE
(
dest
))
==
2
*
UNITS_PER_WORD
else
if
(
GET_MODE_SIZE
(
GET_MODE
(
dest
))
==
2
U
*
UNITS_PER_WORD
&&
REGNO
(
src
)
<
GP_REG_FIRST
+
7
)
;
else
...
...
@@ -6851,11 +6850,12 @@ function_prologue (file, size)
if
(
GET_CODE
(
base
)
!=
REG
||
GET_CODE
(
offset
)
!=
CONST_INT
)
continue
;
if
(
REGNO
(
base
)
==
STACK_POINTER_REGNUM
&&
INTVAL
(
offset
)
==
tsize
+
(
REGNO
(
src
)
-
4
)
*
UNITS_PER_WORD
)
if
(
REGNO
(
base
)
==
(
unsigned
)
STACK_POINTER_REGNUM
&&
(
unsigned
HOST_WIDE_INT
)
INTVAL
(
offset
)
==
tsize
+
(
REGNO
(
src
)
-
4
)
*
UNITS_PER_WORD
)
;
else
if
(
REGNO
(
base
)
==
HARD_FRAME_POINTER_REGNUM
&&
(
INTVAL
(
offset
)
else
if
(
REGNO
(
base
)
==
(
unsigned
)
HARD_FRAME_POINTER_REGNUM
&&
(
(
unsigned
HOST_WIDE_INT
)
INTVAL
(
offset
)
==
(
tsize
+
(
REGNO
(
src
)
-
4
)
*
UNITS_PER_WORD
-
current_function_outgoing_args_size
)))
...
...
@@ -7179,7 +7179,7 @@ mips_expand_prologue ()
&&
GET_MODE
(
tmp_rtx
)
==
SImode
)
{
insn
=
emit_move_insn
(
tmp_rtx
,
GEN_INT
(
tsize
&
0xffff0000
));
GEN_INT
(
tsize
&
0xffff0000
U
));
RTX_FRAME_RELATED_P
(
insn
)
=
1
;
insn
=
emit_insn
(
gen_iorsi3
(
tmp_rtx
,
tmp_rtx
,
GEN_INT
(
tsize
&
0x0000ffff
)));
...
...
@@ -7298,7 +7298,7 @@ mips_expand_prologue ()
/* Do any necessary cleanup after a function to restore stack, frame,
and regs. */
#define RA_MASK ((
long) 0x80000000
)
/* 1 << 31 */
#define RA_MASK ((
unsigned long) 0x80000000U
)
/* 1 << 31 */
#define PIC_OFFSET_TABLE_MASK (1 << (PIC_OFFSET_TABLE_REGNUM - GP_REG_FIRST))
void
...
...
@@ -7580,7 +7580,7 @@ mips_select_rtx_section (mode, x)
/* For hosted applications, always put constants in small data if
possible, as this gives the best performance. */
if
(
GET_MODE_SIZE
(
mode
)
<=
mips_section_threshold
if
(
GET_MODE_SIZE
(
mode
)
<=
(
unsigned
)
mips_section_threshold
&&
mips_section_threshold
>
0
)
SMALL_DATA_SECTION
();
else
if
(
flag_pic
&&
symbolic_expression_p
(
x
))
...
...
@@ -7800,7 +7800,6 @@ function_arg_pass_by_reference (cum, mode, type, named)
return
1
;
}
/* Otherwise, we only do this if EABI is selected. */
if
(
mips_abi
!=
ABI_EABI
)
return
0
;
...
...
@@ -8145,7 +8144,10 @@ mips16_constant (x, mode, addr, addend)
knows how to handle this. We can always accept a string
constant, which is the other case in which SYMBOL_REF_FLAG
will be set. */
if
(
!
addr
&&
!
addend
&&
SYMBOL_REF_FLAG
(
x
)
&&
mode
==
Pmode
)
if
(
!
addr
&&
!
addend
&&
SYMBOL_REF_FLAG
(
x
)
&&
mode
==
(
enum
machine_mode
)
Pmode
)
return
1
;
/* We can accept a string constant, which will have
...
...
@@ -8716,14 +8718,14 @@ mips16_optimize_gp (first)
&&
GET_CODE
(
XEXP
(
SET_SRC
(
set
),
0
))
==
REG
&&
REGNO
(
XEXP
(
SET_SRC
(
set
),
0
))
==
GP_REG_FIRST
+
28
&&
GET_CODE
(
SET_DEST
(
set
))
==
REG
&&
GET_MODE
(
SET_DEST
(
set
))
==
Pmode
)
&&
GET_MODE
(
SET_DEST
(
set
))
==
(
unsigned
)
Pmode
)
gpcopy
=
SET_DEST
(
set
);
else
if
(
slot
==
NULL_RTX
&&
gpcopy
!=
NULL_RTX
&&
GET_CODE
(
SET_DEST
(
set
))
==
MEM
&&
GET_CODE
(
SET_SRC
(
set
))
==
REG
&&
REGNO
(
SET_SRC
(
set
))
==
REGNO
(
gpcopy
)
&&
GET_MODE
(
SET_DEST
(
set
))
==
Pmode
)
&&
GET_MODE
(
SET_DEST
(
set
))
==
(
unsigned
)
Pmode
)
{
rtx
base
,
offset
;
...
...
@@ -8740,7 +8742,7 @@ mips16_optimize_gp (first)
&&
reg_overlap_mentioned_p
(
SET_DEST
(
set
),
gpcopy
)
&&
(
GET_CODE
(
SET_DEST
(
set
))
!=
REG
||
REGNO
(
SET_DEST
(
set
))
!=
REGNO
(
gpcopy
)
||
GET_MODE
(
SET_DEST
(
set
))
!=
Pmode
||
GET_MODE
(
SET_DEST
(
set
))
!=
(
unsigned
)
Pmode
||
((
GET_CODE
(
SET_SRC
(
set
))
!=
CONST
||
GET_CODE
(
XEXP
(
SET_SRC
(
set
),
0
))
!=
REG
||
(
REGNO
(
XEXP
(
SET_SRC
(
set
),
0
))
...
...
@@ -8859,7 +8861,7 @@ mips16_optimize_gp (first)
set
=
PATTERN
(
insn
);
if
(
GET_CODE
(
set
)
!=
SET
||
GET_MODE
(
SET_DEST
(
set
))
!=
Pmode
)
||
GET_MODE
(
SET_DEST
(
set
))
!=
(
unsigned
)
Pmode
)
continue
;
if
(
GET_CODE
(
SET_DEST
(
set
))
==
MEM
...
...
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