/* verilog_memcomp Version: p1.0.7-EAC */
/* common_memcomp Version: p1.0.0-EAC */
/* lang compiler Version: 4.8.2-EAC Sep 10 2015 14:35:29 */
//
// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC.
//
// Copyright (c) 1993 - 2021 ARM Physical IP, Inc. All Rights Reserved.
//
// Use of this Software is subject to the terms and conditions of the
// applicable license agreement with ARM Physical IP, Inc.
// In addition, this Software is protected by patents, copyright law
// and international treaties.
//
// The copyright notice(s) in this Software does not indicate actual or
// intended publication of this Software.
//
// Verilog model for Synchronous Two-Port Register File
//
// Instance Name: rf_2p_hsc_256x64_nogating
// Words: 256
// Bits: 64
// Mux: 2
// Drive: 6
// Write Mask: Off
// Write Thru: Off
// Extra Margin Adjustment: On
// Redundany: Off
// Test Muxes Off
// Power Gating: Off
// Retention: On
// Pipeline: Off
// Read Disturb Test: Off
//
// Creation Date: Wed Dec 1 12:53:20 2021
// Version: r0p0
//
// Modeling Assumptions: This model supports full gate level simulation
// including proper x-handling and timing check behavior. Unit
// delay timing is included in the model. Back-annotation of SDF
// (v3.0 or v2.1) is supported. SDF can be created utilyzing the delay
// calculation views provided with this generator and supported
// delay calculators. All buses are modeled [MSB:LSB]. All
// ports are padded with Verilog primitives.
//
// Modeling Limitations: None.
//
// Known Bugs: None.
//
// Known Work Arounds: N/A
//
`timescale 1 ns/1 ps
`define ARM_MEM_PROP 1.000
`define ARM_MEM_RETAIN 1.000
`define ARM_MEM_PERIOD 3.000
`define ARM_MEM_WIDTH 1.000
`define ARM_MEM_SETUP 1.000
`define ARM_MEM_HOLD 0.500
`define ARM_MEM_COLLISION 3.000
module datapath_latch_rf_2p_hsc_256x64_nogating (CLK,Q_update,SE,SI,D,DFTRAMBYP,mem_path,XQ,Q);
input CLK,Q_update,SE,SI,D,DFTRAMBYP,mem_path,XQ;
output Q;
reg D_int;
reg Q;
// Model PHI2 portion
always @(CLK or SE or SI or D) begin
if (CLK === 1'b0) begin
if (SE===1'b1)
D_int=SI;
else if (SE===1'bx)
D_int=1'bx;
else
D_int=D;
end
end
// model output side of RAM latch
always @(posedge Q_update or posedge XQ) begin
if (XQ===1'b0) begin
if (DFTRAMBYP===1'b1)
Q=D_int;
else
Q=mem_path;
end
else
Q=1'bx;
end
endmodule // datapath_latch_rf_2p_hsc_256x64_nogating
// If ARM_UD_MODEL is defined at Simulator Command Line, it Selects the Fast Functional Model
`ifdef ARM_UD_MODEL
// Following parameter Values can be overridden at Simulator Command Line.
// ARM_UD_DP Defines the delay through Data Paths, for Memory Models it represents BIST MUX output delays.
`ifdef ARM_UD_DP
`else
`define ARM_UD_DP #0.001
`endif
// ARM_UD_CP Defines the delay through Clock Path Cells, for Memory Models it is not used.
`ifdef ARM_UD_CP
`else
`define ARM_UD_CP
`endif
// ARM_UD_SEQ Defines the delay through the Memory, for Memory Models it is used for CLK->Q delays.
`ifdef ARM_UD_SEQ
`else
`define ARM_UD_SEQ #0.01
`endif
`celldefine
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
module rf_2p_hsc_256x64_nogating (VDDCE, VDDPE, VSSE, QA, CLKA, CENA, AA, CLKB, CENB,
AB, DB, STOV, EMAA, EMASA, EMAB, RET1N);
`else
module rf_2p_hsc_256x64_nogating (QA, CLKA, CENA, AA, CLKB, CENB, AB, DB, STOV, EMAA,
EMASA, EMAB, RET1N);
`endif
parameter ASSERT_PREFIX = "";
parameter BITS = 64;
parameter WORDS = 256;
parameter MUX = 2;
parameter MEM_WIDTH = 128; // redun block size 2, 64 on left, 64 on right
parameter MEM_HEIGHT = 128;
parameter WP_SIZE = 64 ;
parameter UPM_WIDTH = 3;
parameter UPMW_WIDTH = 0;
parameter UPMS_WIDTH = 1;
parameter ROWS = 128;
output [63:0] QA;
input CLKA;
input CENA;
input [7:0] AA;
input CLKB;
input CENB;
input [7:0] AB;
input [63:0] DB;
input STOV;
input [2:0] EMAA;
input EMASA;
input [2:0] EMAB;
input RET1N;
`ifdef POWER_PINS
inout VDDCE;
inout VDDPE;
inout VSSE;
`endif
`ifdef POWER_PINS
reg bad_VDDCE;
reg bad_VDDPE;
reg bad_VSSE;
reg bad_power;
`endif
wire corrupt_power;
reg pre_charge_st;
reg pre_charge_st_a;
reg pre_charge_st_b;
integer row_address;
integer mux_address;
initial row_address = 0;
initial mux_address = 0;
reg [127:0] mem [0:127];
reg [127:0] row, row_t;
reg LAST_CLKA;
reg [127:0] row_mask;
reg [127:0] new_data;
reg [127:0] data_out;
reg [63:0] readLatch0;
reg [63:0] shifted_readLatch0;
reg [63:0] readLatch1;
reg [63:0] shifted_readLatch1;
reg LAST_CLKB;
wire [63:0] QA_int;
reg XQA, QA_update;
reg [63:0] mem_path;
reg XDB_sh, DB_sh_update;
wire [63:0] DB_int_bmux;
reg [63:0] writeEnable;
real previous_CLKA;
real previous_CLKB;
initial previous_CLKA = 0;
initial previous_CLKB = 0;
reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC;
reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1;
reg cont_flag0_int;
reg cont_flag1_int;
initial cont_flag0_int = 1'b0;
initial cont_flag1_int = 1'b0;
reg clk0_int;
reg clk1_int;
wire [63:0] QA_;
wire CLKA_;
wire CENA_;
reg CENA_int;
reg CENA_p2;
wire [7:0] AA_;
reg [7:0] AA_int;
wire CLKB_;
wire CENB_;
reg CENB_int;
reg CENB_p2;
wire [7:0] AB_;
reg [7:0] AB_int;
wire [63:0] DB_;
reg [63:0] DB_int;
reg [63:0] XDB_int;
wire STOV_;
reg STOV_int;
wire [2:0] EMAA_;
reg [2:0] EMAA_int;
wire EMASA_;
reg EMASA_int;
wire [2:0] EMAB_;
reg [2:0] EMAB_int;
wire RET1N_;
reg RET1N_int;
assign QA[0] = QA_[0];
assign QA[1] = QA_[1];
assign QA[2] = QA_[2];
assign QA[3] = QA_[3];
assign QA[4] = QA_[4];
assign QA[5] = QA_[5];
assign QA[6] = QA_[6];
assign QA[7] = QA_[7];
assign QA[8] = QA_[8];
assign QA[9] = QA_[9];
assign QA[10] = QA_[10];
assign QA[11] = QA_[11];
assign QA[12] = QA_[12];
assign QA[13] = QA_[13];
assign QA[14] = QA_[14];
assign QA[15] = QA_[15];
assign QA[16] = QA_[16];
assign QA[17] = QA_[17];
assign QA[18] = QA_[18];
assign QA[19] = QA_[19];
assign QA[20] = QA_[20];
assign QA[21] = QA_[21];
assign QA[22] = QA_[22];
assign QA[23] = QA_[23];
assign QA[24] = QA_[24];
assign QA[25] = QA_[25];
assign QA[26] = QA_[26];
assign QA[27] = QA_[27];
assign QA[28] = QA_[28];
assign QA[29] = QA_[29];
assign QA[30] = QA_[30];
assign QA[31] = QA_[31];
assign QA[32] = QA_[32];
assign QA[33] = QA_[33];
assign QA[34] = QA_[34];
assign QA[35] = QA_[35];
assign QA[36] = QA_[36];
assign QA[37] = QA_[37];
assign QA[38] = QA_[38];
assign QA[39] = QA_[39];
assign QA[40] = QA_[40];
assign QA[41] = QA_[41];
assign QA[42] = QA_[42];
assign QA[43] = QA_[43];
assign QA[44] = QA_[44];
assign QA[45] = QA_[45];
assign QA[46] = QA_[46];
assign QA[47] = QA_[47];
assign QA[48] = QA_[48];
assign QA[49] = QA_[49];
assign QA[50] = QA_[50];
assign QA[51] = QA_[51];
assign QA[52] = QA_[52];
assign QA[53] = QA_[53];
assign QA[54] = QA_[54];
assign QA[55] = QA_[55];
assign QA[56] = QA_[56];
assign QA[57] = QA_[57];
assign QA[58] = QA_[58];
assign QA[59] = QA_[59];
assign QA[60] = QA_[60];
assign QA[61] = QA_[61];
assign QA[62] = QA_[62];
assign QA[63] = QA_[63];
assign CLKA_ = CLKA;
assign CENA_ = CENA;
assign AA_[0] = AA[0];
assign AA_[1] = AA[1];
assign AA_[2] = AA[2];
assign AA_[3] = AA[3];
assign AA_[4] = AA[4];
assign AA_[5] = AA[5];
assign AA_[6] = AA[6];
assign AA_[7] = AA[7];
assign CLKB_ = CLKB;
assign CENB_ = CENB;
assign AB_[0] = AB[0];
assign AB_[1] = AB[1];
assign AB_[2] = AB[2];
assign AB_[3] = AB[3];
assign AB_[4] = AB[4];
assign AB_[5] = AB[5];
assign AB_[6] = AB[6];
assign AB_[7] = AB[7];
assign DB_[0] = DB[0];
assign DB_[1] = DB[1];
assign DB_[2] = DB[2];
assign DB_[3] = DB[3];
assign DB_[4] = DB[4];
assign DB_[5] = DB[5];
assign DB_[6] = DB[6];
assign DB_[7] = DB[7];
assign DB_[8] = DB[8];
assign DB_[9] = DB[9];
assign DB_[10] = DB[10];
assign DB_[11] = DB[11];
assign DB_[12] = DB[12];
assign DB_[13] = DB[13];
assign DB_[14] = DB[14];
assign DB_[15] = DB[15];
assign DB_[16] = DB[16];
assign DB_[17] = DB[17];
assign DB_[18] = DB[18];
assign DB_[19] = DB[19];
assign DB_[20] = DB[20];
assign DB_[21] = DB[21];
assign DB_[22] = DB[22];
assign DB_[23] = DB[23];
assign DB_[24] = DB[24];
assign DB_[25] = DB[25];
assign DB_[26] = DB[26];
assign DB_[27] = DB[27];
assign DB_[28] = DB[28];
assign DB_[29] = DB[29];
assign DB_[30] = DB[30];
assign DB_[31] = DB[31];
assign DB_[32] = DB[32];
assign DB_[33] = DB[33];
assign DB_[34] = DB[34];
assign DB_[35] = DB[35];
assign DB_[36] = DB[36];
assign DB_[37] = DB[37];
assign DB_[38] = DB[38];
assign DB_[39] = DB[39];
assign DB_[40] = DB[40];
assign DB_[41] = DB[41];
assign DB_[42] = DB[42];
assign DB_[43] = DB[43];
assign DB_[44] = DB[44];
assign DB_[45] = DB[45];
assign DB_[46] = DB[46];
assign DB_[47] = DB[47];
assign DB_[48] = DB[48];
assign DB_[49] = DB[49];
assign DB_[50] = DB[50];
assign DB_[51] = DB[51];
assign DB_[52] = DB[52];
assign DB_[53] = DB[53];
assign DB_[54] = DB[54];
assign DB_[55] = DB[55];
assign DB_[56] = DB[56];
assign DB_[57] = DB[57];
assign DB_[58] = DB[58];
assign DB_[59] = DB[59];
assign DB_[60] = DB[60];
assign DB_[61] = DB[61];
assign DB_[62] = DB[62];
assign DB_[63] = DB[63];
assign STOV_ = STOV;
assign EMAA_[0] = EMAA[0];
assign EMAA_[1] = EMAA[1];
assign EMAA_[2] = EMAA[2];
assign EMASA_ = EMASA;
assign EMAB_[0] = EMAB[0];
assign EMAB_[1] = EMAB[1];
assign EMAB_[2] = EMAB[2];
assign RET1N_ = RET1N;
`ifdef POWER_PINS
assign corrupt_power = bad_power;
`else
assign corrupt_power = 1'b0;
`endif
`ifdef ARM_FAULT_MODELING
rf_2p_hsc_256x64_nogating_error_injection u1(.CLK(CLKA_), .Q_out(QA_), .A(AA_int), .CEN(CENA_int), .Q_in(QA_int));
`else
assign `ARM_UD_SEQ QA_ = (RET1N_ | pre_charge_st) & ~corrupt_power ? ((QA_int)) : {64{1'bx}};
`endif
// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS.
`ifdef INITIALIZE_MEMORY
integer i;
initial
begin
#0;
for (i = 0; i < MEM_HEIGHT; i = i + 1)
mem[i] = {MEM_WIDTH{1'b0}};
end
`endif
always @ (EMAA_) begin
if(EMAA_ < 2)
$display("Warning: Set Value for EMAA doesn't match Default value 2 in %m at %0t", $time);
end
always @ (EMASA_) begin
if(EMASA_ < 0)
$display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time);
end
always @ (EMAB_) begin
if(EMAB_ < 2)
$display("Warning: Set Value for EMAB doesn't match Default value 2 in %m at %0t", $time);
end
task failedWrite;
input port_f;
integer i;
begin
for (i = 0; i < MEM_HEIGHT; i = i + 1)
mem[i] = {MEM_WIDTH{1'bx}};
end
endtask
function isBitX;
input bitval;
begin
isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0;
end
endfunction
task loadmem;
input [1000*8-1:0] filename;
reg [BITS-1:0] memld [0:WORDS-1];
integer i;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
$readmemb(filename, memld);
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
for (i=0;i<WORDS;i=i+1) begin
wordtemp = memld[i];
Atemp = i;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61],
1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57],
1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53],
1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49],
1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45],
1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41],
1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37],
1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33],
1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29],
1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25],
1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21],
1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17],
1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13],
1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9],
1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5],
1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1],
1'b0, wordtemp[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
end
endtask
task dumpmem;
input [1000*8-1:0] filename_dump;
integer i, dump_file_desc;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
dump_file_desc = $fopen(filename_dump);
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
for (i=0;i<WORDS;i=i+1) begin
Atemp = i;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
$fdisplay(dump_file_desc, "%b", mem_path);
end
end
$fclose(dump_file_desc);
end
endtask
task loadaddr;
input [7:0] load_addr;
input [63:0] load_data;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
wordtemp = load_data;
Atemp = load_addr;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61],
1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57],
1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53],
1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49],
1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45],
1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41],
1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37],
1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33],
1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29],
1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25],
1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21],
1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17],
1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13],
1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9],
1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5],
1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1],
1'b0, wordtemp[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
endtask
task dumpaddr;
output [63:0] dump_data;
input [7:0] dump_addr;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
Atemp = dump_addr;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
dump_data = mem_path;
end
end
endtask
task ReadA;
begin
if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0 && CENA_int === 1'b0) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0) begin
// no cycle in retention mode
end else if (^{(EMAA_int), (EMASA_int)} === 1'bx) begin
if(isBitX(EMASA_int)) begin
XQA = 1'b1; QA_update = 1'b1;
end
if(isBitX(EMAA_int)) begin
XQA = 1'b1; QA_update = 1'b1;
end
end else if (^{CENA_int, (STOV_int && !CENA_int), RET1N_int} === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if ((AA_int >= WORDS) && (CENA_int === 1'b0)) begin
XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1;
end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (CENA_int === 1'b0) begin
mux_address = (AA_int & 1'b1);
row_address = (AA_int >> 1);
if (row_address > 127)
row = {128{1'bx}};
else
row = mem[row_address];
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
end
end
endtask
task WriteB;
begin
if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0 && CENB_int === 1'b0) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0) begin
// no cycle in retention mode
end else if (^{(EMAB_int)} === 1'bx) begin
if(isBitX(EMAB_int)) begin
failedWrite(1);
end
end else if (^{CENB_int, (STOV_int && !CENB_int), RET1N_int} === 1'bx) begin
failedWrite(1);
end else if ((AB_int >= WORDS) && (CENB_int === 1'b0)) begin
end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx) begin
failedWrite(1);
end else if (CENB_int === 1'b0) begin
mux_address = (AB_int & 1'b1);
row_address = (AB_int >> 1);
if (row_address > 127)
row = {128{1'bx}};
else
row = mem[row_address];
writeEnable = ~ {64{CENB_int}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60],
1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55],
1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50],
1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45],
1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40],
1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35],
1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30],
1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25],
1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20],
1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15],
1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10],
1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5],
1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
endtask
always @ (CENA_ or CLKA_) begin
if(CLKA_ == 1'b0) begin
CENA_p2 = CENA_;
end
end
`ifdef POWER_PINS
always @ (VDDCE) begin
if (VDDCE != 1'b1) begin
if (VDDPE == 1'b1) begin
$display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time);
end
$display("In PowerDown Mode in %m at %0t", $time);
failedWrite(0);
end
if (VDDCE == 1'b1) begin
if (VDDPE == 1'b1) begin
$display("VDDPE should be powered up after VDDCE in %m at %0t", $time);
$display("Illegal power up sequencing in %m at %0t", $time);
end
failedWrite(0);
end
end
`endif
`ifdef POWER_PINS
always @ (RET1N_ or VDDPE or VDDCE or VSSE) begin
`else
always @ RET1N_ begin
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || CLKA_ === 1'bx)) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end
`else
`endif
`ifdef POWER_PINS
`else
pre_charge_st_a = 0;
pre_charge_st = 0;
`endif
if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b0 && CENA_p2 === 1'b0 ) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b1 && CENA_p2 === 1'b0 ) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Illegal value for VDDPE %b in %m at %0t", VDDPE, $time);
failedWrite(0);
end else if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin
pre_charge_st_a = 1;
pre_charge_st = 1;
end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
pre_charge_st_a = 0;
pre_charge_st = 0;
if (VDDCE != 1'b1) begin
failedWrite(0);
end
`else
if (RET1N_ == 1'b0) begin
`endif
XQA = 1'b1; QA_update = 1'b1;
CENA_int = 1'bx;
AA_int = {8{1'bx}};
STOV_int = 1'bx;
EMAA_int = {3{1'bx}};
EMASA_int = 1'bx;
RET1N_int = 1'bx;
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin
pre_charge_st_a = 0;
pre_charge_st = 0;
end else begin
pre_charge_st_a = 0;
pre_charge_st = 0;
`else
end else begin
`endif
#0;
XQA = 1'b1; QA_update = 1'b1;
CENA_int = 1'bx;
AA_int = {8{1'bx}};
STOV_int = 1'bx;
EMAA_int = {3{1'bx}};
EMASA_int = 1'bx;
RET1N_int = 1'bx;
end
#0;
RET1N_int = RET1N_;
QA_update = 1'b0;
end
always @ CLKA_ begin
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
if (VDDCE === 1'bx || VDDCE === 1'bz)
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
if (VDDPE === 1'bx || VDDPE === 1'bz)
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
if (VSSE === 1'bx || VSSE === 1'bz)
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
end else if (VSSE !== 1'b0) begin
`endif
// no cycle in retention mode
end else begin
if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
`ifdef POWER_PINS
end else if ((VDDCE === 1'bx || VDDCE === 1'bz)) begin
XQA = 1'b0; QA_update = 1'b0;
`endif
end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin
XQA = 1'b0; QA_update = 1'b0;
end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
end else begin
CENA_int = CENA_;
STOV_int = STOV_;
EMAA_int = EMAA_;
EMASA_int = EMASA_;
RET1N_int = RET1N_;
if (CENA_int != 1'b1) begin
AA_int = AA_;
end
clk0_int = 1'b0;
CENA_int = CENA_;
STOV_int = STOV_;
EMAA_int = EMAA_;
EMASA_int = EMASA_;
RET1N_int = RET1N_;
if (CENA_int != 1'b1) begin
AA_int = AA_;
end
clk0_int = 1'b0;
ReadA;
if (CENA_int === 1'b0) previous_CLKA = $realtime;
#0;
if (((previous_CLKA == previous_CLKB) || ((STOV_int==1'b1 || STOV_int==1'b1) && CLKA_ == 1'b1 && CLKB_ == 1'b1)) && (CENA_int !== 1'b1 && CENB_int
!== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end
end
end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin
QA_update = 1'b0;
XQA = 1'b0;
end
end
LAST_CLKA = CLKA_;
end
datapath_latch_rf_2p_hsc_256x64_nogating uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(1'b0), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(1'b0), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(1'b0), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(1'b0), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(1'b0), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(1'b0), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(1'b0), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(1'b0), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(1'b0), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(1'b0), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(1'b0), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(1'b0), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(1'b0), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(1'b0), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(1'b0), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(1'b0), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(1'b0), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[18]), .D(QA_int[18]), .DFTRAMBYP(1'b0), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[19]), .D(QA_int[19]), .DFTRAMBYP(1'b0), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA19 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[20]), .D(QA_int[20]), .DFTRAMBYP(1'b0), .mem_path(mem_path[19]), .XQ(XQA), .Q(QA_int[19]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA20 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[21]), .D(QA_int[21]), .DFTRAMBYP(1'b0), .mem_path(mem_path[20]), .XQ(XQA), .Q(QA_int[20]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA21 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[22]), .D(QA_int[22]), .DFTRAMBYP(1'b0), .mem_path(mem_path[21]), .XQ(XQA), .Q(QA_int[21]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA22 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[23]), .D(QA_int[23]), .DFTRAMBYP(1'b0), .mem_path(mem_path[22]), .XQ(XQA), .Q(QA_int[22]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA23 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[24]), .D(QA_int[24]), .DFTRAMBYP(1'b0), .mem_path(mem_path[23]), .XQ(XQA), .Q(QA_int[23]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA24 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[25]), .D(QA_int[25]), .DFTRAMBYP(1'b0), .mem_path(mem_path[24]), .XQ(XQA), .Q(QA_int[24]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA25 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[26]), .D(QA_int[26]), .DFTRAMBYP(1'b0), .mem_path(mem_path[25]), .XQ(XQA), .Q(QA_int[25]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA26 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[27]), .D(QA_int[27]), .DFTRAMBYP(1'b0), .mem_path(mem_path[26]), .XQ(XQA), .Q(QA_int[26]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA27 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[28]), .D(QA_int[28]), .DFTRAMBYP(1'b0), .mem_path(mem_path[27]), .XQ(XQA), .Q(QA_int[27]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA28 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[29]), .D(QA_int[29]), .DFTRAMBYP(1'b0), .mem_path(mem_path[28]), .XQ(XQA), .Q(QA_int[28]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA29 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[30]), .D(QA_int[30]), .DFTRAMBYP(1'b0), .mem_path(mem_path[29]), .XQ(XQA), .Q(QA_int[29]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA30 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[31]), .D(QA_int[31]), .DFTRAMBYP(1'b0), .mem_path(mem_path[30]), .XQ(XQA), .Q(QA_int[30]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA31 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(1'b0), .D(1'b0), .DFTRAMBYP(1'b0), .mem_path(mem_path[31]), .XQ(XQA|1'b0), .Q(QA_int[31]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA32 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(1'b0), .D(1'b0), .DFTRAMBYP(1'b0), .mem_path(mem_path[32]), .XQ(XQA|1'b0), .Q(QA_int[32]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA33 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[32]), .D(QA_int[32]), .DFTRAMBYP(1'b0), .mem_path(mem_path[33]), .XQ(XQA), .Q(QA_int[33]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA34 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[33]), .D(QA_int[33]), .DFTRAMBYP(1'b0), .mem_path(mem_path[34]), .XQ(XQA), .Q(QA_int[34]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA35 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[34]), .D(QA_int[34]), .DFTRAMBYP(1'b0), .mem_path(mem_path[35]), .XQ(XQA), .Q(QA_int[35]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA36 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[35]), .D(QA_int[35]), .DFTRAMBYP(1'b0), .mem_path(mem_path[36]), .XQ(XQA), .Q(QA_int[36]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA37 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[36]), .D(QA_int[36]), .DFTRAMBYP(1'b0), .mem_path(mem_path[37]), .XQ(XQA), .Q(QA_int[37]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA38 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[37]), .D(QA_int[37]), .DFTRAMBYP(1'b0), .mem_path(mem_path[38]), .XQ(XQA), .Q(QA_int[38]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA39 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[38]), .D(QA_int[38]), .DFTRAMBYP(1'b0), .mem_path(mem_path[39]), .XQ(XQA), .Q(QA_int[39]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA40 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[39]), .D(QA_int[39]), .DFTRAMBYP(1'b0), .mem_path(mem_path[40]), .XQ(XQA), .Q(QA_int[40]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA41 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[40]), .D(QA_int[40]), .DFTRAMBYP(1'b0), .mem_path(mem_path[41]), .XQ(XQA), .Q(QA_int[41]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA42 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[41]), .D(QA_int[41]), .DFTRAMBYP(1'b0), .mem_path(mem_path[42]), .XQ(XQA), .Q(QA_int[42]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA43 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[42]), .D(QA_int[42]), .DFTRAMBYP(1'b0), .mem_path(mem_path[43]), .XQ(XQA), .Q(QA_int[43]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA44 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[43]), .D(QA_int[43]), .DFTRAMBYP(1'b0), .mem_path(mem_path[44]), .XQ(XQA), .Q(QA_int[44]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA45 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[44]), .D(QA_int[44]), .DFTRAMBYP(1'b0), .mem_path(mem_path[45]), .XQ(XQA), .Q(QA_int[45]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA46 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[45]), .D(QA_int[45]), .DFTRAMBYP(1'b0), .mem_path(mem_path[46]), .XQ(XQA), .Q(QA_int[46]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA47 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[46]), .D(QA_int[46]), .DFTRAMBYP(1'b0), .mem_path(mem_path[47]), .XQ(XQA), .Q(QA_int[47]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA48 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[47]), .D(QA_int[47]), .DFTRAMBYP(1'b0), .mem_path(mem_path[48]), .XQ(XQA), .Q(QA_int[48]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA49 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[48]), .D(QA_int[48]), .DFTRAMBYP(1'b0), .mem_path(mem_path[49]), .XQ(XQA), .Q(QA_int[49]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA50 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[49]), .D(QA_int[49]), .DFTRAMBYP(1'b0), .mem_path(mem_path[50]), .XQ(XQA), .Q(QA_int[50]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA51 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[50]), .D(QA_int[50]), .DFTRAMBYP(1'b0), .mem_path(mem_path[51]), .XQ(XQA), .Q(QA_int[51]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA52 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[51]), .D(QA_int[51]), .DFTRAMBYP(1'b0), .mem_path(mem_path[52]), .XQ(XQA), .Q(QA_int[52]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA53 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[52]), .D(QA_int[52]), .DFTRAMBYP(1'b0), .mem_path(mem_path[53]), .XQ(XQA), .Q(QA_int[53]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA54 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[53]), .D(QA_int[53]), .DFTRAMBYP(1'b0), .mem_path(mem_path[54]), .XQ(XQA), .Q(QA_int[54]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA55 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[54]), .D(QA_int[54]), .DFTRAMBYP(1'b0), .mem_path(mem_path[55]), .XQ(XQA), .Q(QA_int[55]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA56 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[55]), .D(QA_int[55]), .DFTRAMBYP(1'b0), .mem_path(mem_path[56]), .XQ(XQA), .Q(QA_int[56]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA57 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[56]), .D(QA_int[56]), .DFTRAMBYP(1'b0), .mem_path(mem_path[57]), .XQ(XQA), .Q(QA_int[57]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA58 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[57]), .D(QA_int[57]), .DFTRAMBYP(1'b0), .mem_path(mem_path[58]), .XQ(XQA), .Q(QA_int[58]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA59 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[58]), .D(QA_int[58]), .DFTRAMBYP(1'b0), .mem_path(mem_path[59]), .XQ(XQA), .Q(QA_int[59]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA60 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[59]), .D(QA_int[59]), .DFTRAMBYP(1'b0), .mem_path(mem_path[60]), .XQ(XQA), .Q(QA_int[60]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA61 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[60]), .D(QA_int[60]), .DFTRAMBYP(1'b0), .mem_path(mem_path[61]), .XQ(XQA), .Q(QA_int[61]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA62 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[61]), .D(QA_int[61]), .DFTRAMBYP(1'b0), .mem_path(mem_path[62]), .XQ(XQA), .Q(QA_int[62]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA63 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[62]), .D(QA_int[62]), .DFTRAMBYP(1'b0), .mem_path(mem_path[63]), .XQ(XQA), .Q(QA_int[63]));
always @ (CENB_ or CLKB_) begin
if(CLKB_ == 1'b0) begin
CENB_p2 = CENB_;
end
end
`ifdef POWER_PINS
always @ (RET1N_ or VDDPE or VDDCE or VSSE) begin
`else
always @ RET1N_ begin
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || CLKB_ === 1'bx)) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end
`else
`endif
`ifdef POWER_PINS
`else
pre_charge_st_b = 0;
pre_charge_st = 0;
`endif
if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b0 && CENB_p2 === 1'b0 ) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b1 && CENB_p2 === 1'b0 ) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Illegal value for VDDPE %b in %m at %0t", VDDPE, $time);
failedWrite(1);
end else if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin
pre_charge_st_b = 1;
pre_charge_st = 1;
end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
pre_charge_st_b = 0;
pre_charge_st = 0;
if (VDDCE != 1'b1) begin
failedWrite(1);
end
`else
if (RET1N_ == 1'b0) begin
`endif
CENB_int = 1'bx;
AB_int = {8{1'bx}};
DB_int = {64{1'bx}};
STOV_int = 1'bx;
EMAB_int = {3{1'bx}};
RET1N_int = 1'bx;
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin
pre_charge_st_b = 0;
pre_charge_st = 0;
end else begin
pre_charge_st_b = 0;
pre_charge_st = 0;
`else
end else begin
`endif
#0;
CENB_int = 1'bx;
AB_int = {8{1'bx}};
DB_int = {64{1'bx}};
STOV_int = 1'bx;
EMAB_int = {3{1'bx}};
RET1N_int = 1'bx;
end
#0;
RET1N_int = RET1N_;
QA_update = 1'b0;
DB_sh_update = 1'b0;
end
always @ CLKB_ begin
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
if (VDDCE === 1'bx || VDDCE === 1'bz)
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
if (VDDPE === 1'bx || VDDPE === 1'bz)
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
if (VSSE === 1'bx || VSSE === 1'bz)
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
end else if (VSSE !== 1'b0) begin
`endif
// no cycle in retention mode
end else begin
if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin
failedWrite(0);
DB_sh_update = 1'b1; XDB_sh = 1'b1;
`ifdef POWER_PINS
end else if ((VDDCE === 1'bx || VDDCE === 1'bz)) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
`endif
end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
XDB_int = {64{1'b0}};
end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin
if (RET1N_ == 1'b0) begin
end else begin
CENB_int = CENB_;
STOV_int = STOV_;
EMAB_int = EMAB_;
RET1N_int = RET1N_;
if (CENB_int != 1'b1) begin
AB_int = AB_;
DB_int = DB_;
end
clk1_int = 1'b0;
CENB_int = CENB_;
STOV_int = STOV_;
EMAB_int = EMAB_;
RET1N_int = RET1N_;
if (CENB_int != 1'b1) begin
AB_int = AB_;
DB_int = DB_;
end
clk1_int = 1'b0;
WriteB;
if (CENB_int === 1'b0) previous_CLKB = $realtime;
#0;
if (((previous_CLKA == previous_CLKB) || ((STOV_int==1'b1 || STOV_int==1'b1) && CLKA_ == 1'b1 && CLKB_ == 1'b1)) && (CENA_int !== 1'b1 && CENB_int
!== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end
end
end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
end
end
LAST_CLKB = CLKB_;
end
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
always @ (VDDCE or VDDPE or VSSE) begin
if (VDDCE === 1'bx || VDDCE === 1'bz) begin
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VDDCE = 1'b1;
end else begin
bad_VDDCE = 1'b0;
end
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VDDPE = 1'b1;
end else begin
bad_VDDPE = 1'b0;
end
if (VSSE !== 1'b0) begin
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VSSE = 1'b1;
end else begin
bad_VSSE = 1'b0;
end
bad_power = bad_VDDCE | bad_VDDPE | bad_VSSE ;
end
`endif
function row_contention;
input [7:0] aa;
input [7:0] ab;
input wena;
input wenb;
reg result;
reg sameRow;
reg sameMux;
reg anyWrite;
begin
anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1;
sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0;
if (aa[7:1] == ab[7:1]) begin
sameRow = 1'b1;
end else begin
sameRow = 1'b0;
end
if (sameRow == 1'b1 && anyWrite == 1'b1)
row_contention = 1'b1;
else if (sameRow == 1'b1 && sameMux == 1'b1)
row_contention = 1'b1;
else
row_contention = 1'b0;
end
endfunction
function col_contention;
input [7:0] aa;
input [7:0] ab;
begin
if (aa[0:0] == ab[0:0])
col_contention = 1'b1;
else
col_contention = 1'b0;
end
endfunction
function is_contention;
input [7:0] aa;
input [7:0] ab;
input wena;
input wenb;
reg result;
begin
if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin
result = 1'b0;
end else if (aa == ab) begin
result = 1'b1;
end else begin
result = 1'b0;
end
is_contention = result;
end
endfunction
endmodule
`endcelldefine
`else
// If ARM_NEG_MODEL is defined at Simulator Command Line, it Selects the NEGATIVE Model
`ifdef ARM_NEG_MODEL
`celldefine
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
module rf_2p_hsc_256x64_nogating (VDDCE, VDDPE, VSSE, QA, CLKA, CENA, AA, CLKB, CENB,
AB, DB, STOV, EMAA, EMASA, EMAB, RET1N);
`else
module rf_2p_hsc_256x64_nogating (QA, CLKA, CENA, AA, CLKB, CENB, AB, DB, STOV, EMAA,
EMASA, EMAB, RET1N);
`endif
parameter ASSERT_PREFIX = "";
parameter BITS = 64;
parameter WORDS = 256;
parameter MUX = 2;
parameter MEM_WIDTH = 128; // redun block size 2, 64 on left, 64 on right
parameter MEM_HEIGHT = 128;
parameter WP_SIZE = 64 ;
parameter UPM_WIDTH = 3;
parameter UPMW_WIDTH = 0;
parameter UPMS_WIDTH = 1;
parameter ROWS = 128;
output [63:0] QA;
input CLKA;
input CENA;
input [7:0] AA;
input CLKB;
input CENB;
input [7:0] AB;
input [63:0] DB;
input STOV;
input [2:0] EMAA;
input EMASA;
input [2:0] EMAB;
input RET1N;
`ifdef POWER_PINS
inout VDDCE;
inout VDDPE;
inout VSSE;
`endif
`ifdef POWER_PINS
reg bad_VDDCE;
reg bad_VDDPE;
reg bad_VSSE;
reg bad_power;
`endif
wire corrupt_power;
reg pre_charge_st;
reg pre_charge_st_a;
reg pre_charge_st_b;
integer row_address;
integer mux_address;
initial row_address = 0;
initial mux_address = 0;
reg [127:0] mem [0:127];
reg [127:0] row, row_t;
reg LAST_CLKA;
reg [127:0] row_mask;
reg [127:0] new_data;
reg [127:0] data_out;
reg [63:0] readLatch0;
reg [63:0] shifted_readLatch0;
reg [63:0] readLatch1;
reg [63:0] shifted_readLatch1;
reg LAST_CLKB;
wire [63:0] QA_int;
reg XQA, QA_update;
reg [63:0] mem_path;
reg XDB_sh, DB_sh_update;
wire [63:0] DB_int_bmux;
reg [63:0] writeEnable;
real previous_CLKA;
real previous_CLKB;
initial previous_CLKA = 0;
initial previous_CLKB = 0;
reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC;
reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1;
reg cont_flag0_int;
reg cont_flag1_int;
initial cont_flag0_int = 1'b0;
initial cont_flag1_int = 1'b0;
reg NOT_CENA, NOT_AA7, NOT_AA6, NOT_AA5, NOT_AA4, NOT_AA3, NOT_AA2, NOT_AA1, NOT_AA0;
reg NOT_CENB, NOT_AB7, NOT_AB6, NOT_AB5, NOT_AB4, NOT_AB3, NOT_AB2, NOT_AB1, NOT_AB0;
reg NOT_DB63, NOT_DB62, NOT_DB61, NOT_DB60, NOT_DB59, NOT_DB58, NOT_DB57, NOT_DB56;
reg NOT_DB55, NOT_DB54, NOT_DB53, NOT_DB52, NOT_DB51, NOT_DB50, NOT_DB49, NOT_DB48;
reg NOT_DB47, NOT_DB46, NOT_DB45, NOT_DB44, NOT_DB43, NOT_DB42, NOT_DB41, NOT_DB40;
reg NOT_DB39, NOT_DB38, NOT_DB37, NOT_DB36, NOT_DB35, NOT_DB34, NOT_DB33, NOT_DB32;
reg NOT_DB31, NOT_DB30, NOT_DB29, NOT_DB28, NOT_DB27, NOT_DB26, NOT_DB25, NOT_DB24;
reg NOT_DB23, NOT_DB22, NOT_DB21, NOT_DB20, NOT_DB19, NOT_DB18, NOT_DB17, NOT_DB16;
reg NOT_DB15, NOT_DB14, NOT_DB13, NOT_DB12, NOT_DB11, NOT_DB10, NOT_DB9, NOT_DB8;
reg NOT_DB7, NOT_DB6, NOT_DB5, NOT_DB4, NOT_DB3, NOT_DB2, NOT_DB1, NOT_DB0, NOT_STOV;
reg NOT_EMAA2, NOT_EMAA1, NOT_EMAA0, NOT_EMASA, NOT_EMAB2, NOT_EMAB1, NOT_EMAB0;
reg NOT_RET1N;
reg NOT_CONTA, NOT_CLKA_PER, NOT_CLKA_MINH, NOT_CLKA_MINL, NOT_CONTB, NOT_CLKB_PER;
reg NOT_CLKB_MINH, NOT_CLKB_MINL;
reg clk0_int;
reg clk1_int;
wire [63:0] QA_;
wire CLKA_;
wire dCLKA;
wire CENA_;
wire dCENA;
reg CENA_int;
reg CENA_p2;
wire [7:0] AA_;
wire [7:0] dAA;
reg [7:0] AA_int;
wire CLKB_;
wire dCLKB;
wire CENB_;
wire dCENB;
reg CENB_int;
reg CENB_p2;
wire [7:0] AB_;
wire [7:0] dAB;
reg [7:0] AB_int;
wire [63:0] DB_;
wire [63:0] dDB;
reg [63:0] DB_int;
reg [63:0] XDB_int;
wire STOV_;
wire dSTOV;
reg STOV_int;
wire [2:0] EMAA_;
wire [2:0] dEMAA;
reg [2:0] EMAA_int;
wire EMASA_;
wire dEMASA;
reg EMASA_int;
wire [2:0] EMAB_;
wire [2:0] dEMAB;
reg [2:0] EMAB_int;
wire RET1N_;
wire dRET1N;
reg RET1N_int;
buf B0(QA[0], QA_[0]);
buf B1(QA[1], QA_[1]);
buf B2(QA[2], QA_[2]);
buf B3(QA[3], QA_[3]);
buf B4(QA[4], QA_[4]);
buf B5(QA[5], QA_[5]);
buf B6(QA[6], QA_[6]);
buf B7(QA[7], QA_[7]);
buf B8(QA[8], QA_[8]);
buf B9(QA[9], QA_[9]);
buf B10(QA[10], QA_[10]);
buf B11(QA[11], QA_[11]);
buf B12(QA[12], QA_[12]);
buf B13(QA[13], QA_[13]);
buf B14(QA[14], QA_[14]);
buf B15(QA[15], QA_[15]);
buf B16(QA[16], QA_[16]);
buf B17(QA[17], QA_[17]);
buf B18(QA[18], QA_[18]);
buf B19(QA[19], QA_[19]);
buf B20(QA[20], QA_[20]);
buf B21(QA[21], QA_[21]);
buf B22(QA[22], QA_[22]);
buf B23(QA[23], QA_[23]);
buf B24(QA[24], QA_[24]);
buf B25(QA[25], QA_[25]);
buf B26(QA[26], QA_[26]);
buf B27(QA[27], QA_[27]);
buf B28(QA[28], QA_[28]);
buf B29(QA[29], QA_[29]);
buf B30(QA[30], QA_[30]);
buf B31(QA[31], QA_[31]);
buf B32(QA[32], QA_[32]);
buf B33(QA[33], QA_[33]);
buf B34(QA[34], QA_[34]);
buf B35(QA[35], QA_[35]);
buf B36(QA[36], QA_[36]);
buf B37(QA[37], QA_[37]);
buf B38(QA[38], QA_[38]);
buf B39(QA[39], QA_[39]);
buf B40(QA[40], QA_[40]);
buf B41(QA[41], QA_[41]);
buf B42(QA[42], QA_[42]);
buf B43(QA[43], QA_[43]);
buf B44(QA[44], QA_[44]);
buf B45(QA[45], QA_[45]);
buf B46(QA[46], QA_[46]);
buf B47(QA[47], QA_[47]);
buf B48(QA[48], QA_[48]);
buf B49(QA[49], QA_[49]);
buf B50(QA[50], QA_[50]);
buf B51(QA[51], QA_[51]);
buf B52(QA[52], QA_[52]);
buf B53(QA[53], QA_[53]);
buf B54(QA[54], QA_[54]);
buf B55(QA[55], QA_[55]);
buf B56(QA[56], QA_[56]);
buf B57(QA[57], QA_[57]);
buf B58(QA[58], QA_[58]);
buf B59(QA[59], QA_[59]);
buf B60(QA[60], QA_[60]);
buf B61(QA[61], QA_[61]);
buf B62(QA[62], QA_[62]);
buf B63(QA[63], QA_[63]);
buf B64(CLKA_, dCLKA);
buf B65(CENA_, dCENA);
buf B66(AA_[0],dAA[0]);
buf B67(AA_[1],dAA[1]);
buf B68(AA_[2],dAA[2]);
buf B69(AA_[3],dAA[3]);
buf B70(AA_[4],dAA[4]);
buf B71(AA_[5],dAA[5]);
buf B72(AA_[6],dAA[6]);
buf B73(AA_[7],dAA[7]);
buf B74(CLKB_, dCLKB);
buf B75(CENB_, dCENB);
buf B76(AB_[0],dAB[0]);
buf B77(AB_[1],dAB[1]);
buf B78(AB_[2],dAB[2]);
buf B79(AB_[3],dAB[3]);
buf B80(AB_[4],dAB[4]);
buf B81(AB_[5],dAB[5]);
buf B82(AB_[6],dAB[6]);
buf B83(AB_[7],dAB[7]);
buf B84(DB_[0],dDB[0]);
buf B85(DB_[1],dDB[1]);
buf B86(DB_[2],dDB[2]);
buf B87(DB_[3],dDB[3]);
buf B88(DB_[4],dDB[4]);
buf B89(DB_[5],dDB[5]);
buf B90(DB_[6],dDB[6]);
buf B91(DB_[7],dDB[7]);
buf B92(DB_[8],dDB[8]);
buf B93(DB_[9],dDB[9]);
buf B94(DB_[10],dDB[10]);
buf B95(DB_[11],dDB[11]);
buf B96(DB_[12],dDB[12]);
buf B97(DB_[13],dDB[13]);
buf B98(DB_[14],dDB[14]);
buf B99(DB_[15],dDB[15]);
buf B100(DB_[16],dDB[16]);
buf B101(DB_[17],dDB[17]);
buf B102(DB_[18],dDB[18]);
buf B103(DB_[19],dDB[19]);
buf B104(DB_[20],dDB[20]);
buf B105(DB_[21],dDB[21]);
buf B106(DB_[22],dDB[22]);
buf B107(DB_[23],dDB[23]);
buf B108(DB_[24],dDB[24]);
buf B109(DB_[25],dDB[25]);
buf B110(DB_[26],dDB[26]);
buf B111(DB_[27],dDB[27]);
buf B112(DB_[28],dDB[28]);
buf B113(DB_[29],dDB[29]);
buf B114(DB_[30],dDB[30]);
buf B115(DB_[31],dDB[31]);
buf B116(DB_[32],dDB[32]);
buf B117(DB_[33],dDB[33]);
buf B118(DB_[34],dDB[34]);
buf B119(DB_[35],dDB[35]);
buf B120(DB_[36],dDB[36]);
buf B121(DB_[37],dDB[37]);
buf B122(DB_[38],dDB[38]);
buf B123(DB_[39],dDB[39]);
buf B124(DB_[40],dDB[40]);
buf B125(DB_[41],dDB[41]);
buf B126(DB_[42],dDB[42]);
buf B127(DB_[43],dDB[43]);
buf B128(DB_[44],dDB[44]);
buf B129(DB_[45],dDB[45]);
buf B130(DB_[46],dDB[46]);
buf B131(DB_[47],dDB[47]);
buf B132(DB_[48],dDB[48]);
buf B133(DB_[49],dDB[49]);
buf B134(DB_[50],dDB[50]);
buf B135(DB_[51],dDB[51]);
buf B136(DB_[52],dDB[52]);
buf B137(DB_[53],dDB[53]);
buf B138(DB_[54],dDB[54]);
buf B139(DB_[55],dDB[55]);
buf B140(DB_[56],dDB[56]);
buf B141(DB_[57],dDB[57]);
buf B142(DB_[58],dDB[58]);
buf B143(DB_[59],dDB[59]);
buf B144(DB_[60],dDB[60]);
buf B145(DB_[61],dDB[61]);
buf B146(DB_[62],dDB[62]);
buf B147(DB_[63],dDB[63]);
buf B148(STOV_, dSTOV);
buf B149(EMAA_[0],dEMAA[0]);
buf B150(EMAA_[1],dEMAA[1]);
buf B151(EMAA_[2],dEMAA[2]);
buf B152(EMASA_, dEMASA);
buf B153(EMAB_[0],dEMAB[0]);
buf B154(EMAB_[1],dEMAB[1]);
buf B155(EMAB_[2],dEMAB[2]);
buf B156(RET1N_, dRET1N);
`ifdef POWER_PINS
assign corrupt_power = bad_power;
`else
assign corrupt_power = 1'b0;
`endif
assign QA_ = (RET1N_ | pre_charge_st) & ~corrupt_power ? ((QA_int)) : {64{1'bx}};
// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS.
`ifdef INITIALIZE_MEMORY
integer i;
initial
begin
#0;
for (i = 0; i < MEM_HEIGHT; i = i + 1)
mem[i] = {MEM_WIDTH{1'b0}};
end
`endif
always @ (EMAA_) begin
if(EMAA_ < 2)
$display("Warning: Set Value for EMAA doesn't match Default value 2 in %m at %0t", $time);
end
always @ (EMASA_) begin
if(EMASA_ < 0)
$display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time);
end
always @ (EMAB_) begin
if(EMAB_ < 2)
$display("Warning: Set Value for EMAB doesn't match Default value 2 in %m at %0t", $time);
end
task failedWrite;
input port_f;
integer i;
begin
for (i = 0; i < MEM_HEIGHT; i = i + 1)
mem[i] = {MEM_WIDTH{1'bx}};
end
endtask
function isBitX;
input bitval;
begin
isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0;
end
endfunction
task loadmem;
input [1000*8-1:0] filename;
reg [BITS-1:0] memld [0:WORDS-1];
integer i;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
$readmemb(filename, memld);
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
for (i=0;i<WORDS;i=i+1) begin
wordtemp = memld[i];
Atemp = i;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61],
1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57],
1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53],
1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49],
1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45],
1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41],
1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37],
1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33],
1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29],
1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25],
1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21],
1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17],
1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13],
1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9],
1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5],
1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1],
1'b0, wordtemp[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
end
endtask
task dumpmem;
input [1000*8-1:0] filename_dump;
integer i, dump_file_desc;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
dump_file_desc = $fopen(filename_dump);
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
for (i=0;i<WORDS;i=i+1) begin
Atemp = i;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
$fdisplay(dump_file_desc, "%b", mem_path);
end
end
$fclose(dump_file_desc);
end
endtask
task loadaddr;
input [7:0] load_addr;
input [63:0] load_data;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
wordtemp = load_data;
Atemp = load_addr;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61],
1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57],
1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53],
1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49],
1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45],
1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41],
1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37],
1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33],
1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29],
1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25],
1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21],
1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17],
1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13],
1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9],
1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5],
1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1],
1'b0, wordtemp[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
endtask
task dumpaddr;
output [63:0] dump_data;
input [7:0] dump_addr;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
Atemp = dump_addr;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
dump_data = mem_path;
end
end
endtask
task ReadA;
begin
if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0 && CENA_int === 1'b0) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0) begin
// no cycle in retention mode
end else if (^{(EMAA_int), (EMASA_int)} === 1'bx) begin
if(isBitX(EMASA_int)) begin
XQA = 1'b1; QA_update = 1'b1;
end
if(isBitX(EMAA_int)) begin
XQA = 1'b1; QA_update = 1'b1;
end
end else if (^{CENA_int, (STOV_int && !CENA_int), RET1N_int} === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if ((AA_int >= WORDS) && (CENA_int === 1'b0)) begin
XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1;
end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (CENA_int === 1'b0) begin
mux_address = (AA_int & 1'b1);
row_address = (AA_int >> 1);
if (row_address > 127)
row = {128{1'bx}};
else
row = mem[row_address];
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
end
end
endtask
task WriteB;
begin
if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0 && CENB_int === 1'b0) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0) begin
// no cycle in retention mode
end else if (^{(EMAB_int)} === 1'bx) begin
if(isBitX(EMAB_int)) begin
failedWrite(1);
end
end else if (^{CENB_int, (STOV_int && !CENB_int), RET1N_int} === 1'bx) begin
failedWrite(1);
end else if ((AB_int >= WORDS) && (CENB_int === 1'b0)) begin
end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx) begin
failedWrite(1);
end else if (CENB_int === 1'b0) begin
mux_address = (AB_int & 1'b1);
row_address = (AB_int >> 1);
if (row_address > 127)
row = {128{1'bx}};
else
row = mem[row_address];
writeEnable = ~ {64{CENB_int}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60],
1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55],
1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50],
1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45],
1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40],
1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35],
1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30],
1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25],
1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20],
1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15],
1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10],
1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5],
1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
endtask
always @ (CENA_ or CLKA_) begin
if(CLKA_ == 1'b0) begin
CENA_p2 = CENA_;
end
end
`ifdef POWER_PINS
always @ (VDDCE) begin
if (VDDCE != 1'b1) begin
if (VDDPE == 1'b1) begin
$display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time);
end
$display("In PowerDown Mode in %m at %0t", $time);
failedWrite(0);
end
if (VDDCE == 1'b1) begin
if (VDDPE == 1'b1) begin
$display("VDDPE should be powered up after VDDCE in %m at %0t", $time);
$display("Illegal power up sequencing in %m at %0t", $time);
end
failedWrite(0);
end
end
`endif
`ifdef POWER_PINS
always @ (RET1N_ or VDDPE or VDDCE or VSSE) begin
`else
always @ RET1N_ begin
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || CLKA_ === 1'bx)) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end
`else
`endif
`ifdef POWER_PINS
`else
pre_charge_st_a = 0;
pre_charge_st = 0;
`endif
if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b0 && CENA_p2 === 1'b0 ) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b1 && CENA_p2 === 1'b0 ) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Illegal value for VDDPE %b in %m at %0t", VDDPE, $time);
failedWrite(0);
end else if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin
pre_charge_st_a = 1;
pre_charge_st = 1;
end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
pre_charge_st_a = 0;
pre_charge_st = 0;
if (VDDCE != 1'b1) begin
failedWrite(0);
end
`else
if (RET1N_ == 1'b0) begin
`endif
XQA = 1'b1; QA_update = 1'b1;
CENA_int = 1'bx;
AA_int = {8{1'bx}};
STOV_int = 1'bx;
EMAA_int = {3{1'bx}};
EMASA_int = 1'bx;
RET1N_int = 1'bx;
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin
pre_charge_st_a = 0;
pre_charge_st = 0;
end else begin
pre_charge_st_a = 0;
pre_charge_st = 0;
`else
end else begin
`endif
#0;
XQA = 1'b1; QA_update = 1'b1;
CENA_int = 1'bx;
AA_int = {8{1'bx}};
STOV_int = 1'bx;
EMAA_int = {3{1'bx}};
EMASA_int = 1'bx;
RET1N_int = 1'bx;
end
#0;
RET1N_int = RET1N_;
QA_update = 1'b0;
end
always @ CLKA_ begin
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
if (VDDCE === 1'bx || VDDCE === 1'bz)
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
if (VDDPE === 1'bx || VDDPE === 1'bz)
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
if (VSSE === 1'bx || VSSE === 1'bz)
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
end else if (VSSE !== 1'b0) begin
`endif
// no cycle in retention mode
end else begin
if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
`ifdef POWER_PINS
end else if ((VDDCE === 1'bx || VDDCE === 1'bz)) begin
XQA = 1'b0; QA_update = 1'b0;
`endif
end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin
XQA = 1'b0; QA_update = 1'b0;
end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
end else begin
CENA_int = CENA_;
STOV_int = STOV_;
EMAA_int = EMAA_;
EMASA_int = EMASA_;
RET1N_int = RET1N_;
if (CENA_int != 1'b1) begin
AA_int = AA_;
end
clk0_int = 1'b0;
CENA_int = CENA_;
STOV_int = STOV_;
EMAA_int = EMAA_;
EMASA_int = EMASA_;
RET1N_int = RET1N_;
if (CENA_int != 1'b1) begin
AA_int = AA_;
end
clk0_int = 1'b0;
ReadA;
if (CENA_int === 1'b0) previous_CLKA = $realtime;
#0;
if (((previous_CLKA == previous_CLKB) || ((STOV_int==1'b1 || STOV_int==1'b1) && CLKA_ == 1'b1 && CLKB_ == 1'b1)) && (CENA_int !== 1'b1 && CENB_int
!== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end
end
end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin
QA_update = 1'b0;
XQA = 1'b0;
end
end
LAST_CLKA = CLKA_;
end
reg globalNotifier0;
initial globalNotifier0 = 1'b0;
initial cont_flag0_int = 1'b0;
always @ globalNotifier0 begin
if ($realtime == 0) begin
end else if (CENA_int === 1'bx || RET1N_int === 1'bx || (STOV_int && !CENA_int) === 1'bx ||
clk0_int === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (cont_flag0_int === 1'bx && (CENA_int !== 1'b1 && CENB_int !== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
cont_flag0_int = 1'b0;
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end else begin
#0;
ReadA;
end
#0;
QA_update = 1'b0;
globalNotifier0 = 1'b0;
end
datapath_latch_rf_2p_hsc_256x64_nogating uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(1'b0), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(1'b0), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(1'b0), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(1'b0), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(1'b0), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(1'b0), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(1'b0), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(1'b0), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(1'b0), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(1'b0), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(1'b0), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(1'b0), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(1'b0), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(1'b0), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(1'b0), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(1'b0), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(1'b0), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[18]), .D(QA_int[18]), .DFTRAMBYP(1'b0), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[19]), .D(QA_int[19]), .DFTRAMBYP(1'b0), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA19 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[20]), .D(QA_int[20]), .DFTRAMBYP(1'b0), .mem_path(mem_path[19]), .XQ(XQA), .Q(QA_int[19]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA20 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[21]), .D(QA_int[21]), .DFTRAMBYP(1'b0), .mem_path(mem_path[20]), .XQ(XQA), .Q(QA_int[20]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA21 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[22]), .D(QA_int[22]), .DFTRAMBYP(1'b0), .mem_path(mem_path[21]), .XQ(XQA), .Q(QA_int[21]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA22 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[23]), .D(QA_int[23]), .DFTRAMBYP(1'b0), .mem_path(mem_path[22]), .XQ(XQA), .Q(QA_int[22]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA23 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[24]), .D(QA_int[24]), .DFTRAMBYP(1'b0), .mem_path(mem_path[23]), .XQ(XQA), .Q(QA_int[23]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA24 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[25]), .D(QA_int[25]), .DFTRAMBYP(1'b0), .mem_path(mem_path[24]), .XQ(XQA), .Q(QA_int[24]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA25 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[26]), .D(QA_int[26]), .DFTRAMBYP(1'b0), .mem_path(mem_path[25]), .XQ(XQA), .Q(QA_int[25]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA26 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[27]), .D(QA_int[27]), .DFTRAMBYP(1'b0), .mem_path(mem_path[26]), .XQ(XQA), .Q(QA_int[26]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA27 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[28]), .D(QA_int[28]), .DFTRAMBYP(1'b0), .mem_path(mem_path[27]), .XQ(XQA), .Q(QA_int[27]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA28 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[29]), .D(QA_int[29]), .DFTRAMBYP(1'b0), .mem_path(mem_path[28]), .XQ(XQA), .Q(QA_int[28]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA29 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[30]), .D(QA_int[30]), .DFTRAMBYP(1'b0), .mem_path(mem_path[29]), .XQ(XQA), .Q(QA_int[29]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA30 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[31]), .D(QA_int[31]), .DFTRAMBYP(1'b0), .mem_path(mem_path[30]), .XQ(XQA), .Q(QA_int[30]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA31 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(1'b0), .D(1'b0), .DFTRAMBYP(1'b0), .mem_path(mem_path[31]), .XQ(XQA|1'b0), .Q(QA_int[31]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA32 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(1'b0), .D(1'b0), .DFTRAMBYP(1'b0), .mem_path(mem_path[32]), .XQ(XQA|1'b0), .Q(QA_int[32]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA33 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[32]), .D(QA_int[32]), .DFTRAMBYP(1'b0), .mem_path(mem_path[33]), .XQ(XQA), .Q(QA_int[33]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA34 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[33]), .D(QA_int[33]), .DFTRAMBYP(1'b0), .mem_path(mem_path[34]), .XQ(XQA), .Q(QA_int[34]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA35 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[34]), .D(QA_int[34]), .DFTRAMBYP(1'b0), .mem_path(mem_path[35]), .XQ(XQA), .Q(QA_int[35]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA36 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[35]), .D(QA_int[35]), .DFTRAMBYP(1'b0), .mem_path(mem_path[36]), .XQ(XQA), .Q(QA_int[36]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA37 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[36]), .D(QA_int[36]), .DFTRAMBYP(1'b0), .mem_path(mem_path[37]), .XQ(XQA), .Q(QA_int[37]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA38 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[37]), .D(QA_int[37]), .DFTRAMBYP(1'b0), .mem_path(mem_path[38]), .XQ(XQA), .Q(QA_int[38]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA39 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[38]), .D(QA_int[38]), .DFTRAMBYP(1'b0), .mem_path(mem_path[39]), .XQ(XQA), .Q(QA_int[39]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA40 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[39]), .D(QA_int[39]), .DFTRAMBYP(1'b0), .mem_path(mem_path[40]), .XQ(XQA), .Q(QA_int[40]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA41 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[40]), .D(QA_int[40]), .DFTRAMBYP(1'b0), .mem_path(mem_path[41]), .XQ(XQA), .Q(QA_int[41]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA42 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[41]), .D(QA_int[41]), .DFTRAMBYP(1'b0), .mem_path(mem_path[42]), .XQ(XQA), .Q(QA_int[42]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA43 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[42]), .D(QA_int[42]), .DFTRAMBYP(1'b0), .mem_path(mem_path[43]), .XQ(XQA), .Q(QA_int[43]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA44 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[43]), .D(QA_int[43]), .DFTRAMBYP(1'b0), .mem_path(mem_path[44]), .XQ(XQA), .Q(QA_int[44]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA45 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[44]), .D(QA_int[44]), .DFTRAMBYP(1'b0), .mem_path(mem_path[45]), .XQ(XQA), .Q(QA_int[45]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA46 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[45]), .D(QA_int[45]), .DFTRAMBYP(1'b0), .mem_path(mem_path[46]), .XQ(XQA), .Q(QA_int[46]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA47 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[46]), .D(QA_int[46]), .DFTRAMBYP(1'b0), .mem_path(mem_path[47]), .XQ(XQA), .Q(QA_int[47]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA48 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[47]), .D(QA_int[47]), .DFTRAMBYP(1'b0), .mem_path(mem_path[48]), .XQ(XQA), .Q(QA_int[48]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA49 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[48]), .D(QA_int[48]), .DFTRAMBYP(1'b0), .mem_path(mem_path[49]), .XQ(XQA), .Q(QA_int[49]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA50 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[49]), .D(QA_int[49]), .DFTRAMBYP(1'b0), .mem_path(mem_path[50]), .XQ(XQA), .Q(QA_int[50]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA51 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[50]), .D(QA_int[50]), .DFTRAMBYP(1'b0), .mem_path(mem_path[51]), .XQ(XQA), .Q(QA_int[51]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA52 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[51]), .D(QA_int[51]), .DFTRAMBYP(1'b0), .mem_path(mem_path[52]), .XQ(XQA), .Q(QA_int[52]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA53 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[52]), .D(QA_int[52]), .DFTRAMBYP(1'b0), .mem_path(mem_path[53]), .XQ(XQA), .Q(QA_int[53]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA54 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[53]), .D(QA_int[53]), .DFTRAMBYP(1'b0), .mem_path(mem_path[54]), .XQ(XQA), .Q(QA_int[54]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA55 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[54]), .D(QA_int[54]), .DFTRAMBYP(1'b0), .mem_path(mem_path[55]), .XQ(XQA), .Q(QA_int[55]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA56 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[55]), .D(QA_int[55]), .DFTRAMBYP(1'b0), .mem_path(mem_path[56]), .XQ(XQA), .Q(QA_int[56]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA57 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[56]), .D(QA_int[56]), .DFTRAMBYP(1'b0), .mem_path(mem_path[57]), .XQ(XQA), .Q(QA_int[57]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA58 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[57]), .D(QA_int[57]), .DFTRAMBYP(1'b0), .mem_path(mem_path[58]), .XQ(XQA), .Q(QA_int[58]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA59 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[58]), .D(QA_int[58]), .DFTRAMBYP(1'b0), .mem_path(mem_path[59]), .XQ(XQA), .Q(QA_int[59]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA60 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[59]), .D(QA_int[59]), .DFTRAMBYP(1'b0), .mem_path(mem_path[60]), .XQ(XQA), .Q(QA_int[60]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA61 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[60]), .D(QA_int[60]), .DFTRAMBYP(1'b0), .mem_path(mem_path[61]), .XQ(XQA), .Q(QA_int[61]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA62 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[61]), .D(QA_int[61]), .DFTRAMBYP(1'b0), .mem_path(mem_path[62]), .XQ(XQA), .Q(QA_int[62]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA63 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[62]), .D(QA_int[62]), .DFTRAMBYP(1'b0), .mem_path(mem_path[63]), .XQ(XQA), .Q(QA_int[63]));
always @ (CENB_ or CLKB_) begin
if(CLKB_ == 1'b0) begin
CENB_p2 = CENB_;
end
end
`ifdef POWER_PINS
always @ (RET1N_ or VDDPE or VDDCE or VSSE) begin
`else
always @ RET1N_ begin
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || CLKB_ === 1'bx)) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end
`else
`endif
`ifdef POWER_PINS
`else
pre_charge_st_b = 0;
pre_charge_st = 0;
`endif
if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b0 && CENB_p2 === 1'b0 ) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b1 && CENB_p2 === 1'b0 ) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Illegal value for VDDPE %b in %m at %0t", VDDPE, $time);
failedWrite(1);
end else if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin
pre_charge_st_b = 1;
pre_charge_st = 1;
end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
pre_charge_st_b = 0;
pre_charge_st = 0;
if (VDDCE != 1'b1) begin
failedWrite(1);
end
`else
if (RET1N_ == 1'b0) begin
`endif
CENB_int = 1'bx;
AB_int = {8{1'bx}};
DB_int = {64{1'bx}};
STOV_int = 1'bx;
EMAB_int = {3{1'bx}};
RET1N_int = 1'bx;
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin
pre_charge_st_b = 0;
pre_charge_st = 0;
end else begin
pre_charge_st_b = 0;
pre_charge_st = 0;
`else
end else begin
`endif
#0;
CENB_int = 1'bx;
AB_int = {8{1'bx}};
DB_int = {64{1'bx}};
STOV_int = 1'bx;
EMAB_int = {3{1'bx}};
RET1N_int = 1'bx;
end
#0;
RET1N_int = RET1N_;
QA_update = 1'b0;
DB_sh_update = 1'b0;
end
always @ CLKB_ begin
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
if (VDDCE === 1'bx || VDDCE === 1'bz)
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
if (VDDPE === 1'bx || VDDPE === 1'bz)
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
if (VSSE === 1'bx || VSSE === 1'bz)
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
end else if (VSSE !== 1'b0) begin
`endif
// no cycle in retention mode
end else begin
if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin
failedWrite(0);
DB_sh_update = 1'b1; XDB_sh = 1'b1;
`ifdef POWER_PINS
end else if ((VDDCE === 1'bx || VDDCE === 1'bz)) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
`endif
end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
XDB_int = {64{1'b0}};
end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin
if (RET1N_ == 1'b0) begin
end else begin
CENB_int = CENB_;
STOV_int = STOV_;
EMAB_int = EMAB_;
RET1N_int = RET1N_;
if (CENB_int != 1'b1) begin
AB_int = AB_;
DB_int = DB_;
end
clk1_int = 1'b0;
CENB_int = CENB_;
STOV_int = STOV_;
EMAB_int = EMAB_;
RET1N_int = RET1N_;
if (CENB_int != 1'b1) begin
AB_int = AB_;
DB_int = DB_;
end
clk1_int = 1'b0;
WriteB;
if (CENB_int === 1'b0) previous_CLKB = $realtime;
#0;
if (((previous_CLKA == previous_CLKB) || ((STOV_int==1'b1 || STOV_int==1'b1) && CLKA_ == 1'b1 && CLKB_ == 1'b1)) && (CENA_int !== 1'b1 && CENB_int
!== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end
end
end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
end
end
LAST_CLKB = CLKB_;
end
reg globalNotifier1;
initial globalNotifier1 = 1'b0;
initial cont_flag1_int = 1'b0;
always @ globalNotifier1 begin
if ($realtime == 0) begin
end else if (CENB_int === 1'bx || RET1N_int === 1'bx || (STOV_int && !CENB_int) === 1'bx ||
clk1_int === 1'bx) begin
failedWrite(1);
end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx) begin
failedWrite(1);
end else if (cont_flag1_int === 1'bx && (CENA_int !== 1'b1 && CENB_int !== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
cont_flag1_int = 1'b0;
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end else begin
#0;
WriteB;
end
#0;
globalNotifier1 = 1'b0;
end
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
always @ (VDDCE or VDDPE or VSSE) begin
if (VDDCE === 1'bx || VDDCE === 1'bz) begin
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VDDCE = 1'b1;
end else begin
bad_VDDCE = 1'b0;
end
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VDDPE = 1'b1;
end else begin
bad_VDDPE = 1'b0;
end
if (VSSE !== 1'b0) begin
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VSSE = 1'b1;
end else begin
bad_VSSE = 1'b0;
end
bad_power = bad_VDDCE | bad_VDDPE | bad_VSSE ;
end
`endif
function row_contention;
input [7:0] aa;
input [7:0] ab;
input wena;
input wenb;
reg result;
reg sameRow;
reg sameMux;
reg anyWrite;
begin
anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1;
sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0;
if (aa[7:1] == ab[7:1]) begin
sameRow = 1'b1;
end else begin
sameRow = 1'b0;
end
if (sameRow == 1'b1 && anyWrite == 1'b1)
row_contention = 1'b1;
else if (sameRow == 1'b1 && sameMux == 1'b1)
row_contention = 1'b1;
else
row_contention = 1'b0;
end
endfunction
function col_contention;
input [7:0] aa;
input [7:0] ab;
begin
if (aa[0:0] == ab[0:0])
col_contention = 1'b1;
else
col_contention = 1'b0;
end
endfunction
function is_contention;
input [7:0] aa;
input [7:0] ab;
input wena;
input wenb;
reg result;
begin
if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin
result = 1'b0;
end else if (aa == ab) begin
result = 1'b1;
end else begin
result = 1'b0;
end
is_contention = result;
end
endfunction
wire contA_flag = (CENA_int !== 1'b1 && CENB_ !== 1'b1) && ((is_contention(AB_, AA_int, 1'b0, 1'b1)));
wire contB_flag = (CENB_int !== 1'b1 && CENA_ !== 1'b1) && ((is_contention(AA_, AB_int, 1'b1, 1'b0)));
always @ NOT_CENA begin
CENA_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA7 begin
AA_int[7] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA6 begin
AA_int[6] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA5 begin
AA_int[5] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA4 begin
AA_int[4] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA3 begin
AA_int[3] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA2 begin
AA_int[2] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA1 begin
AA_int[1] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA0 begin
AA_int[0] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CENB begin
CENB_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB7 begin
AB_int[7] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB6 begin
AB_int[6] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB5 begin
AB_int[5] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB4 begin
AB_int[4] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB3 begin
AB_int[3] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB2 begin
AB_int[2] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB1 begin
AB_int[1] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB0 begin
AB_int[0] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB63 begin
DB_int[63] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB62 begin
DB_int[62] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB61 begin
DB_int[61] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB60 begin
DB_int[60] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB59 begin
DB_int[59] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB58 begin
DB_int[58] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB57 begin
DB_int[57] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB56 begin
DB_int[56] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB55 begin
DB_int[55] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB54 begin
DB_int[54] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB53 begin
DB_int[53] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB52 begin
DB_int[52] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB51 begin
DB_int[51] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB50 begin
DB_int[50] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB49 begin
DB_int[49] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB48 begin
DB_int[48] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB47 begin
DB_int[47] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB46 begin
DB_int[46] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB45 begin
DB_int[45] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB44 begin
DB_int[44] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB43 begin
DB_int[43] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB42 begin
DB_int[42] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB41 begin
DB_int[41] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB40 begin
DB_int[40] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB39 begin
DB_int[39] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB38 begin
DB_int[38] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB37 begin
DB_int[37] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB36 begin
DB_int[36] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB35 begin
DB_int[35] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB34 begin
DB_int[34] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB33 begin
DB_int[33] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB32 begin
DB_int[32] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB31 begin
DB_int[31] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB30 begin
DB_int[30] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB29 begin
DB_int[29] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB28 begin
DB_int[28] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB27 begin
DB_int[27] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB26 begin
DB_int[26] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB25 begin
DB_int[25] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB24 begin
DB_int[24] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB23 begin
DB_int[23] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB22 begin
DB_int[22] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB21 begin
DB_int[21] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB20 begin
DB_int[20] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB19 begin
DB_int[19] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB18 begin
DB_int[18] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB17 begin
DB_int[17] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB16 begin
DB_int[16] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB15 begin
DB_int[15] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB14 begin
DB_int[14] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB13 begin
DB_int[13] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB12 begin
DB_int[12] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB11 begin
DB_int[11] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB10 begin
DB_int[10] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB9 begin
DB_int[9] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB8 begin
DB_int[8] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB7 begin
DB_int[7] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB6 begin
DB_int[6] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB5 begin
DB_int[5] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB4 begin
DB_int[4] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB3 begin
DB_int[3] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB2 begin
DB_int[2] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB1 begin
DB_int[1] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB0 begin
DB_int[0] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_STOV begin
STOV_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_EMAA2 begin
EMAA_int[2] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMAA1 begin
EMAA_int[1] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMAA0 begin
EMAA_int[0] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMASA begin
EMASA_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMAB2 begin
EMAB_int[2] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_EMAB1 begin
EMAB_int[1] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_EMAB0 begin
EMAB_int[0] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_RET1N begin
RET1N_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CONTA begin
cont_flag0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CLKA_PER begin
clk0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CLKA_MINH begin
clk0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CLKA_MINL begin
clk0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CONTB begin
cont_flag1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CLKB_PER begin
clk1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CLKB_MINH begin
clk1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CLKB_MINL begin
clk1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
wire contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq1;
wire contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq1;
wire contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq1;
wire contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq1;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aCENAeq0, STOVeq1aRET1Neq1aCENAeq0, contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq1, contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq1, contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq1, contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq1, STOVeq1aRET1Neq1, STOVeq0aRET1Neq1aCENBeq0;
wire STOVeq1aRET1Neq1aCENBeq0, RET1Neq1, RET1Neq1aCENAeq0, RET1Neq1aCENBeq0;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq0 = RET1N&&!EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq1 = RET1N&&!EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq0 = RET1N&&!EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq1 = RET1N&&!EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq0 = RET1N&&EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq1 = RET1N&&EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq0 = RET1N&&EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq1 = RET1N&&EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq0 = RET1N&&!EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq1 = RET1N&&!EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq0 = RET1N&&!EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq1 = RET1N&&!EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq0 = RET1N&&EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq1 = RET1N&&EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq0 = RET1N&&EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq1 = RET1N&&EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag;
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq0 = !STOV&&RET1N&&!EMAB[2]&&!EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq1 = !STOV&&RET1N&&!EMAB[2]&&!EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq0 = !STOV&&RET1N&&!EMAB[2]&&EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq1 = !STOV&&RET1N&&!EMAB[2]&&EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq0 = !STOV&&RET1N&&EMAB[2]&&!EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq1 = !STOV&&RET1N&&EMAB[2]&&!EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq0 = !STOV&&RET1N&&EMAB[2]&&EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq1 = !STOV&&RET1N&&EMAB[2]&&EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aCENAeq0 = !STOV&&RET1N&&!CENA;
assign STOVeq1aRET1Neq1aCENAeq0 = STOV&&RET1N&&!CENA;
assign STOVeq0aRET1Neq1aCENBeq0 = !STOV&&RET1N&&!CENB;
assign STOVeq1aRET1Neq1aCENBeq0 = STOV&&RET1N&&!CENB;
assign STOVeq1aRET1Neq1 = STOV&&RET1N;
assign RET1Neq1 = RET1N;
assign RET1Neq1aCENAeq0 = RET1N&&!CENA;
assign RET1Neq1aCENBeq0 = RET1N&&!CENB;
specify
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$period(posedge CLKA, `ARM_MEM_PERIOD, NOT_CLKA_PER);
`else
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq1aRET1Neq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
`endif
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$period(posedge CLKB, `ARM_MEM_PERIOD, NOT_CLKB_PER);
`else
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq1aRET1Neq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
`endif
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$width(posedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH);
$width(negedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL);
`else
$width(posedge CLKA &&& STOVeq0aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH);
$width(posedge CLKA &&& STOVeq1aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH);
$width(negedge CLKA &&& STOVeq0aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL);
$width(negedge CLKA &&& STOVeq1aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL);
`endif
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$width(posedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH);
$width(negedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL);
`else
$width(posedge CLKB &&& STOVeq0aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH);
$width(posedge CLKB &&& STOVeq1aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH);
$width(negedge CLKB &&& STOVeq0aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL);
$width(negedge CLKB &&& STOVeq1aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL);
`endif
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA,,,dCLKB,dCLKA);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB,,,dCLKA,dCLKB);
$setuphold(posedge CLKA &&& RET1Neq1, posedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA,,,dCLKA,dCENA);
$setuphold(posedge CLKA &&& RET1Neq1, negedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA,,,dCLKA,dCENA);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA7,,,dCLKA,dAA[7]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA6,,,dCLKA,dAA[6]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA5,,,dCLKA,dAA[5]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4,,,dCLKA,dAA[4]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3,,,dCLKA,dAA[3]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2,,,dCLKA,dAA[2]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1,,,dCLKA,dAA[1]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0,,,dCLKA,dAA[0]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA7,,,dCLKA,dAA[7]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA6,,,dCLKA,dAA[6]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA5,,,dCLKA,dAA[5]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4,,,dCLKA,dAA[4]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3,,,dCLKA,dAA[3]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2,,,dCLKA,dAA[2]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1,,,dCLKA,dAA[1]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0,,,dCLKA,dAA[0]);
$setuphold(posedge CLKB &&& RET1Neq1, posedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB,,,dCLKB,dCENB);
$setuphold(posedge CLKB &&& RET1Neq1, negedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB,,,dCLKB,dCENB);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB7,,,dCLKB,dAB[7]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB6,,,dCLKB,dAB[6]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB5,,,dCLKB,dAB[5]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4,,,dCLKB,dAB[4]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3,,,dCLKB,dAB[3]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2,,,dCLKB,dAB[2]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1,,,dCLKB,dAB[1]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0,,,dCLKB,dAB[0]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB7,,,dCLKB,dAB[7]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB6,,,dCLKB,dAB[6]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB5,,,dCLKB,dAB[5]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4,,,dCLKB,dAB[4]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3,,,dCLKB,dAB[3]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2,,,dCLKB,dAB[2]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1,,,dCLKB,dAB[1]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0,,,dCLKB,dAB[0]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63,,,dCLKB,dDB[63]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62,,,dCLKB,dDB[62]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61,,,dCLKB,dDB[61]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60,,,dCLKB,dDB[60]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59,,,dCLKB,dDB[59]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58,,,dCLKB,dDB[58]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57,,,dCLKB,dDB[57]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56,,,dCLKB,dDB[56]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55,,,dCLKB,dDB[55]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54,,,dCLKB,dDB[54]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53,,,dCLKB,dDB[53]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52,,,dCLKB,dDB[52]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51,,,dCLKB,dDB[51]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50,,,dCLKB,dDB[50]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49,,,dCLKB,dDB[49]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48,,,dCLKB,dDB[48]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47,,,dCLKB,dDB[47]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46,,,dCLKB,dDB[46]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45,,,dCLKB,dDB[45]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44,,,dCLKB,dDB[44]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43,,,dCLKB,dDB[43]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42,,,dCLKB,dDB[42]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41,,,dCLKB,dDB[41]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40,,,dCLKB,dDB[40]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39,,,dCLKB,dDB[39]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38,,,dCLKB,dDB[38]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37,,,dCLKB,dDB[37]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36,,,dCLKB,dDB[36]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35,,,dCLKB,dDB[35]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34,,,dCLKB,dDB[34]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33,,,dCLKB,dDB[33]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32,,,dCLKB,dDB[32]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31,,,dCLKB,dDB[31]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30,,,dCLKB,dDB[30]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29,,,dCLKB,dDB[29]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28,,,dCLKB,dDB[28]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27,,,dCLKB,dDB[27]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26,,,dCLKB,dDB[26]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25,,,dCLKB,dDB[25]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24,,,dCLKB,dDB[24]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23,,,dCLKB,dDB[23]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22,,,dCLKB,dDB[22]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21,,,dCLKB,dDB[21]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20,,,dCLKB,dDB[20]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19,,,dCLKB,dDB[19]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18,,,dCLKB,dDB[18]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17,,,dCLKB,dDB[17]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16,,,dCLKB,dDB[16]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15,,,dCLKB,dDB[15]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14,,,dCLKB,dDB[14]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13,,,dCLKB,dDB[13]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12,,,dCLKB,dDB[12]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11,,,dCLKB,dDB[11]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10,,,dCLKB,dDB[10]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9,,,dCLKB,dDB[9]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8,,,dCLKB,dDB[8]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7,,,dCLKB,dDB[7]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6,,,dCLKB,dDB[6]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5,,,dCLKB,dDB[5]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4,,,dCLKB,dDB[4]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3,,,dCLKB,dDB[3]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2,,,dCLKB,dDB[2]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1,,,dCLKB,dDB[1]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0,,,dCLKB,dDB[0]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63,,,dCLKB,dDB[63]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62,,,dCLKB,dDB[62]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61,,,dCLKB,dDB[61]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60,,,dCLKB,dDB[60]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59,,,dCLKB,dDB[59]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58,,,dCLKB,dDB[58]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57,,,dCLKB,dDB[57]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56,,,dCLKB,dDB[56]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55,,,dCLKB,dDB[55]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54,,,dCLKB,dDB[54]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53,,,dCLKB,dDB[53]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52,,,dCLKB,dDB[52]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51,,,dCLKB,dDB[51]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50,,,dCLKB,dDB[50]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49,,,dCLKB,dDB[49]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48,,,dCLKB,dDB[48]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47,,,dCLKB,dDB[47]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46,,,dCLKB,dDB[46]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45,,,dCLKB,dDB[45]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44,,,dCLKB,dDB[44]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43,,,dCLKB,dDB[43]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42,,,dCLKB,dDB[42]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41,,,dCLKB,dDB[41]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40,,,dCLKB,dDB[40]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39,,,dCLKB,dDB[39]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38,,,dCLKB,dDB[38]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37,,,dCLKB,dDB[37]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36,,,dCLKB,dDB[36]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35,,,dCLKB,dDB[35]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34,,,dCLKB,dDB[34]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33,,,dCLKB,dDB[33]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32,,,dCLKB,dDB[32]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31,,,dCLKB,dDB[31]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30,,,dCLKB,dDB[30]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29,,,dCLKB,dDB[29]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28,,,dCLKB,dDB[28]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27,,,dCLKB,dDB[27]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26,,,dCLKB,dDB[26]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25,,,dCLKB,dDB[25]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24,,,dCLKB,dDB[24]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23,,,dCLKB,dDB[23]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22,,,dCLKB,dDB[22]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21,,,dCLKB,dDB[21]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20,,,dCLKB,dDB[20]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19,,,dCLKB,dDB[19]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18,,,dCLKB,dDB[18]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17,,,dCLKB,dDB[17]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16,,,dCLKB,dDB[16]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15,,,dCLKB,dDB[15]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14,,,dCLKB,dDB[14]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13,,,dCLKB,dDB[13]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12,,,dCLKB,dDB[12]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11,,,dCLKB,dDB[11]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10,,,dCLKB,dDB[10]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9,,,dCLKB,dDB[9]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8,,,dCLKB,dDB[8]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7,,,dCLKB,dDB[7]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6,,,dCLKB,dDB[6]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5,,,dCLKB,dDB[5]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4,,,dCLKB,dDB[4]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3,,,dCLKB,dDB[3]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2,,,dCLKB,dDB[2]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1,,,dCLKB,dDB[1]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0,,,dCLKB,dDB[0]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV,,,dCLKA,dSTOV);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV,,,dCLKA,dSTOV);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV,,,dCLKB,dSTOV);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV,,,dCLKB,dSTOV);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2,,,dCLKA,dEMAA[2]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1,,,dCLKA,dEMAA[1]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0,,,dCLKA,dEMAA[0]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2,,,dCLKA,dEMAA[2]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1,,,dCLKA,dEMAA[1]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0,,,dCLKA,dEMAA[0]);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA,,,dCLKA,dEMASA);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA,,,dCLKA,dEMASA);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2,,,dCLKB,dEMAB[2]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1,,,dCLKB,dEMAB[1]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0,,,dCLKB,dEMAB[0]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2,,,dCLKB,dEMAB[2]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1,,,dCLKB,dEMAB[1]);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0,,,dCLKB,dEMAB[0]);
$setuphold(negedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dRET1N,dCENA);
$setuphold(posedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dRET1N,dCENA);
$setuphold(negedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dRET1N,dCENB);
$setuphold(posedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dRET1N,dCENB);
$setuphold(posedge CENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dCENB,dRET1N);
$setuphold(posedge CENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dCENA,dRET1N);
$setuphold(posedge CENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dCENB,dRET1N);
$setuphold(posedge CENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N,,,dCENA,dRET1N);
endspecify
endmodule
`endcelldefine
`else
`celldefine
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
module rf_2p_hsc_256x64_nogating (VDDCE, VDDPE, VSSE, QA, CLKA, CENA, AA, CLKB, CENB,
AB, DB, STOV, EMAA, EMASA, EMAB, RET1N);
`else
module rf_2p_hsc_256x64_nogating (QA, CLKA, CENA, AA, CLKB, CENB, AB, DB, STOV, EMAA,
EMASA, EMAB, RET1N);
`endif
parameter ASSERT_PREFIX = "";
parameter BITS = 64;
parameter WORDS = 256;
parameter MUX = 2;
parameter MEM_WIDTH = 128; // redun block size 2, 64 on left, 64 on right
parameter MEM_HEIGHT = 128;
parameter WP_SIZE = 64 ;
parameter UPM_WIDTH = 3;
parameter UPMW_WIDTH = 0;
parameter UPMS_WIDTH = 1;
parameter ROWS = 128;
output [63:0] QA;
input CLKA;
input CENA;
input [7:0] AA;
input CLKB;
input CENB;
input [7:0] AB;
input [63:0] DB;
input STOV;
input [2:0] EMAA;
input EMASA;
input [2:0] EMAB;
input RET1N;
`ifdef POWER_PINS
inout VDDCE;
inout VDDPE;
inout VSSE;
`endif
`ifdef POWER_PINS
reg bad_VDDCE;
reg bad_VDDPE;
reg bad_VSSE;
reg bad_power;
`endif
wire corrupt_power;
reg pre_charge_st;
reg pre_charge_st_a;
reg pre_charge_st_b;
integer row_address;
integer mux_address;
initial row_address = 0;
initial mux_address = 0;
reg [127:0] mem [0:127];
reg [127:0] row, row_t;
reg LAST_CLKA;
reg [127:0] row_mask;
reg [127:0] new_data;
reg [127:0] data_out;
reg [63:0] readLatch0;
reg [63:0] shifted_readLatch0;
reg [63:0] readLatch1;
reg [63:0] shifted_readLatch1;
reg LAST_CLKB;
wire [63:0] QA_int;
reg XQA, QA_update;
reg [63:0] mem_path;
reg XDB_sh, DB_sh_update;
wire [63:0] DB_int_bmux;
reg [63:0] writeEnable;
real previous_CLKA;
real previous_CLKB;
initial previous_CLKA = 0;
initial previous_CLKB = 0;
reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC;
reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1;
reg cont_flag0_int;
reg cont_flag1_int;
initial cont_flag0_int = 1'b0;
initial cont_flag1_int = 1'b0;
reg NOT_CENA, NOT_AA7, NOT_AA6, NOT_AA5, NOT_AA4, NOT_AA3, NOT_AA2, NOT_AA1, NOT_AA0;
reg NOT_CENB, NOT_AB7, NOT_AB6, NOT_AB5, NOT_AB4, NOT_AB3, NOT_AB2, NOT_AB1, NOT_AB0;
reg NOT_DB63, NOT_DB62, NOT_DB61, NOT_DB60, NOT_DB59, NOT_DB58, NOT_DB57, NOT_DB56;
reg NOT_DB55, NOT_DB54, NOT_DB53, NOT_DB52, NOT_DB51, NOT_DB50, NOT_DB49, NOT_DB48;
reg NOT_DB47, NOT_DB46, NOT_DB45, NOT_DB44, NOT_DB43, NOT_DB42, NOT_DB41, NOT_DB40;
reg NOT_DB39, NOT_DB38, NOT_DB37, NOT_DB36, NOT_DB35, NOT_DB34, NOT_DB33, NOT_DB32;
reg NOT_DB31, NOT_DB30, NOT_DB29, NOT_DB28, NOT_DB27, NOT_DB26, NOT_DB25, NOT_DB24;
reg NOT_DB23, NOT_DB22, NOT_DB21, NOT_DB20, NOT_DB19, NOT_DB18, NOT_DB17, NOT_DB16;
reg NOT_DB15, NOT_DB14, NOT_DB13, NOT_DB12, NOT_DB11, NOT_DB10, NOT_DB9, NOT_DB8;
reg NOT_DB7, NOT_DB6, NOT_DB5, NOT_DB4, NOT_DB3, NOT_DB2, NOT_DB1, NOT_DB0, NOT_STOV;
reg NOT_EMAA2, NOT_EMAA1, NOT_EMAA0, NOT_EMASA, NOT_EMAB2, NOT_EMAB1, NOT_EMAB0;
reg NOT_RET1N;
reg NOT_CONTA, NOT_CLKA_PER, NOT_CLKA_MINH, NOT_CLKA_MINL, NOT_CONTB, NOT_CLKB_PER;
reg NOT_CLKB_MINH, NOT_CLKB_MINL;
reg clk0_int;
reg clk1_int;
wire [63:0] QA_;
wire CLKA_;
wire CENA_;
reg CENA_int;
reg CENA_p2;
wire [7:0] AA_;
reg [7:0] AA_int;
wire CLKB_;
wire CENB_;
reg CENB_int;
reg CENB_p2;
wire [7:0] AB_;
reg [7:0] AB_int;
wire [63:0] DB_;
reg [63:0] DB_int;
reg [63:0] XDB_int;
wire STOV_;
reg STOV_int;
wire [2:0] EMAA_;
reg [2:0] EMAA_int;
wire EMASA_;
reg EMASA_int;
wire [2:0] EMAB_;
reg [2:0] EMAB_int;
wire RET1N_;
reg RET1N_int;
buf B157(QA[0], QA_[0]);
buf B158(QA[1], QA_[1]);
buf B159(QA[2], QA_[2]);
buf B160(QA[3], QA_[3]);
buf B161(QA[4], QA_[4]);
buf B162(QA[5], QA_[5]);
buf B163(QA[6], QA_[6]);
buf B164(QA[7], QA_[7]);
buf B165(QA[8], QA_[8]);
buf B166(QA[9], QA_[9]);
buf B167(QA[10], QA_[10]);
buf B168(QA[11], QA_[11]);
buf B169(QA[12], QA_[12]);
buf B170(QA[13], QA_[13]);
buf B171(QA[14], QA_[14]);
buf B172(QA[15], QA_[15]);
buf B173(QA[16], QA_[16]);
buf B174(QA[17], QA_[17]);
buf B175(QA[18], QA_[18]);
buf B176(QA[19], QA_[19]);
buf B177(QA[20], QA_[20]);
buf B178(QA[21], QA_[21]);
buf B179(QA[22], QA_[22]);
buf B180(QA[23], QA_[23]);
buf B181(QA[24], QA_[24]);
buf B182(QA[25], QA_[25]);
buf B183(QA[26], QA_[26]);
buf B184(QA[27], QA_[27]);
buf B185(QA[28], QA_[28]);
buf B186(QA[29], QA_[29]);
buf B187(QA[30], QA_[30]);
buf B188(QA[31], QA_[31]);
buf B189(QA[32], QA_[32]);
buf B190(QA[33], QA_[33]);
buf B191(QA[34], QA_[34]);
buf B192(QA[35], QA_[35]);
buf B193(QA[36], QA_[36]);
buf B194(QA[37], QA_[37]);
buf B195(QA[38], QA_[38]);
buf B196(QA[39], QA_[39]);
buf B197(QA[40], QA_[40]);
buf B198(QA[41], QA_[41]);
buf B199(QA[42], QA_[42]);
buf B200(QA[43], QA_[43]);
buf B201(QA[44], QA_[44]);
buf B202(QA[45], QA_[45]);
buf B203(QA[46], QA_[46]);
buf B204(QA[47], QA_[47]);
buf B205(QA[48], QA_[48]);
buf B206(QA[49], QA_[49]);
buf B207(QA[50], QA_[50]);
buf B208(QA[51], QA_[51]);
buf B209(QA[52], QA_[52]);
buf B210(QA[53], QA_[53]);
buf B211(QA[54], QA_[54]);
buf B212(QA[55], QA_[55]);
buf B213(QA[56], QA_[56]);
buf B214(QA[57], QA_[57]);
buf B215(QA[58], QA_[58]);
buf B216(QA[59], QA_[59]);
buf B217(QA[60], QA_[60]);
buf B218(QA[61], QA_[61]);
buf B219(QA[62], QA_[62]);
buf B220(QA[63], QA_[63]);
buf B221(CLKA_, CLKA);
buf B222(CENA_, CENA);
buf B223(AA_[0], AA[0]);
buf B224(AA_[1], AA[1]);
buf B225(AA_[2], AA[2]);
buf B226(AA_[3], AA[3]);
buf B227(AA_[4], AA[4]);
buf B228(AA_[5], AA[5]);
buf B229(AA_[6], AA[6]);
buf B230(AA_[7], AA[7]);
buf B231(CLKB_, CLKB);
buf B232(CENB_, CENB);
buf B233(AB_[0], AB[0]);
buf B234(AB_[1], AB[1]);
buf B235(AB_[2], AB[2]);
buf B236(AB_[3], AB[3]);
buf B237(AB_[4], AB[4]);
buf B238(AB_[5], AB[5]);
buf B239(AB_[6], AB[6]);
buf B240(AB_[7], AB[7]);
buf B241(DB_[0], DB[0]);
buf B242(DB_[1], DB[1]);
buf B243(DB_[2], DB[2]);
buf B244(DB_[3], DB[3]);
buf B245(DB_[4], DB[4]);
buf B246(DB_[5], DB[5]);
buf B247(DB_[6], DB[6]);
buf B248(DB_[7], DB[7]);
buf B249(DB_[8], DB[8]);
buf B250(DB_[9], DB[9]);
buf B251(DB_[10], DB[10]);
buf B252(DB_[11], DB[11]);
buf B253(DB_[12], DB[12]);
buf B254(DB_[13], DB[13]);
buf B255(DB_[14], DB[14]);
buf B256(DB_[15], DB[15]);
buf B257(DB_[16], DB[16]);
buf B258(DB_[17], DB[17]);
buf B259(DB_[18], DB[18]);
buf B260(DB_[19], DB[19]);
buf B261(DB_[20], DB[20]);
buf B262(DB_[21], DB[21]);
buf B263(DB_[22], DB[22]);
buf B264(DB_[23], DB[23]);
buf B265(DB_[24], DB[24]);
buf B266(DB_[25], DB[25]);
buf B267(DB_[26], DB[26]);
buf B268(DB_[27], DB[27]);
buf B269(DB_[28], DB[28]);
buf B270(DB_[29], DB[29]);
buf B271(DB_[30], DB[30]);
buf B272(DB_[31], DB[31]);
buf B273(DB_[32], DB[32]);
buf B274(DB_[33], DB[33]);
buf B275(DB_[34], DB[34]);
buf B276(DB_[35], DB[35]);
buf B277(DB_[36], DB[36]);
buf B278(DB_[37], DB[37]);
buf B279(DB_[38], DB[38]);
buf B280(DB_[39], DB[39]);
buf B281(DB_[40], DB[40]);
buf B282(DB_[41], DB[41]);
buf B283(DB_[42], DB[42]);
buf B284(DB_[43], DB[43]);
buf B285(DB_[44], DB[44]);
buf B286(DB_[45], DB[45]);
buf B287(DB_[46], DB[46]);
buf B288(DB_[47], DB[47]);
buf B289(DB_[48], DB[48]);
buf B290(DB_[49], DB[49]);
buf B291(DB_[50], DB[50]);
buf B292(DB_[51], DB[51]);
buf B293(DB_[52], DB[52]);
buf B294(DB_[53], DB[53]);
buf B295(DB_[54], DB[54]);
buf B296(DB_[55], DB[55]);
buf B297(DB_[56], DB[56]);
buf B298(DB_[57], DB[57]);
buf B299(DB_[58], DB[58]);
buf B300(DB_[59], DB[59]);
buf B301(DB_[60], DB[60]);
buf B302(DB_[61], DB[61]);
buf B303(DB_[62], DB[62]);
buf B304(DB_[63], DB[63]);
buf B305(STOV_, STOV);
buf B306(EMAA_[0], EMAA[0]);
buf B307(EMAA_[1], EMAA[1]);
buf B308(EMAA_[2], EMAA[2]);
buf B309(EMASA_, EMASA);
buf B310(EMAB_[0], EMAB[0]);
buf B311(EMAB_[1], EMAB[1]);
buf B312(EMAB_[2], EMAB[2]);
buf B313(RET1N_, RET1N);
`ifdef POWER_PINS
assign corrupt_power = bad_power;
`else
assign corrupt_power = 1'b0;
`endif
`ifdef ARM_FAULT_MODELING
rf_2p_hsc_256x64_nogating_error_injection u1(.CLK(CLKA_), .Q_out(QA_), .A(AA_int), .CEN(CENA_int), .Q_in(QA_int));
`else
assign QA_ = (RET1N_ | pre_charge_st) & ~corrupt_power ? ((QA_int)) : {64{1'bx}};
`endif
// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS.
`ifdef INITIALIZE_MEMORY
integer i;
initial
begin
#0;
for (i = 0; i < MEM_HEIGHT; i = i + 1)
mem[i] = {MEM_WIDTH{1'b0}};
end
`endif
always @ (EMAA_) begin
if(EMAA_ < 2)
$display("Warning: Set Value for EMAA doesn't match Default value 2 in %m at %0t", $time);
end
always @ (EMASA_) begin
if(EMASA_ < 0)
$display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time);
end
always @ (EMAB_) begin
if(EMAB_ < 2)
$display("Warning: Set Value for EMAB doesn't match Default value 2 in %m at %0t", $time);
end
task failedWrite;
input port_f;
integer i;
begin
for (i = 0; i < MEM_HEIGHT; i = i + 1)
mem[i] = {MEM_WIDTH{1'bx}};
end
endtask
function isBitX;
input bitval;
begin
isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0;
end
endfunction
task loadmem;
input [1000*8-1:0] filename;
reg [BITS-1:0] memld [0:WORDS-1];
integer i;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
$readmemb(filename, memld);
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
for (i=0;i<WORDS;i=i+1) begin
wordtemp = memld[i];
Atemp = i;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61],
1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57],
1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53],
1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49],
1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45],
1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41],
1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37],
1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33],
1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29],
1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25],
1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21],
1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17],
1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13],
1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9],
1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5],
1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1],
1'b0, wordtemp[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
end
endtask
task dumpmem;
input [1000*8-1:0] filename_dump;
integer i, dump_file_desc;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
dump_file_desc = $fopen(filename_dump);
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
for (i=0;i<WORDS;i=i+1) begin
Atemp = i;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
$fdisplay(dump_file_desc, "%b", mem_path);
end
end
$fclose(dump_file_desc);
end
endtask
task loadaddr;
input [7:0] load_addr;
input [63:0] load_data;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
wordtemp = load_data;
Atemp = load_addr;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, wordtemp[63], 1'b0, wordtemp[62], 1'b0, wordtemp[61],
1'b0, wordtemp[60], 1'b0, wordtemp[59], 1'b0, wordtemp[58], 1'b0, wordtemp[57],
1'b0, wordtemp[56], 1'b0, wordtemp[55], 1'b0, wordtemp[54], 1'b0, wordtemp[53],
1'b0, wordtemp[52], 1'b0, wordtemp[51], 1'b0, wordtemp[50], 1'b0, wordtemp[49],
1'b0, wordtemp[48], 1'b0, wordtemp[47], 1'b0, wordtemp[46], 1'b0, wordtemp[45],
1'b0, wordtemp[44], 1'b0, wordtemp[43], 1'b0, wordtemp[42], 1'b0, wordtemp[41],
1'b0, wordtemp[40], 1'b0, wordtemp[39], 1'b0, wordtemp[38], 1'b0, wordtemp[37],
1'b0, wordtemp[36], 1'b0, wordtemp[35], 1'b0, wordtemp[34], 1'b0, wordtemp[33],
1'b0, wordtemp[32], 1'b0, wordtemp[31], 1'b0, wordtemp[30], 1'b0, wordtemp[29],
1'b0, wordtemp[28], 1'b0, wordtemp[27], 1'b0, wordtemp[26], 1'b0, wordtemp[25],
1'b0, wordtemp[24], 1'b0, wordtemp[23], 1'b0, wordtemp[22], 1'b0, wordtemp[21],
1'b0, wordtemp[20], 1'b0, wordtemp[19], 1'b0, wordtemp[18], 1'b0, wordtemp[17],
1'b0, wordtemp[16], 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13],
1'b0, wordtemp[12], 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9],
1'b0, wordtemp[8], 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5],
1'b0, wordtemp[4], 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1],
1'b0, wordtemp[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
endtask
task dumpaddr;
output [63:0] dump_data;
input [7:0] dump_addr;
reg [BITS-1:0] wordtemp;
reg [7:0] Atemp;
begin
if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
Atemp = dump_addr;
mux_address = (Atemp & 1'b1);
row_address = (Atemp >> 1);
row = mem[row_address];
writeEnable = {64{1'b1}};
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
dump_data = mem_path;
end
end
endtask
task ReadA;
begin
if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0 && CENA_int === 1'b0) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0) begin
// no cycle in retention mode
end else if (^{(EMAA_int), (EMASA_int)} === 1'bx) begin
if(isBitX(EMASA_int)) begin
XQA = 1'b1; QA_update = 1'b1;
end
if(isBitX(EMAA_int)) begin
XQA = 1'b1; QA_update = 1'b1;
end
end else if (^{CENA_int, (STOV_int && !CENA_int), RET1N_int} === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if ((AA_int >= WORDS) && (CENA_int === 1'b0)) begin
XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1;
end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (CENA_int === 1'b0) begin
mux_address = (AA_int & 1'b1);
row_address = (AA_int >> 1);
if (row_address > 127)
row = {128{1'bx}};
else
row = mem[row_address];
data_out = (row >> mux_address);
mem_path = {data_out[126], data_out[124], data_out[122], data_out[120], data_out[118],
data_out[116], data_out[114], data_out[112], data_out[110], data_out[108],
data_out[106], data_out[104], data_out[102], data_out[100], data_out[98], data_out[96],
data_out[94], data_out[92], data_out[90], data_out[88], data_out[86], data_out[84],
data_out[82], data_out[80], data_out[78], data_out[76], data_out[74], data_out[72],
data_out[70], data_out[68], data_out[66], data_out[64], data_out[62], data_out[60],
data_out[58], data_out[56], data_out[54], data_out[52], data_out[50], data_out[48],
data_out[46], data_out[44], data_out[42], data_out[40], data_out[38], data_out[36],
data_out[34], data_out[32], data_out[30], data_out[28], data_out[26], data_out[24],
data_out[22], data_out[20], data_out[18], data_out[16], data_out[14], data_out[12],
data_out[10], data_out[8], data_out[6], data_out[4], data_out[2], data_out[0]};
#0;
XQA = 1'b0; QA_update = 1'b1;
end
end
endtask
task WriteB;
begin
if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0 && CENB_int === 1'b0) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_int === 1'b0) begin
// no cycle in retention mode
end else if (^{(EMAB_int)} === 1'bx) begin
if(isBitX(EMAB_int)) begin
failedWrite(1);
end
end else if (^{CENB_int, (STOV_int && !CENB_int), RET1N_int} === 1'bx) begin
failedWrite(1);
end else if ((AB_int >= WORDS) && (CENB_int === 1'b0)) begin
end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx) begin
failedWrite(1);
end else if (CENB_int === 1'b0) begin
mux_address = (AB_int & 1'b1);
row_address = (AB_int >> 1);
if (row_address > 127)
row = {128{1'bx}};
else
row = mem[row_address];
writeEnable = ~ {64{CENB_int}};
row_mask = ( {1'b0, writeEnable[63], 1'b0, writeEnable[62], 1'b0, writeEnable[61],
1'b0, writeEnable[60], 1'b0, writeEnable[59], 1'b0, writeEnable[58], 1'b0, writeEnable[57],
1'b0, writeEnable[56], 1'b0, writeEnable[55], 1'b0, writeEnable[54], 1'b0, writeEnable[53],
1'b0, writeEnable[52], 1'b0, writeEnable[51], 1'b0, writeEnable[50], 1'b0, writeEnable[49],
1'b0, writeEnable[48], 1'b0, writeEnable[47], 1'b0, writeEnable[46], 1'b0, writeEnable[45],
1'b0, writeEnable[44], 1'b0, writeEnable[43], 1'b0, writeEnable[42], 1'b0, writeEnable[41],
1'b0, writeEnable[40], 1'b0, writeEnable[39], 1'b0, writeEnable[38], 1'b0, writeEnable[37],
1'b0, writeEnable[36], 1'b0, writeEnable[35], 1'b0, writeEnable[34], 1'b0, writeEnable[33],
1'b0, writeEnable[32], 1'b0, writeEnable[31], 1'b0, writeEnable[30], 1'b0, writeEnable[29],
1'b0, writeEnable[28], 1'b0, writeEnable[27], 1'b0, writeEnable[26], 1'b0, writeEnable[25],
1'b0, writeEnable[24], 1'b0, writeEnable[23], 1'b0, writeEnable[22], 1'b0, writeEnable[21],
1'b0, writeEnable[20], 1'b0, writeEnable[19], 1'b0, writeEnable[18], 1'b0, writeEnable[17],
1'b0, writeEnable[16], 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13],
1'b0, writeEnable[12], 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9],
1'b0, writeEnable[8], 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5],
1'b0, writeEnable[4], 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1],
1'b0, writeEnable[0]} << mux_address);
new_data = ( {1'b0, DB_int[63], 1'b0, DB_int[62], 1'b0, DB_int[61], 1'b0, DB_int[60],
1'b0, DB_int[59], 1'b0, DB_int[58], 1'b0, DB_int[57], 1'b0, DB_int[56], 1'b0, DB_int[55],
1'b0, DB_int[54], 1'b0, DB_int[53], 1'b0, DB_int[52], 1'b0, DB_int[51], 1'b0, DB_int[50],
1'b0, DB_int[49], 1'b0, DB_int[48], 1'b0, DB_int[47], 1'b0, DB_int[46], 1'b0, DB_int[45],
1'b0, DB_int[44], 1'b0, DB_int[43], 1'b0, DB_int[42], 1'b0, DB_int[41], 1'b0, DB_int[40],
1'b0, DB_int[39], 1'b0, DB_int[38], 1'b0, DB_int[37], 1'b0, DB_int[36], 1'b0, DB_int[35],
1'b0, DB_int[34], 1'b0, DB_int[33], 1'b0, DB_int[32], 1'b0, DB_int[31], 1'b0, DB_int[30],
1'b0, DB_int[29], 1'b0, DB_int[28], 1'b0, DB_int[27], 1'b0, DB_int[26], 1'b0, DB_int[25],
1'b0, DB_int[24], 1'b0, DB_int[23], 1'b0, DB_int[22], 1'b0, DB_int[21], 1'b0, DB_int[20],
1'b0, DB_int[19], 1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15],
1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10],
1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5],
1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address);
row = (row & ~row_mask) | (row_mask & (~row_mask | new_data));
mem[row_address] = row;
end
end
endtask
always @ (CENA_ or CLKA_) begin
if(CLKA_ == 1'b0) begin
CENA_p2 = CENA_;
end
end
`ifdef POWER_PINS
always @ (VDDCE) begin
if (VDDCE != 1'b1) begin
if (VDDPE == 1'b1) begin
$display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time);
end
$display("In PowerDown Mode in %m at %0t", $time);
failedWrite(0);
end
if (VDDCE == 1'b1) begin
if (VDDPE == 1'b1) begin
$display("VDDPE should be powered up after VDDCE in %m at %0t", $time);
$display("Illegal power up sequencing in %m at %0t", $time);
end
failedWrite(0);
end
end
`endif
`ifdef POWER_PINS
always @ (RET1N_ or VDDPE or VDDCE or VSSE) begin
`else
always @ RET1N_ begin
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || CLKA_ === 1'bx)) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end
`else
`endif
`ifdef POWER_PINS
`else
pre_charge_st_a = 0;
pre_charge_st = 0;
`endif
if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b0 && CENA_p2 === 1'b0 ) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b1 && CENA_p2 === 1'b0 ) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
end
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Illegal value for VDDPE %b in %m at %0t", VDDPE, $time);
failedWrite(0);
end else if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin
pre_charge_st_a = 1;
pre_charge_st = 1;
end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
pre_charge_st_a = 0;
pre_charge_st = 0;
if (VDDCE != 1'b1) begin
failedWrite(0);
end
`else
if (RET1N_ == 1'b0) begin
`endif
XQA = 1'b1; QA_update = 1'b1;
CENA_int = 1'bx;
AA_int = {8{1'bx}};
STOV_int = 1'bx;
EMAA_int = {3{1'bx}};
EMASA_int = 1'bx;
RET1N_int = 1'bx;
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin
pre_charge_st_a = 0;
pre_charge_st = 0;
end else begin
pre_charge_st_a = 0;
pre_charge_st = 0;
`else
end else begin
`endif
#0;
XQA = 1'b1; QA_update = 1'b1;
CENA_int = 1'bx;
AA_int = {8{1'bx}};
STOV_int = 1'bx;
EMAA_int = {3{1'bx}};
EMASA_int = 1'bx;
RET1N_int = 1'bx;
end
#0;
RET1N_int = RET1N_;
QA_update = 1'b0;
end
always @ CLKA_ begin
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
if (VDDCE === 1'bx || VDDCE === 1'bz)
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
if (VDDPE === 1'bx || VDDPE === 1'bz)
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
if (VSSE === 1'bx || VSSE === 1'bz)
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
end else if (VSSE !== 1'b0) begin
`endif
// no cycle in retention mode
end else begin
if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin
failedWrite(0);
XQA = 1'b1; QA_update = 1'b1;
`ifdef POWER_PINS
end else if ((VDDCE === 1'bx || VDDCE === 1'bz)) begin
XQA = 1'b0; QA_update = 1'b0;
`endif
end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin
XQA = 1'b0; QA_update = 1'b0;
end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
end else begin
CENA_int = CENA_;
STOV_int = STOV_;
EMAA_int = EMAA_;
EMASA_int = EMASA_;
RET1N_int = RET1N_;
if (CENA_int != 1'b1) begin
AA_int = AA_;
end
clk0_int = 1'b0;
CENA_int = CENA_;
STOV_int = STOV_;
EMAA_int = EMAA_;
EMASA_int = EMASA_;
RET1N_int = RET1N_;
if (CENA_int != 1'b1) begin
AA_int = AA_;
end
clk0_int = 1'b0;
ReadA;
if (CENA_int === 1'b0) previous_CLKA = $realtime;
#0;
if (((previous_CLKA == previous_CLKB) || ((STOV_int==1'b1 || STOV_int==1'b1) && CLKA_ == 1'b1 && CLKB_ == 1'b1)) && (CENA_int !== 1'b1 && CENB_int
!== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end
end
end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin
QA_update = 1'b0;
XQA = 1'b0;
end
end
LAST_CLKA = CLKA_;
end
reg globalNotifier0;
initial globalNotifier0 = 1'b0;
initial cont_flag0_int = 1'b0;
always @ globalNotifier0 begin
if ($realtime == 0) begin
end else if (CENA_int === 1'bx || RET1N_int === 1'bx || (STOV_int && !CENA_int) === 1'bx ||
clk0_int === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx) begin
XQA = 1'b1; QA_update = 1'b1;
end else if (cont_flag0_int === 1'bx && (CENA_int !== 1'b1 && CENB_int !== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
cont_flag0_int = 1'b0;
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end else begin
#0;
ReadA;
end
#0;
QA_update = 1'b0;
globalNotifier0 = 1'b0;
end
datapath_latch_rf_2p_hsc_256x64_nogating uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(1'b0), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(1'b0), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(1'b0), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(1'b0), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(1'b0), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(1'b0), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(1'b0), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(1'b0), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(1'b0), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(1'b0), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(1'b0), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(1'b0), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(1'b0), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(1'b0), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(1'b0), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(1'b0), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(1'b0), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[18]), .D(QA_int[18]), .DFTRAMBYP(1'b0), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[19]), .D(QA_int[19]), .DFTRAMBYP(1'b0), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA19 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[20]), .D(QA_int[20]), .DFTRAMBYP(1'b0), .mem_path(mem_path[19]), .XQ(XQA), .Q(QA_int[19]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA20 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[21]), .D(QA_int[21]), .DFTRAMBYP(1'b0), .mem_path(mem_path[20]), .XQ(XQA), .Q(QA_int[20]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA21 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[22]), .D(QA_int[22]), .DFTRAMBYP(1'b0), .mem_path(mem_path[21]), .XQ(XQA), .Q(QA_int[21]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA22 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[23]), .D(QA_int[23]), .DFTRAMBYP(1'b0), .mem_path(mem_path[22]), .XQ(XQA), .Q(QA_int[22]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA23 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[24]), .D(QA_int[24]), .DFTRAMBYP(1'b0), .mem_path(mem_path[23]), .XQ(XQA), .Q(QA_int[23]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA24 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[25]), .D(QA_int[25]), .DFTRAMBYP(1'b0), .mem_path(mem_path[24]), .XQ(XQA), .Q(QA_int[24]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA25 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[26]), .D(QA_int[26]), .DFTRAMBYP(1'b0), .mem_path(mem_path[25]), .XQ(XQA), .Q(QA_int[25]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA26 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[27]), .D(QA_int[27]), .DFTRAMBYP(1'b0), .mem_path(mem_path[26]), .XQ(XQA), .Q(QA_int[26]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA27 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[28]), .D(QA_int[28]), .DFTRAMBYP(1'b0), .mem_path(mem_path[27]), .XQ(XQA), .Q(QA_int[27]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA28 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[29]), .D(QA_int[29]), .DFTRAMBYP(1'b0), .mem_path(mem_path[28]), .XQ(XQA), .Q(QA_int[28]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA29 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[30]), .D(QA_int[30]), .DFTRAMBYP(1'b0), .mem_path(mem_path[29]), .XQ(XQA), .Q(QA_int[29]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA30 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[31]), .D(QA_int[31]), .DFTRAMBYP(1'b0), .mem_path(mem_path[30]), .XQ(XQA), .Q(QA_int[30]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA31 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(1'b0), .D(1'b0), .DFTRAMBYP(1'b0), .mem_path(mem_path[31]), .XQ(XQA|1'b0), .Q(QA_int[31]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA32 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(1'b0), .D(1'b0), .DFTRAMBYP(1'b0), .mem_path(mem_path[32]), .XQ(XQA|1'b0), .Q(QA_int[32]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA33 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[32]), .D(QA_int[32]), .DFTRAMBYP(1'b0), .mem_path(mem_path[33]), .XQ(XQA), .Q(QA_int[33]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA34 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[33]), .D(QA_int[33]), .DFTRAMBYP(1'b0), .mem_path(mem_path[34]), .XQ(XQA), .Q(QA_int[34]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA35 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[34]), .D(QA_int[34]), .DFTRAMBYP(1'b0), .mem_path(mem_path[35]), .XQ(XQA), .Q(QA_int[35]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA36 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[35]), .D(QA_int[35]), .DFTRAMBYP(1'b0), .mem_path(mem_path[36]), .XQ(XQA), .Q(QA_int[36]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA37 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[36]), .D(QA_int[36]), .DFTRAMBYP(1'b0), .mem_path(mem_path[37]), .XQ(XQA), .Q(QA_int[37]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA38 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[37]), .D(QA_int[37]), .DFTRAMBYP(1'b0), .mem_path(mem_path[38]), .XQ(XQA), .Q(QA_int[38]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA39 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[38]), .D(QA_int[38]), .DFTRAMBYP(1'b0), .mem_path(mem_path[39]), .XQ(XQA), .Q(QA_int[39]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA40 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[39]), .D(QA_int[39]), .DFTRAMBYP(1'b0), .mem_path(mem_path[40]), .XQ(XQA), .Q(QA_int[40]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA41 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[40]), .D(QA_int[40]), .DFTRAMBYP(1'b0), .mem_path(mem_path[41]), .XQ(XQA), .Q(QA_int[41]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA42 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[41]), .D(QA_int[41]), .DFTRAMBYP(1'b0), .mem_path(mem_path[42]), .XQ(XQA), .Q(QA_int[42]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA43 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[42]), .D(QA_int[42]), .DFTRAMBYP(1'b0), .mem_path(mem_path[43]), .XQ(XQA), .Q(QA_int[43]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA44 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[43]), .D(QA_int[43]), .DFTRAMBYP(1'b0), .mem_path(mem_path[44]), .XQ(XQA), .Q(QA_int[44]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA45 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[44]), .D(QA_int[44]), .DFTRAMBYP(1'b0), .mem_path(mem_path[45]), .XQ(XQA), .Q(QA_int[45]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA46 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[45]), .D(QA_int[45]), .DFTRAMBYP(1'b0), .mem_path(mem_path[46]), .XQ(XQA), .Q(QA_int[46]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA47 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[46]), .D(QA_int[46]), .DFTRAMBYP(1'b0), .mem_path(mem_path[47]), .XQ(XQA), .Q(QA_int[47]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA48 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[47]), .D(QA_int[47]), .DFTRAMBYP(1'b0), .mem_path(mem_path[48]), .XQ(XQA), .Q(QA_int[48]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA49 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[48]), .D(QA_int[48]), .DFTRAMBYP(1'b0), .mem_path(mem_path[49]), .XQ(XQA), .Q(QA_int[49]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA50 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[49]), .D(QA_int[49]), .DFTRAMBYP(1'b0), .mem_path(mem_path[50]), .XQ(XQA), .Q(QA_int[50]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA51 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[50]), .D(QA_int[50]), .DFTRAMBYP(1'b0), .mem_path(mem_path[51]), .XQ(XQA), .Q(QA_int[51]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA52 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[51]), .D(QA_int[51]), .DFTRAMBYP(1'b0), .mem_path(mem_path[52]), .XQ(XQA), .Q(QA_int[52]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA53 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[52]), .D(QA_int[52]), .DFTRAMBYP(1'b0), .mem_path(mem_path[53]), .XQ(XQA), .Q(QA_int[53]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA54 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[53]), .D(QA_int[53]), .DFTRAMBYP(1'b0), .mem_path(mem_path[54]), .XQ(XQA), .Q(QA_int[54]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA55 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[54]), .D(QA_int[54]), .DFTRAMBYP(1'b0), .mem_path(mem_path[55]), .XQ(XQA), .Q(QA_int[55]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA56 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[55]), .D(QA_int[55]), .DFTRAMBYP(1'b0), .mem_path(mem_path[56]), .XQ(XQA), .Q(QA_int[56]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA57 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[56]), .D(QA_int[56]), .DFTRAMBYP(1'b0), .mem_path(mem_path[57]), .XQ(XQA), .Q(QA_int[57]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA58 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[57]), .D(QA_int[57]), .DFTRAMBYP(1'b0), .mem_path(mem_path[58]), .XQ(XQA), .Q(QA_int[58]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA59 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[58]), .D(QA_int[58]), .DFTRAMBYP(1'b0), .mem_path(mem_path[59]), .XQ(XQA), .Q(QA_int[59]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA60 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[59]), .D(QA_int[59]), .DFTRAMBYP(1'b0), .mem_path(mem_path[60]), .XQ(XQA), .Q(QA_int[60]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA61 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[60]), .D(QA_int[60]), .DFTRAMBYP(1'b0), .mem_path(mem_path[61]), .XQ(XQA), .Q(QA_int[61]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA62 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[61]), .D(QA_int[61]), .DFTRAMBYP(1'b0), .mem_path(mem_path[62]), .XQ(XQA), .Q(QA_int[62]));
datapath_latch_rf_2p_hsc_256x64_nogating uDQA63 (.CLK(CLKA), .Q_update(QA_update), .SE(1'b0), .SI(QA_int[62]), .D(QA_int[62]), .DFTRAMBYP(1'b0), .mem_path(mem_path[63]), .XQ(XQA), .Q(QA_int[63]));
always @ (CENB_ or CLKB_) begin
if(CLKB_ == 1'b0) begin
CENB_p2 = CENB_;
end
end
`ifdef POWER_PINS
always @ (RET1N_ or VDDPE or VDDCE or VSSE) begin
`else
always @ RET1N_ begin
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || CLKB_ === 1'bx)) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end
`else
`endif
`ifdef POWER_PINS
`else
pre_charge_st_b = 0;
pre_charge_st = 0;
`endif
if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b0 && CENB_p2 === 1'b0 ) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end else if (RET1N_ === 1'b1 && CENB_p2 === 1'b0 ) begin
failedWrite(1);
XQA = 1'b1; QA_update = 1'b1;
end
`ifdef POWER_PINS
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Illegal value for VDDPE %b in %m at %0t", VDDPE, $time);
failedWrite(1);
end else if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin
pre_charge_st_b = 1;
pre_charge_st = 1;
end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
pre_charge_st_b = 0;
pre_charge_st = 0;
if (VDDCE != 1'b1) begin
failedWrite(1);
end
`else
if (RET1N_ == 1'b0) begin
`endif
CENB_int = 1'bx;
AB_int = {8{1'bx}};
DB_int = {64{1'bx}};
STOV_int = 1'bx;
EMAB_int = {3{1'bx}};
RET1N_int = 1'bx;
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin
pre_charge_st_b = 0;
pre_charge_st = 0;
end else begin
pre_charge_st_b = 0;
pre_charge_st = 0;
`else
end else begin
`endif
#0;
CENB_int = 1'bx;
AB_int = {8{1'bx}};
DB_int = {64{1'bx}};
STOV_int = 1'bx;
EMAB_int = {3{1'bx}};
RET1N_int = 1'bx;
end
#0;
RET1N_int = RET1N_;
QA_update = 1'b0;
DB_sh_update = 1'b0;
end
always @ CLKB_ begin
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
if (VDDCE === 1'bx || VDDCE === 1'bz)
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
if (VDDPE === 1'bx || VDDPE === 1'bz)
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
if (VSSE === 1'bx || VSSE === 1'bz)
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
`endif
`ifdef POWER_PINS
if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin
`else
if (RET1N_ == 1'b0) begin
`endif
`ifdef POWER_PINS
end else if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
end else if (VSSE !== 1'b0) begin
`endif
// no cycle in retention mode
end else begin
if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin
failedWrite(0);
DB_sh_update = 1'b1; XDB_sh = 1'b1;
`ifdef POWER_PINS
end else if ((VDDCE === 1'bx || VDDCE === 1'bz)) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
`endif
end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
XDB_int = {64{1'b0}};
end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin
if (RET1N_ == 1'b0) begin
end else begin
CENB_int = CENB_;
STOV_int = STOV_;
EMAB_int = EMAB_;
RET1N_int = RET1N_;
if (CENB_int != 1'b1) begin
AB_int = AB_;
DB_int = DB_;
end
clk1_int = 1'b0;
CENB_int = CENB_;
STOV_int = STOV_;
EMAB_int = EMAB_;
RET1N_int = RET1N_;
if (CENB_int != 1'b1) begin
AB_int = AB_;
DB_int = DB_;
end
clk1_int = 1'b0;
WriteB;
if (CENB_int === 1'b0) previous_CLKB = $realtime;
#0;
if (((previous_CLKA == previous_CLKB) || ((STOV_int==1'b1 || STOV_int==1'b1) && CLKA_ == 1'b1 && CLKB_ == 1'b1)) && (CENA_int !== 1'b1 && CENB_int
!== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end
end
end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin
DB_sh_update = 1'b0; XDB_sh = 1'b0;
end
end
LAST_CLKB = CLKB_;
end
reg globalNotifier1;
initial globalNotifier1 = 1'b0;
initial cont_flag1_int = 1'b0;
always @ globalNotifier1 begin
if ($realtime == 0) begin
end else if (CENB_int === 1'bx || RET1N_int === 1'bx || (STOV_int && !CENB_int) === 1'bx ||
clk1_int === 1'bx) begin
failedWrite(1);
end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx) begin
failedWrite(1);
end else if (cont_flag1_int === 1'bx && (CENA_int !== 1'b1 && CENB_int !== 1'b1) && is_contention(AA_int, AB_int, 1'b1, 1'b0)) begin
cont_flag1_int = 1'b0;
$display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time);
ROW_CC = 1;
COL_CC = 1;
READ_WRITE = 1;
XQA = 1'b1; QA_update = 1'b1;
end else begin
#0;
WriteB;
end
#0;
globalNotifier1 = 1'b0;
end
// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports
`ifdef POWER_PINS
always @ (VDDCE or VDDPE or VSSE) begin
if (VDDCE === 1'bx || VDDCE === 1'bz) begin
$display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VDDCE = 1'b1;
end else begin
bad_VDDCE = 1'b0;
end
if (RET1N_ == 1'b1 && VDDPE !== 1'b1) begin
$display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VDDPE = 1'b1;
end else begin
bad_VDDPE = 1'b0;
end
if (VSSE !== 1'b0) begin
$display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time);
XQA = 1'b1; QA_update = 1'b1;
XDB_sh = 1'b1; DB_sh_update = 1'b1;
failedWrite(0);
bad_VSSE = 1'b1;
end else begin
bad_VSSE = 1'b0;
end
bad_power = bad_VDDCE | bad_VDDPE | bad_VSSE ;
end
`endif
function row_contention;
input [7:0] aa;
input [7:0] ab;
input wena;
input wenb;
reg result;
reg sameRow;
reg sameMux;
reg anyWrite;
begin
anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1;
sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0;
if (aa[7:1] == ab[7:1]) begin
sameRow = 1'b1;
end else begin
sameRow = 1'b0;
end
if (sameRow == 1'b1 && anyWrite == 1'b1)
row_contention = 1'b1;
else if (sameRow == 1'b1 && sameMux == 1'b1)
row_contention = 1'b1;
else
row_contention = 1'b0;
end
endfunction
function col_contention;
input [7:0] aa;
input [7:0] ab;
begin
if (aa[0:0] == ab[0:0])
col_contention = 1'b1;
else
col_contention = 1'b0;
end
endfunction
function is_contention;
input [7:0] aa;
input [7:0] ab;
input wena;
input wenb;
reg result;
begin
if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin
result = 1'b0;
end else if (aa == ab) begin
result = 1'b1;
end else begin
result = 1'b0;
end
is_contention = result;
end
endfunction
wire contA_flag = (CENA_int !== 1'b1 && CENB_ !== 1'b1) && ((is_contention(AB_, AA_int, 1'b0, 1'b1)));
wire contB_flag = (CENB_int !== 1'b1 && CENA_ !== 1'b1) && ((is_contention(AA_, AB_int, 1'b1, 1'b0)));
always @ NOT_CENA begin
CENA_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA7 begin
AA_int[7] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA6 begin
AA_int[6] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA5 begin
AA_int[5] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA4 begin
AA_int[4] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA3 begin
AA_int[3] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA2 begin
AA_int[2] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA1 begin
AA_int[1] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_AA0 begin
AA_int[0] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CENB begin
CENB_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB7 begin
AB_int[7] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB6 begin
AB_int[6] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB5 begin
AB_int[5] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB4 begin
AB_int[4] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB3 begin
AB_int[3] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB2 begin
AB_int[2] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB1 begin
AB_int[1] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_AB0 begin
AB_int[0] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB63 begin
DB_int[63] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB62 begin
DB_int[62] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB61 begin
DB_int[61] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB60 begin
DB_int[60] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB59 begin
DB_int[59] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB58 begin
DB_int[58] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB57 begin
DB_int[57] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB56 begin
DB_int[56] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB55 begin
DB_int[55] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB54 begin
DB_int[54] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB53 begin
DB_int[53] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB52 begin
DB_int[52] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB51 begin
DB_int[51] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB50 begin
DB_int[50] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB49 begin
DB_int[49] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB48 begin
DB_int[48] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB47 begin
DB_int[47] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB46 begin
DB_int[46] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB45 begin
DB_int[45] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB44 begin
DB_int[44] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB43 begin
DB_int[43] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB42 begin
DB_int[42] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB41 begin
DB_int[41] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB40 begin
DB_int[40] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB39 begin
DB_int[39] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB38 begin
DB_int[38] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB37 begin
DB_int[37] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB36 begin
DB_int[36] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB35 begin
DB_int[35] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB34 begin
DB_int[34] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB33 begin
DB_int[33] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB32 begin
DB_int[32] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB31 begin
DB_int[31] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB30 begin
DB_int[30] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB29 begin
DB_int[29] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB28 begin
DB_int[28] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB27 begin
DB_int[27] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB26 begin
DB_int[26] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB25 begin
DB_int[25] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB24 begin
DB_int[24] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB23 begin
DB_int[23] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB22 begin
DB_int[22] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB21 begin
DB_int[21] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB20 begin
DB_int[20] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB19 begin
DB_int[19] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB18 begin
DB_int[18] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB17 begin
DB_int[17] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB16 begin
DB_int[16] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB15 begin
DB_int[15] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB14 begin
DB_int[14] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB13 begin
DB_int[13] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB12 begin
DB_int[12] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB11 begin
DB_int[11] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB10 begin
DB_int[10] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB9 begin
DB_int[9] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB8 begin
DB_int[8] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB7 begin
DB_int[7] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB6 begin
DB_int[6] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB5 begin
DB_int[5] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB4 begin
DB_int[4] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB3 begin
DB_int[3] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB2 begin
DB_int[2] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB1 begin
DB_int[1] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_DB0 begin
DB_int[0] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_STOV begin
STOV_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_EMAA2 begin
EMAA_int[2] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMAA1 begin
EMAA_int[1] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMAA0 begin
EMAA_int[0] = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMASA begin
EMASA_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_EMAB2 begin
EMAB_int[2] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_EMAB1 begin
EMAB_int[1] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_EMAB0 begin
EMAB_int[0] = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_RET1N begin
RET1N_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CONTA begin
cont_flag0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CLKA_PER begin
clk0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CLKA_MINH begin
clk0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CLKA_MINL begin
clk0_int = 1'bx;
if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx;
end
always @ NOT_CONTB begin
cont_flag1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CLKB_PER begin
clk1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CLKB_MINH begin
clk1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
always @ NOT_CLKB_MINL begin
clk1_int = 1'bx;
if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx;
end
wire contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq1;
wire contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq1;
wire contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq1;
wire contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq0, contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq1;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1;
wire STOVeq0aRET1Neq1aCENAeq0, STOVeq1aRET1Neq1aCENAeq0, contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq1, contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq1, contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq1, contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq0;
wire contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq1, STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq0;
wire STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq1, STOVeq1aRET1Neq1, STOVeq0aRET1Neq1aCENBeq0;
wire STOVeq1aRET1Neq1aCENBeq0, RET1Neq1, RET1Neq1aCENAeq0, RET1Neq1aCENBeq0;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq0 = RET1N&&!EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq1 = RET1N&&!EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq0 = RET1N&&!EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq1 = RET1N&&!EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq0 = RET1N&&EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq1 = RET1N&&EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq0 = RET1N&&EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag;
assign contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq1 = RET1N&&EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA;
assign STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1 = !STOV&&RET1N&&EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq0 = RET1N&&!EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq1 = RET1N&&!EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq0 = RET1N&&!EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq1 = RET1N&&!EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq0 = RET1N&&EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq1 = RET1N&&EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq0 = RET1N&&EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag;
assign contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq1 = RET1N&&EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag;
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq0 = !STOV&&RET1N&&!EMAB[2]&&!EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq1 = !STOV&&RET1N&&!EMAB[2]&&!EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq0 = !STOV&&RET1N&&!EMAB[2]&&EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq1 = !STOV&&RET1N&&!EMAB[2]&&EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq0 = !STOV&&RET1N&&EMAB[2]&&!EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq1 = !STOV&&RET1N&&EMAB[2]&&!EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq0 = !STOV&&RET1N&&EMAB[2]&&EMAB[1]&&!EMAB[0];
assign STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq1 = !STOV&&RET1N&&EMAB[2]&&EMAB[1]&&EMAB[0];
assign STOVeq0aRET1Neq1aCENAeq0 = !STOV&&RET1N&&!CENA;
assign STOVeq1aRET1Neq1aCENAeq0 = STOV&&RET1N&&!CENA;
assign STOVeq0aRET1Neq1aCENBeq0 = !STOV&&RET1N&&!CENB;
assign STOVeq1aRET1Neq1aCENBeq0 = STOV&&RET1N&&!CENB;
assign STOVeq1aRET1Neq1 = STOV&&RET1N;
assign RET1Neq1 = RET1N;
assign RET1Neq1aCENAeq0 = RET1N&&!CENA;
assign RET1Neq1aCENBeq0 = RET1N&&!CENB;
specify
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b0)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[63] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[62] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[61] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[60] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[59] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[58] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[57] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[56] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[55] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[54] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[53] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[52] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[51] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[50] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[49] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[48] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[47] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[46] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[45] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[44] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[43] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[42] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[41] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[40] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[39] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[38] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[37] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[36] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[35] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[34] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[33] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[32] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[31] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[30] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[29] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[28] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[27] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[26] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[25] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[24] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[23] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[22] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[21] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[20] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[19] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
if (RET1N == 1'b1 && CENA == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1 && EMASA == 1'b1)
(posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP);
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$period(posedge CLKA, `ARM_MEM_PERIOD, NOT_CLKA_PER);
`else
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq0aRET1Neq1aEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
$period(posedge CLKA &&& STOVeq1aRET1Neq1, `ARM_MEM_PERIOD, NOT_CLKA_PER);
`endif
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$period(posedge CLKB, `ARM_MEM_PERIOD, NOT_CLKB_PER);
`else
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq0aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq0aRET1Neq1aEMAB2eq1aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
$period(posedge CLKB &&& STOVeq1aRET1Neq1, `ARM_MEM_PERIOD, NOT_CLKB_PER);
`endif
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$width(posedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH);
$width(negedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL);
`else
$width(posedge CLKA &&& STOVeq0aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH);
$width(posedge CLKA &&& STOVeq1aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH);
$width(negedge CLKA &&& STOVeq0aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL);
$width(negedge CLKA &&& STOVeq1aRET1Neq1aCENAeq0, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL);
`endif
// Define SDTC only if back-annotating SDF file generated by Design Compiler
`ifdef NO_SDTC
$width(posedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH);
$width(negedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL);
`else
$width(posedge CLKB &&& STOVeq0aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH);
$width(posedge CLKB &&& STOVeq1aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH);
$width(negedge CLKB &&& STOVeq0aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL);
$width(negedge CLKB &&& STOVeq1aRET1Neq1aCENBeq0, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL);
`endif
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq0aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq0aEMAA1eq1aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq0aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq0, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKB &&& contA_RET1Neq1aCENAeq0aEMAA2eq1aEMAA1eq1aEMAA0eq1, posedge CLKA, `ARM_MEM_COLLISION, 0.000, NOT_CONTA);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq0aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq0aEMAB1eq1aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq0aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq0, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& contB_RET1Neq1aCENBeq0aEMAB2eq1aEMAB1eq1aEMAB0eq1, posedge CLKB, `ARM_MEM_COLLISION, 0.000, NOT_CONTB);
$setuphold(posedge CLKA &&& RET1Neq1, posedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA);
$setuphold(posedge CLKA &&& RET1Neq1, negedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA7);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA6);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA5);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA7);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA6);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA5);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0);
$setuphold(posedge CLKB &&& RET1Neq1, posedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB);
$setuphold(posedge CLKB &&& RET1Neq1, negedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB7);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB6);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB5);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB7);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB6);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB5);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[63], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB63);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[62], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB62);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[61], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB61);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[60], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB60);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[59], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB59);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[58], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB58);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[57], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB57);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[56], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB56);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[55], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB55);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[54], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB54);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[53], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB53);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[52], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB52);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[51], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB51);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[50], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB50);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[49], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB49);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[48], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB48);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[47], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB47);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[46], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB46);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[45], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB45);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[44], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB44);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[43], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB43);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[42], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB42);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[41], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB41);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[40], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB40);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[39], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB39);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[38], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB38);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[37], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB37);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[36], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB36);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[35], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB35);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[34], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB34);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[33], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB33);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[32], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB32);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[31], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB31);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[30], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB30);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[29], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB29);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[28], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB28);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[27], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB27);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[26], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB26);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[25], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB25);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[24], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB24);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[23], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB23);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[22], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB22);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[21], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB21);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[20], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB20);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[19], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB19);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge STOV, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_STOV);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, posedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA);
$setuphold(posedge CLKA &&& RET1Neq1aCENAeq0, negedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, posedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1);
$setuphold(posedge CLKB &&& RET1Neq1aCENBeq0, negedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0);
$setuphold(negedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(posedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(negedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(posedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(posedge CENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(posedge CENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(posedge CENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
$setuphold(posedge CENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N);
endspecify
endmodule
`endcelldefine
`endif
`endif
`timescale 1ns/1ps
module rf_2p_hsc_256x64_nogating_error_injection (Q_out, Q_in, CLK, A, CEN);
output [63:0] Q_out;
input [63:0] Q_in;
input CLK;
input [7:0] A;
input CEN;
parameter LEFT_RED_COLUMN_FAULT = 2'd1;
parameter RIGHT_RED_COLUMN_FAULT = 2'd2;
parameter NO_RED_FAULT = 2'd0;
reg [63:0] Q_out;
reg entry_found;
reg list_complete;
reg [18:0] fault_table [127:0];
reg [18:0] fault_entry;
initial
begin
`ifdef DUT
`define pre_pend_path TB.DUT_inst.CHIP
`else
`define pre_pend_path TB.CHIP
`endif
`ifdef ARM_NONREPAIRABLE_FAULT
`pre_pend_path.SMARCHCHKBVCD_LVISION_MBISTPG_ASSEMBLY_UNDER_TEST_INST.MEM0_MEM_INST.u1.add_fault(8'd163,6'd6,2'd1,2'd0);
`endif
end
task add_fault;
//This task injects fault in memory
input [7:0] address;
input [5:0] bitPlace;
input [1:0] fault_type;
input [1:0] red_fault;
integer i;
reg done;
begin
done = 1'b0;
i = 0;
while ((!done) && i < 127)
begin
fault_entry = fault_table[i];
if (fault_entry[0] === 1'b0 || fault_entry[0] === 1'bx)
begin
fault_entry[0] = 1'b1;
fault_entry[2:1] = red_fault;
fault_entry[4:3] = fault_type;
fault_entry[10:5] = bitPlace;
fault_entry[18:11] = address;
fault_table[i] = fault_entry;
done = 1'b1;
end
i = i+1;
end
end
endtask
//This task removes all fault entries injected by user
task remove_all_faults;
integer i;
begin
for (i = 0; i < 128; i=i+1)
begin
fault_entry = fault_table[i];
fault_entry[0] = 1'b0;
fault_table[i] = fault_entry;
end
end
endtask
task bit_error;
// This task is used to inject error in memory and should be called
// only from current module.
//
// This task injects error depending upon fault type to particular bit
// of the output
inout [63:0] q_int;
input [1:0] fault_type;
input [5:0] bitLoc;
begin
if (fault_type === 2'd0)
q_int[bitLoc] = 1'b0;
else if (fault_type === 2'd1)
q_int[bitLoc] = 1'b1;
else
q_int[bitLoc] = ~q_int[bitLoc];
end
endtask
task error_injection_on_output;
// This function goes through error injection table for every
// read cycle and corrupts Q output if fault for the particular
// address is present in fault table
//
// If fault is redundant column is detected, this task corrupts
// Q output in read cycle
//
// If fault is repaired using repair bus, this task does not
// courrpt Q output in read cycle
//
output [63:0] Q_output;
reg list_complete;
integer i;
reg [4:0] FRA_reg;
reg [6:0] row_address;
reg [0:0] column_address;
reg [5:0] bitPlace;
reg [1:0] fault_type;
reg [1:0] red_fault;
reg valid;
reg [5:0] msb_bit_calc;
begin
entry_found = 1'b0;
list_complete = 1'b0;
i = 0;
Q_output = Q_in;
while(!list_complete)
begin
fault_entry = fault_table[i];
{row_address, column_address, bitPlace, fault_type, red_fault, valid} = fault_entry;
FRA_reg = row_address/4;
i = i + 1;
if (valid == 1'b1)
begin
if (red_fault === NO_RED_FAULT)
begin
if (row_address == A[7:1] && column_address == A[0:0])
begin
if (bitPlace < 32)
bit_error(Q_output,fault_type, bitPlace);
else if (bitPlace >= 32 )
bit_error(Q_output,fault_type, bitPlace);
end
end
end
else
list_complete = 1'b1;
end
end
endtask
always @ (Q_in or CLK or A or CEN)
begin
if (CEN === 1'b0)
error_injection_on_output(Q_out);
else
Q_out = Q_in;
end
endmodule