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macroplacement
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lvzhengyang
macroplacement
Commits
c4759ced
Commit
c4759ced
authored
Jun 11, 2022
by
Ravi Varadarajan
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Update floorplan def dimensions
Signed-off-by: Ravi Varadarajan <rvaradarajan@ucsd.edu>
parent
d507cb8d
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Flows/NanGate45/ariane136/def/ariane136_fp.def
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Flows/NanGate45/ariane136/def/ariane136_fp.def
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c4759ced
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@@ -3,26 +3,7 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN ariane ;
UNITS DISTANCE MICRONS 2000 ;
TRACKS X 190 DO 8947 STEP 380 LAYER metal1 ;
TRACKS Y 140 DO 12143 STEP 280 LAYER metal1 ;
TRACKS X 190 DO 8947 STEP 380 LAYER metal2 ;
TRACKS Y 140 DO 12143 STEP 280 LAYER metal2 ;
TRACKS X 190 DO 8947 STEP 380 LAYER metal3 ;
TRACKS Y 140 DO 12143 STEP 280 LAYER metal3 ;
TRACKS X 190 DO 6072 STEP 560 LAYER metal4 ;
TRACKS Y 140 DO 6072 STEP 560 LAYER metal4 ;
TRACKS X 190 DO 6072 STEP 560 LAYER metal5 ;
TRACKS Y 140 DO 6072 STEP 560 LAYER metal5 ;
TRACKS X 190 DO 6072 STEP 560 LAYER metal6 ;
TRACKS Y 140 DO 6072 STEP 560 LAYER metal6 ;
TRACKS X 190 DO 2125 STEP 1600 LAYER metal7 ;
TRACKS Y 140 DO 2125 STEP 1600 LAYER metal7 ;
TRACKS X 190 DO 2125 STEP 1600 LAYER metal8 ;
TRACKS Y 140 DO 2125 STEP 1600 LAYER metal8 ;
TRACKS X 190 DO 1063 STEP 3200 LAYER metal9 ;
TRACKS Y 140 DO 1063 STEP 3200 LAYER metal9 ;
TRACKS X 190 DO 1063 STEP 3200 LAYER metal10 ;
TRACKS Y 140 DO 1063 STEP 3200 LAYER metal10 ;
DIEAREA ( 0 0 ) ( 3400000 3400000 ) ;
PINS 495 ;
- axi_req_o\[ar\]\[addr\][0] + NET axi_req_o\[ar\]\[addr\][0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
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