Updated scripts and bp_quad inputs

Signed-off-by: sakundu <sakundu@ucsd.edu>

Flows/NanGate45/bp_quad/scripts/cadence/rtl/fakeram45_32x32_dp.v

+module fakeram_32x32_dp
+(
+  QA, 
+  CLKA, 
+  CENA, 
+  AA, 
+  CLKB,
+  CENB, 
+  AB, 
+  DB, 
+  STOV, 
+  EMAA, 
+  EMASA, 
+  EMAB, 
+  RET1N
+);
+
+input CLKA;
+input CLKB;
+
+input CENA;
+input [4:0]  AA;
+output [31:0] QA;
+
+input CENB;
+input [4:0]  AB;
+input [31:0] DB;
+
+input STOV;
+input [2:0] EMAA; 
+input EMASA;
+input [2:0] EMAB;
+input RET1N;
+
+assign STOV = 1'b0;
+assign EMASA = 1'b0;	
+assign EMAA = 3'b010;	// Extra margin adjustment A: Default for 0.8V
+assign EMAB = 3'b010;	// Extra margin adjustment B: Default for 0.8V
+assign RET1N = 1'b1;	
+wire [31:0] QB;
+wire [31:0] QA1;
+
+fakeram45_32x32 rmod_a
+(
+   .rd_out(QA1),
+   .addr_in(AA),
+   .we_in(~CENA),
+   .wd_in(DB), //dummy
+   .w_mask_in(DB), //dummy
+   .clk(CLKA),
+   .ce_in(CENA)
+);
+
+fakeram45_32x32 rmod_b
+(
+   .rd_out(QB), //dummy
+   .addr_in(AB),
+   .we_in(CENB),
+   .wd_in(DB), 
+   .w_mask_in(DB),
+   .clk(CLKB),
+   .ce_in(CENB)
+);
+
+genvar k;
+generate
+    for (k = 0; k < 32; k=k+1) begin
+        assign QA[k] = (~CENB & QB[k]) | (CENB & QA1[k]);
+    end
+endgenerate
+
+endmodule
+

Flows/NanGate45/bp_quad/scripts/cadence/rtl_list.tcl

 set rtl_all {
   ./rtl/bsg_chip_block.sv2v.v
+  ./rtl/fakeram45_32x32_dp.v
 }

Flows/NanGate45/bp_quad/scripts/cadence/run_genus_hybrid.tcl

@@ -44,6 +44,7 @@ set target_library $list_lib
 set_db hdl_flatten_complex_port true
 set_db hdl_record_naming_style  %s_%s
 set_db auto_ungroup none
+set_db hdl_error_on_blackbox true
 
 
 if {![info exist ::env(PHY_SYNTH)] || $::env(PHY_SYNTH) == 0} {

Flows/util/extract_report.tcl

@@ -62,7 +62,7 @@ proc extract_report {stage} {
        timeDesign -postCTS -prefix ${stage} 
     } elseif { $stage == "postRoute" } {
        timeDesign -postRoute -prefix ${stage}
-    } elseif { $stage == "postRouetOpt" } {
+    } elseif { $stage == "postRouteOpt" } {
        timeDesign -postRoute -prefix ${stage}
     } elseif { $stage == "postSynth" } {
        timeDesign -prePlace -prefix ${stage}

Flows/util/pdn_flow.tcl

@@ -113,11 +113,11 @@ while { $i < $lcount } {
         } elseif { $ism == 1 } {
             setAddStripeMode -extend_to_closest_target none 
             setAddStripeMode -inside_cell_only true
-            foreach mcell [dbget [dbget top.insts.cell.subClass block -p2 ].cell.name -u] {
+            foreach mcell [dbget [dbget top.insts.cell.subClass block -p2 ].cell.name -u -e] {
                 addStripe -layer $lname -direction $dir -nets $nets -width $wdth -spacing $spc \
                     -start_offset $sofst -set_to_set_distance $ptch -master $mcell
             }
-            foreach inst [dbget [dbget top.insts.cell.subClass block -p2 ].name ] {
+            foreach inst [dbget [dbget top.insts.cell.subClass block -p2 ].name -e ] {
                 createRouteBlk -inst $inst -cover -layer $prevLayer -name mcro_blk
             }
         } elseif { $isam == 1 } {

Flows/util/plc_pb_to_placement_tcl.py

@@ -9,7 +9,14 @@ plc_file = sys.argv[1]
 pb_file = sys.argv[2]
 place_tcl = sys.argv[3]
 
-print(f'PLC:\t{plc_file}\nPB:\t{pb_file}\nTCL:\t{place_tcl}')
+origin_x = 0
+origin_y = 0
+print(f"Length of Argument: {len(sys.argv)}")
+if len(sys.argv) == 6:
+    origin_x = float(sys.argv[4])
+    origin_y = float(sys.argv[5])
+
+print(f'PLC:\t{plc_file}\nPB:\t{pb_file}\nTCL:\t{place_tcl}\nOrigin X:{origin_x} Y:{origin_y}')
 
 orientMap = {
     "N" : "R0",
@@ -94,8 +101,8 @@ for line in lines:
     if id_pattern.match(words[0]) and (len(words) == 5):
         idx = int(words[0])
         if node_list[idx].pb_type == '"MACRO"':
-            x = float(words[1]) - float(node_list[idx].width)/2.0
-            y = float(words[2]) - float(node_list[idx].height)/2.0
+            x = float(words[1]) - float(node_list[idx].width)/2.0 + origin_x
+            y = float(words[2]) - float(node_list[idx].height)/2.0 + origin_y
             orient = orientMap[words[3]]
             isFixed = words[4]
             macro_name = node_list[idx].name.replace('_[', '\[')