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macroplacement
Unverified Commit 86325641 by ZhiangWang033 Committed by GitHub
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Delete .z2of

parent 70edef8e
Showing with 0 additions and 931 deletions
Flows/NanGate45/ariane133/scripts/cadence/.z2of deleted 100644 → 0
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[1].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[2].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[3].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[0].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[1].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[2].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[3].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[4].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[5].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[6].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[3].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[4].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[5].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[6].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].data_sram/macro_mem[7].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].tag_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].tag_sram/macro_mem[1].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/sram_block[7].tag_sram/macro_mem[2].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_nbdcache/valid_dirty_sram/macro_mem[0].i_ram, R0, R180, MX, MY, R90, R270, MX90, MY90
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[0].i_ram
Macro2Core 0
UserSpacingL 3736
UserSpacingB 0
UserSpacingR 0
UserSpacingT 0
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[1].i_ram
Macro2Core 0
UserSpacingL 3736
UserSpacingB 0
UserSpacingR 0
UserSpacingT 0
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[2].i_ram
Macro2Core 0
UserSpacingL 3736
UserSpacingB 0
UserSpacingR 0
UserSpacingT 0
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[3].i_ram
Macro2Core 0
UserSpacingL 3736
UserSpacingB 0
UserSpacingR 0
UserSpacingT 0
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[4].i_ram
Macro2Core 0
UserSpacingL 3736
UserSpacingB 0
UserSpacingR 0
UserSpacingT 0
i_cache_subsystem/i_icache/sram_block[0].data_sram/macro_mem[5].i_ram
Macro2Core 0
UserSpacingL 3736
UserSpacingB 0
UserSpacingR 0
UserSpacingT 0
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