@@ -25,19 +25,15 @@ Inside each directory are the following sub-directories that contain all of the
-*scripts* directory contains the setup and scripts to run the full SP&R flow using both commercial and open-source tools.
-*run* directory to peform the SP&R runs using the runscripts available in the *scripts* direcotry.
We provide the runscripts for all the flows and they are available in the *./\<enablement\>/\<testcase\>/scripts/* directory. The sub-directories available in the scripts directory are as follows.
The runscripts for all the flows are available in the *./\<enablement\>/\<testcase\>/scripts/* directory. Inside *script* directory are the following sub-directories.
-*cadence* directory contains all the runscripts related to [Flow-1](./figures/flow-1.PNG), [Flow-2](./figures/flow-2.PNG). We will also add [Flow-4](./figures/flow-4.PNG) scripts here.
-*OpenROAD* directory contains the *<testcase>.tar.gz* file, which includes all the required file to run [Flow-3](./figures/flow-3.PNG) using OpenROAD-flow-scripts ([ORFS](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/tree/master/flow/platforms/nangate45)).
-*OpenROAD* directory contains the *<testcase>.tar.gz* file, which includes all the required files to run [Flow-3](./figures/flow-3.PNG) using OpenROAD-flow-scripts ([ORFS](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/)).
The detailed stpes to run SP&R using the proprietary (commercial) tools **Cadence Genus** (Synthesis) and **Cadence Innovus** (P&R), and the open-source tools **Yosys** (Synthesis) and **OpenROAD** (P&R) are as follows.
All the flows uses the *RTL* available under the [*Testcases*](../Testcases/) directory and the *.lef*, *.lib* and *qrc* files available under the [*Enablements*](../Enablements/) directory. All the required SRAM models are generated and available under the [*Enablements*](../Enablements/) directory.
All the flows uses the *RTL* from the [*Testcases*](../Testcases/) directory and the *.lef*, *.lib* and *qrc* files from the [*Enablements*](../Enablements/) directory. The required SRAM models for each testcase are generated and also available under the [*Enablements*](../Enablements/) directory. The detailed steps for different tools are as follows.
All the required runscripts are available in the *./\<enablement\>/\<testcase\>/scripts/cadence/* directory. The steps to modify *run.sh* to launch SP&R runs for Flow-1 and Flow-2 are as follows.
- To launch Flow-1 set the **PHY_SYNTH** environment variable to *0* in the *run.sh* file.
``` export PHY_SYNTH=0 ```
...
...
@@ -47,57 +43,62 @@ All the required runscripts are available in the *./\<enablement\>/\<testcase\>/
``` ./run.sh ```
**Synthesis:** The *run_genus_hybrid.tcl* is used to run the logical synthesis using Genus and physical synthesis using Genus iSpatial. It utilizes the **PHY_SYNTH** environment variable to choose which flow to run. Minor details of each synthesis flow are as follows.
- Logical synthesis using Genus (Flow-1): We use the *elaborate*, *syn_generic*, *syn_map* and *syn_opt* commands to generate the synthesized netlist. This synthesized netlist is available in the *netlist* directory for each testcase on all enablements.
- Physical synthesis using Genus iSpatial (Flow-2): We use the *elaborate*, *syn_generic -physical*, *syn_map -physical* and *syn_opt -iSpatial* commands to generate the sunthesized netlist. In this step we provide the floorplan def with placed macros and pins as an extra input compared to Flow-1. This def file is generate in Flow-1.
- Physical synthesis using Genus iSpatial for Circuit Training (Flow-4): This is same as Flow-2 synthesis flow. Only difference is the input def file contains only place pin information and no macro information.
**Synthesis:** The *run_genus_hybrid.tcl* is used to run the logical synthesis using Genus and physical synthesis using Genus iSpatial. It utilizes the **PHY_SYNTH** environment variable to determine the flow. Minor details of each synthesis flow are as follows.
- Logical synthesis using Genus (Flow-1): We use the *elaborate*, *syn_generic*, *syn_map* and *syn_opt* commands to generate the synthesized netlist. This synthesized netlist is copied into the *netlist* directory.
- Physical synthesis using Genus iSpatial (Flow-2): We use the *elaborate*, *syn_generic -physical*, *syn_map -physical* and *syn_opt -iSpatial* commands to generate the sunthesized netlist. In this step we provide the floorplan def with placed macros and pins as an additional input compared to Flow-1. This def file is generate in Flow-1.
- Physical synthesis using Genus iSpatial for Circuit Training (Flow-4): This is same as Flow-2 synthesis flow. The only difference is that the input def file does not include macro placement information.
The command to launch only the synthesis job is as follows.
The command to launch only the synthesis run is as follows.
```
# export PHY_SYNTH=0 #For Flow-1 uncomment this line
# export PHY_SYNTH=1 #For Flow-2 uncomment this line
genus -overwrite -log log/genus.log -no_gui -files run_genus_hybrid.tcl
```
We use the constraint file available in the *constraint* directory for the synthesis run. We set the target clock period to a reasonable value that is not too easy or hard for the tool to achieve.
<!-- We use the constraint file available in the *constraint* directory for the synthesis run. We set the target clock period to a reasonable value that is not too easy or hard for the tool to achieve. -->
**P\&R:** The *run_invs.tcl* is used to run the place and route using Cadence Innovus. The netlist and constraint generated during synthesis flow are used in this step. It also utilizes the **PHY_SYNTH** environment variable to choose which flow to run. Minor details of each P&R flow are as follows.
- Flow-1
- We use aspect ratio 1 and a utilization value in the range of 40% to 60%. All the pins are placed on the left side of the floorplan and the def file *\<design\>_fp.def* is available in the def directory. The following command is used to place the pins.
- We use aspect ratio 1 and a utilization value in the range of 40% to 60%. All the pins are placed on the left side of the floorplan and the floorplan def file *\<design\>_fp.def* is created and copied into the def directory for place and route. The following command is used to place the pins.
```
### pin_list contains the name of all the top level pins. Here Y1 < Y2. LAYER1 and LAYER2 are two horizontal layer above M1 or metal1 or met1 ###
- The *place_design -concurrent_macros* command is used to place the macros and the def file *\<design\>_fp_placed_macros.def* is available in the def directory.
- We use default HALO width based on the enablement for all the macros using the following command.
```
### HALO_WIDTH is 2um for ASAP7 and 5um for NanGate45 and SKY130HD FakeStack enablements ###
- The *place_design -concurrent_macros* command is used to place the macros and the def file *\<design\>_fp_placed_macros.def* is created and copied into the def directory for synthesis using Flow-2.
- It uses *place_opt_design*, *ccopt_design* and *routeDesign* commands for placement, CTS and routing of the design.
- Flow-2
- The *run_invs.tcl* script utilizes the *.def* file generated by the Genus iSpatial flow as a starting point.
- Similar to Flow-1 it uses *place_opt_design*, *ccopt_design* and *routeDesign* commands for placement, CTS and routing of the design.
The command to launch the SP&R job is as follows.
The command to launch the P&R run is as follows.
```
### Make sure you have ran the synthesis already. run_invs.tcl uses the output generated in synthesis stage ###
### Make sure you have run the synthesis synthesis step. run_invs.tcl uses the output files generated synthesis ###
# export PHY_SYNTH=0 #For Flow-1 uncomment this line
# export PHY_SYNTH=1 #For Flow-2 uncomment this line
innovus -64 -init run_invs.tcl -log log/run.log
```
Below is the screenshot of the Ariane SP\&R database with 136 memory macros using Cadence flow on NanGate45 enablement.
The screenshot of the Ariane 136 testcase using the Cadence Flow-1 on NanGate45 enablement is given below.
This script was written and developed by ABKGroup students at UCSD; however, the underlying commands and reports are copyrighted by Cadence. We thank Cadence for granting permission to share our research to help promote and foster the next generation of innovators.
### **Using OpenROAD-flow-scripts:**
Clone ORFS and build OpenROAD tools following the steps given [here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts). To run SP&R using OpenROAD tools follow the below mentioned steps:
## **Using OpenROAD-flow-scripts:**
Clone ORFS and build OpenROAD tools following the steps given [here](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts). Use the following steps to run SP&R using OpenROAD tools:
1. Copy *./\<enablement\>/\<testcase\>/scripts/OpenROAD/\<design\>.tar.gz* file to *{ORFS Clone Directory}/OpenROAD-flow-scripts/flow/designs/\<enablement\>* area.
2. Use command *tar -xvf \<design\>.tar.gz* to untar *\<design\>.tar.gz*. This will generate *\<design\>* directory which contains all the files required to run SP&R using ORFS.
3. To launch the SP&R job go to the flow directory and use the below command
2. Use the command *tar -xvf \<design\>.tar.gz* to untar *\<design\>.tar.gz*. This will generate *\<design\>* directory which contains all the files required to run SP&R using ORFS.
3. To launch the SP&R job go to the flow directory and use the make command
```
make DESIGN_CONFIG=./designs/<enablement>/<design>/config_hier.mk
```
4. config_hier.mk uses the **RTL-MP** (RTL Macro Placer) for macro placement. If you wish to run macro placement using the older **Triton Macro Placer**, please use the below command:
```
make DESIGN_CONFIG=./designs/<enablement>/<design>/config.mk
```
Below is the screenshot of the Ariane SP\&R database with 136 memory macros using the ORFS (RTL-MP) flow.
```
The screenshot of the Ariane 136 testcase using the ORFS (RTL-MP) on NanGate45 enablement is given below.
