Commit 2dae4729 by sakundu

Updated Our Progress. Added GF12 results. Updated macro shuffling scripts and…

Updated Our Progress. Added GF12 results. Updated macro shuffling scripts and Bookshelf to Protobuf translator.

Signed-off-by: sakundu <sakundu@ucsd.edu>
parent 158db901
......@@ -462,7 +462,7 @@ class canvas_object:
if re.match(r"(^\s*#)|(^\s*UCLA\s*scl\s*1.0$)|(^\s*$)|(^\sEnd\s*$)", line):
continue
if re.match("^\s*CoreRow\s*Horizontal\s*$", line):
if re.match(r"^\s*CoreRow\s*Horizontal\s*$", line):
self.rows.append(row(row_id))
crow = self.rows[row_id]
row_id += 1
......
......@@ -2680,7 +2680,7 @@ We see from the results in the [CT repo](https://github.com/google-research/circ
<td>5059042</td>
</tr>
<tr>
<td>postSynt_WS(ns)</td>
<td>postSynth_WS(ns)</td>
<td>-0.764</td>
<td>-0.764</td>
<td>-0.764</td>
......@@ -2725,7 +2725,7 @@ We see from the results in the [CT repo](https://github.com/google-research/circ
<td>-0.083</td>
</tr>
<tr>
<td>postSynt_TNS(ns)</td>
<td>postSynth_TNS(ns)</td>
<td>-366.528</td>
<td>-592.301</td>
<td>-501.314</td>
......@@ -3038,7 +3038,7 @@ We further ran coordinate descent (CD) placer on the CT outcomes and the followi
<td>4969937</td>
</tr>
<tr>
<td>postSynt_WS (ns)</td>
<td>postSynth_WS (ns)</td>
<td>-0.764</td>
<td>-0.764</td>
<td>-0.764</td>
......@@ -3083,7 +3083,7 @@ We further ran coordinate descent (CD) placer on the CT outcomes and the followi
<td>-0.137</td>
</tr>
<tr>
<td>postSynt_TNS (ns)</td>
<td>postSynth_TNS (ns)</td>
<td>-351.045</td>
<td>-331.782</td>
<td>-406.717</td>
......@@ -3571,7 +3571,7 @@ We have collected macro placement generated by CT runs for Ariane133-NG45-68%-1.
<td>0.1045</td>
</tr>
<tr>
<td>postSynt_WS (ns)</td>
<td>postSynth_WS (ns)</td>
<td>-0.764</td>
<td>-0.764</td>
<td>-0.764</td>
......@@ -3661,7 +3661,7 @@ We have collected macro placement generated by CT runs for Ariane133-NG45-68%-1.
<td>-0.076</td>
</tr>
<tr>
<td>postSynt_TNS (ns)</td>
<td>postSynth_TNS (ns)</td>
<td>-326.535</td>
<td>-382.684</td>
<td>-477.484</td>
......@@ -4039,7 +4039,7 @@ We have trained CT to generate a macro placement for the [MemPool Group design](
<table>
<thead>
<tr>
<th colspan="10">MemPool group-NG45-68%-4ns CT result (Flow2. Final DRC Count: 19367) (<a href="https://tensorboard.dev/experiment/32FLUvjVSjaQ0wYO1m9vJQ/#scalars">Link</a> to Tensorboard)</th>
<th colspan="10"><p align="center">MemPool group-NG45-68%-4ns CT result (Flow2. Final DRC Count: 19367) (<a href="https://tensorboard.dev/experiment/32FLUvjVSjaQ0wYO1m9vJQ/#scalars">Link</a> to Tensorboard)</p></th>
</tr>
</thead>
<tbody>
......@@ -4126,7 +4126,7 @@ We have trained CT to generate a macro placement for the [MemPool Group design](
<table>
<thead>
<tr>
<th colspan="10">MemPool group-NG45-68%-4ns CMP result (Flow2. Final DRC Count: 26)</th>
<th colspan="10"><p align="center">MemPool group-NG45-68%-4ns CMP result (Flow2. Final DRC Count: 26)</p></th>
</tr>
</thead>
<tbody>
......@@ -4210,6 +4210,466 @@ We have trained CT to generate a macro placement for the [MemPool Group design](
<img width="300" src="./images/image53.png" alg="MemPool_Group_CMP_Route">
</p>
**November 25:**
<a id="November25"></a>
We have run CT to generate macro placement for Ariane133, BlackParrot and MemPool Group designs on GLOBALFOUNDRIES 12nm (GF12) enablement. The following tables present the normalized design metrics. Core area, standard cell area and macro area are normalized with respect to the core area. Total power is normalized w.r.t. the reported preCTS total power when CMP is used. Similarly, we normalize the wirelength and congestion based on the reported preCTS wirelength and congestion when CMP is used. The timing numbers are normalized w.r.t. the target clock period.
- The following table and screenshots provide details of Ariane133 GF12 implementation when CMP is used to generate the initial macro placement.
<table>
<thead>
<tr>
<th colspan="10"><p align="center">Ariane133-GF12-68% CMP</p></th>
</tr>
</thead>
<tbody>
<tr>
<td>Physical Design Stage</td>
<td>Core Area</td>
<td>Standard Cell Area</td>
<td>Macro Area</td>
<td>Total Power</td>
<td>Wirelength</td>
<td>WS</td>
<td>TNS</td>
<td>Congestion <br>(H)</td>
<td>Congestion (V)</td>
</tr>
<tr>
<td>preCTS</td>
<td>1</td>
<td>0.137</td>
<td>0.555</td>
<td>1.0000</td>
<td>1.0000</td>
<td>-0.130</td>
<td>-259.985</td>
<td>0.00</td>
<td>1.00</td>
</tr>
<tr>
<td>postCTS</td>
<td>1</td>
<td>0.139</td>
<td>0.555</td>
<td>1.1442</td>
<td>1.0112</td>
<td>-0.145</td>
<td>-114.783</td>
<td>0.00</td>
<td>1.00</td>
</tr>
<tr>
<td>postRoute</td>
<td>1</td>
<td>0.139</td>
<td>0.555</td>
<td>1.1356</td>
<td>1.0432</td>
<td>-0.185</td>
<td>-142.688</td>
<td></td>
<td></td>
</tr>
<tr>
<td>postRouteOpt</td>
<td>1</td>
<td>0.139</td>
<td>0.555</td>
<td>1.1352</td>
<td>1.0443</td>
<td>-0.159</td>
<td>-142.274</td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<p align="center">
<img width="300" src="./images/Ariane133_GF12_CMP_Place.png" alg="Ariane133_GF12_CMP_Place">
<img width="300" src="./images/Ariane133_GF12_CMP_Route.png" alg="Ariane133_GF12_CMP_Route">
</p>
- The following table and screenshots provide details of Ariane133 GF12 implementation when CT is used to generate the initial macro placement.
<table>
<thead>
<tr>
<th colspan="10"><p align="center">Ariane133-GF12-68% CT (<a href="https://tensorboard.dev/experiment/PFZd6uMpS6yjbqZ3GqRcDA/">Link</a> to Tensorboard)</p></th>
</tr>
</thead>
<tbody>
<tr>
<td>Physical Design Stage</td>
<td>Core Area</td>
<td>Standard Cell Area</td>
<td>Macro Area</td>
<td>Total Power</td>
<td>Wirelength</td>
<td>WS</td>
<td>TNS</td>
<td>Congestion (H)</td>
<td>Congestion (V)</td>
</tr>
<tr>
<td>preCTS</td>
<td>1</td>
<td>0.138</td>
<td>0.555</td>
<td>1.0120</td>
<td>1.1652</td>
<td>-0.130</td>
<td>-239.531</td>
<td>0.00</td>
<td>0.50</td>
</tr>
<tr>
<td>postCTS</td>
<td>1</td>
<td>0.140</td>
<td>0.555</td>
<td>1.1623</td>
<td>1.1828</td>
<td>-0.138</td>
<td>-140.220</td>
<td>0.00</td>
<td>1.00</td>
</tr>
<tr>
<td>postRoute</td>
<td>1</td>
<td>0.140</td>
<td>0.555</td>
<td>1.1530</td>
<td>1.2151</td>
<td>-0.138</td>
<td>-145.883</td>
<td></td>
<td></td>
</tr>
<tr>
<td>postRouteOpt</td>
<td>1</td>
<td>0.140</td>
<td>0.555</td>
<td>1.1519</td>
<td>1.2161</td>
<td>-0.145</td>
<td>-115.805</td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<p align="center">
<img width="300" src="./images/Ariane133_GF12_CT_Place.png" alg="Ariane133_GF12_CT_Place">
<img width="300" src="./images/Ariane133_GF12_CT_Route.png" alg="Ariane133_GF12_CT_Route">
</p>
- The following table and screenshots provide details of BlackParrot (Quad Core) GF12 implementation when CMP is used to generate the initial macro placement.
<table>
<thead>
<tr>
<th colspan="10"><p align="center">BlackParrot-GF12-68% CMP</p></th>
</tr>
</thead>
<tbody>
<tr>
<td>Physical Design Stage</td>
<td>Core Area</td>
<td>Standard Cell Area</td>
<td>Macro Area</td>
<td>Total Power</td>
<td>Wirelength</td>
<td>WS</td>
<td>TNS</td>
<td>Congestion(H)</td>
<td>Congestion(V)</td>
</tr>
<tr>
<td>preCTS</td>
<td>1</td>
<td>0.176</td>
<td>0.501</td>
<td>1.0000</td>
<td>1.0000</td>
<td>0.001</td>
<td>0.000</td>
<td>1.00</td>
<td>1.00</td>
</tr>
<tr>
<td>postCTS</td>
<td>1</td>
<td>0.178</td>
<td>0.501</td>
<td>1.1526</td>
<td>1.0079</td>
<td>0.000</td>
<td>0.000</td>
<td>1.00</td>
<td>1.00</td>
</tr>
<tr>
<td>postRoute</td>
<td>1</td>
<td>0.178</td>
<td>0.501</td>
<td>1.1436</td>
<td>1.0304</td>
<td>-0.014</td>
<td>-2.629</td>
<td></td>
<td></td>
</tr>
<tr>
<td>postRouteOpt</td>
<td>1</td>
<td>0.178</td>
<td>0.501</td>
<td>1.1437</td>
<td>1.0306</td>
<td>0.001</td>
<td>0.000</td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<p align="center">
<img width="300" src="./images/BP_Quad_GF12_CMP_Place.png" alg="BP_Quad_GF12_CMP_Place">
<img width="300" src="./images/BP_Quad_GF12_CMP_Route.png" alg="BP_Quad_GF12_CMP_Route">
</p>
- The following table and screenshots provide details of BlackParrot (Quad Core) GF12 implementation when CT is used to generate the initial macro placement.
<table>
<thead>
<tr>
<th colspan="10"><p align="center">BlackParrot-GF12-68% CT (<a href="https://tensorboard.dev/experiment/6grbdijUQDe5m8KGfOSpnw/">Link</a> to Tensorboard)</p></th>
</tr>
</thead>
<tbody>
<tr>
<td>Physical Design Stage</td>
<td>Core Area</td>
<td>Standard Cell Area</td>
<td>Macro Area</td>
<td>Total Power</td>
<td>Wirelength</td>
<td>WS</td>
<td>TNS</td>
<td>Congestion(H)</td>
<td>Congestion(V)</td>
</tr>
<tr>
<td>preCTS</td>
<td>1</td>
<td>0.178</td>
<td>0.501</td>
<td>1.1068</td>
<td>1.6993</td>
<td>0.001</td>
<td>0.000</td>
<td>3.00</td>
<td>2.00</td>
</tr>
<tr>
<td>postCTS</td>
<td>1</td>
<td>0.179</td>
<td>0.501</td>
<td>1.2621</td>
<td>1.7058</td>
<td>0.000</td>
<td>0.000</td>
<td>2.00</td>
<td>2.20</td>
</tr>
<tr>
<td>postRoute</td>
<td>1</td>
<td>0.179</td>
<td>0.501</td>
<td>1.2469</td>
<td>1.7372</td>
<td>-0.028</td>
<td>-11.492</td>
<td></td>
<td></td>
</tr>
<tr>
<td>postRouteOpt</td>
<td>1</td>
<td>0.179</td>
<td>0.501</td>
<td>1.2462</td>
<td>1.7379</td>
<td>0.001</td>
<td>0.000</td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<p align="center">
<img width="300" src="./images/BP_Quad_GF12_CT_Place.png" alg="BP_Quad_GF12_CT_Place">
<img width="300" src="./images/BP_Quad_GF12_CT_Route.png" alg="BP_Quad_GF12_CT_Route">
</p>
- The following table and screenshots provide details of MemPool Group GF12 implementation when CMP is used to generate the initial macro placement.
<table>
<thead>
<tr>
<th colspan="10"><p align="center">MemPool Group-GF12-68% CMP</p></th>
</tr>
</thead>
<tbody>
<tr>
<td>Physical Design Stage</td>
<td>Core Area</td>
<td>Standard Cell Area</td>
<td>Macro Area</td>
<td>Total Power</td>
<td>Wirelength</td>
<td>WS</td>
<td>TNS</td>
<td>Congestion(H)</td>
<td>Congestion(V)</td>
</tr>
<tr>
<td>preCTS</td>
<td>1</td>
<td>0.415</td>
<td>0.308</td>
<td>1.0000</td>
<td>1.0000</td>
<td>-0.154</td>
<td>-12479.05</td>
<td>1.00</td>
<td>1.00</td>
</tr>
<tr>
<td>postCTS</td>
<td>1</td>
<td>0.406</td>
<td>0.308</td>
<td>1.0663</td>
<td>1.0109</td>
<td>-0.134</td>
<td>-1828.60</td>
<td>1.07</td>
<td>1.26</td>
</tr>
<tr>
<td>postRoute</td>
<td>1</td>
<td>0.406</td>
<td>0.308</td>
<td>1.0631</td>
<td>1.0507</td>
<td>-0.213</td>
<td>-5882.00</td>
<td></td>
<td></td>
</tr>
<tr>
<td>postRouteOpt</td>
<td>1</td>
<td>0.405</td>
<td>0.308</td>
<td>1.0601</td>
<td>1.0521</td>
<td>-0.197</td>
<td>-1961.25</td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<p align="center">
<img width="300" src="./images/MemPool_Group_GF12_CMP_Place.png" alg="MemPool_Group_GF12_CMP_Place">
<img width="300" src="./images/MemPool_Group_GF12_CMP_Route.png" alg="MemPool_Group_GF12_CMP_Route">
</p>
- The following table and screenshots provide details of MemPool Group GF12 implementation when CMP is used to generate the initial macro placement.
<table>
<thead>
<tr>
<th colspan="10"><p align="center">MemPool Group-GF12-68% CT (<a href="https://tensorboard.dev/experiment/liqXGb6rSrqpf55G2OH2Fw/">Link</a> to Tensorboard)</p></th>
</tr>
</thead>
<tbody>
<tr>
<td>Physical Design Stage</td>
<td>Core Area</td>
<td>Standard Cell Area</td>
<td>Macro Area</td>
<td>Total Power</td>
<td>Wirelength</td>
<td>WS</td>
<td>TNS</td>
<td>Congestion(H)</td>
<td>Congestion(V)</td>
</tr>
<tr>
<td>preCTS</td>
<td>1</td>
<td>0.419</td>
<td>0.308</td>
<td>1.1094</td>
<td>1.222</td>
<td>-0.170</td>
<td>-13620.25</td>
<td>1</td>
<td>1.22</td>
</tr>
<tr>
<td>postCTS</td>
<td>1</td>
<td>0.414</td>
<td>0.308</td>
<td>1.1966</td>
<td>1.2331</td>
<td>-0.179</td>
<td>-3615.65</td>
<td>1.27</td>
<td>1.57</td>
</tr>
<tr>
<td>postRoute</td>
<td>1</td>
<td>0.414</td>
<td>0.308</td>
<td>1.1987</td>
<td>1.2798</td>
<td>-0.178</td>
<td>-6350.95</td>
<td></td>
<td></td>
</tr>
<tr>
<td>postRouteOpt</td>
<td>1</td>
<td>0.410</td>
<td>0.308</td>
<td>1.1847</td>
<td>1.282</td>
<td>-0.195</td>
<td>-1849.40</td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<p align="center">
<img width="300" src="./images/MemPool_Group_GF12_CT_Place.png" alg="MemPool_Group_GF12_CT_Place">
<img width="300" src="./images/MemPool_Group_GF12_CT_Route.png" alg="MemPool_Group_GF12_CT_Route">
</p>
## **Pinned (to bottom) question list:**
**<span style="color:blue">[Question 1](#Question1).</span>** How does having an initial set of placement locations (from physical synthesis) affect the (relative) quality of the CT result?
......
......@@ -4,6 +4,10 @@
setenv SYN_HANDOFF $argv[1]
setenv SEED $argv[2]
if ($#argv >= 3) then
setenv DEF_FILE $argv[3]
endif
set util_dir="/home/fetzfs_projects/MacroPlacement/flow_scripts_run/MacroPlacement/Flows/util/"
if ($#argv != 3) then
......@@ -17,5 +21,7 @@ innovus -64 -overwrite -log log/macro_shuffle_innovus.log -files ${util_dir}/gen
## Edit the design file to make sure flow2 reads the new macro placed def instead of the default one
set def_file=`ls *_fp_shuffled_macros.def | head -n1`
sed -i "s@\S*_fp_placed_macros.def@${def_file}@" design_setup.tcl
sed -i "s@\S*_fp.def@${def_file}@" design_setup.tcl
sed -i "s@./syn_handoff@${SYN_HANDOFF}@" run_invs.tcl
sed -i "s@place_design -concurrent_macros@#place_design -concurrent_macros@" run_invs.tcl
sed -i "s@refine_macro_place@#refine_macro_place@" run_invs.tcl
......@@ -45,7 +45,12 @@ generateVias
createBasicPathGroups -expanded
## Generate the floorplan ##
defIn ${handoff_dir}/${DESIGN}.def
if {[info exist ::env(DEF_FILE)] && $::env(DEF_FILE) != ""} {
defIn $::env(DEF_FILE)
} else {
defIn ${handoff_dir}/${DESIGN}.def
}
#### Unplace the standard cells ###
dbset [dbget top.insts.cell.subClass core -p2 ].pStatus unplaced
......@@ -53,6 +58,7 @@ dbset [dbget top.insts.cell.subClass core -p2 ].pStatus unplaced
source ../../../../util/shuffle_macro.tcl
shuffle_macros $::env(SEED)
dbset [dbget top.insts.cell.subClass block -p2 ].pStatus fixed
defOut -floorplan ./${DESIGN}_fp_shuffled_macros.def
exit
......@@ -11,7 +11,8 @@ if [ $PHY_SYNTH -eq 1 ]; then
export HMETIS_DIR="/home/zf4_projects/DREAMPlace/sakundu/GB/CT/hmetis-1.5-linux"
export PLC_WRAPPER_MAIN="/home/zf4_projects/DREAMPlace/sakundu/GB/CT/plc_wrapper_main"
#export CT_PATH="${PROJ_DIR}/../../../GB/CT/circuit_training"
export CT_PATH="/home/zf4_projects/DREAMPlace/sakundu/ABK_MP/CT/09092022/circuit_training"
#export CT_PATH="/home/zf4_projects/DREAMPlace/sakundu/ABK_MP/CT/09092022/circuit_training"
export CT_PATH="/home/zf4_projects/DREAMPlace/sakundu/ABK_MP/CT/11112022/circuit_training"
#export CT_PATH="/home/zf4_projects/macro_placer/google_brain/TILOS_repo/grouping/circuit_training"
bash -i ../../../../util/run_grp.sh 2>&1 | tee log/grouping.log
fi
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