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lvzhengyang
macroplacement
Commits
2391bd03
Commit
2391bd03
authored
Jul 02, 2022
by
sakundu
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Updated NVDLA README
Signed-off-by: sakundu <sakundu@ucsd.edu>
parent
f4f0d8f6
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Flows/SKY130HD/nvdla/constraints/NV_NVDLA_partition_c.sdc
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Flows/SKY130HD/nvdla/constraints/NV_NVDLA_partition_c.sdc
View file @
2391bd03
...
@@ -7,16 +7,16 @@
...
@@ -7,16 +7,16 @@
# with this distribution for more information.
# with this distribution for more information.
# ===================================================================
# ===================================================================
set_max_area 0
#
set_max_area 0
set_ideal_network [get_ports direct_reset_]
set_ideal_network [get_ports direct_reset_]
set_ideal_network [get_ports dla_reset_rstn]
set_ideal_network [get_ports dla_reset_rstn]
set_ideal_network -no_propagate [get_nets nvdla_core_rstn]
set_ideal_network -no_propagate [get_nets nvdla_core_rstn]
set_ideal_network [get_ports test_mode]
set_ideal_network [get_ports test_mode]
create_clock [get_ports nvdla_core_clk] -period
0.9 -waveform {0 0.45
}
create_clock [get_ports nvdla_core_clk] -period
6.0 -waveform {0 3.0
}
set_clock_transition -max -rise 0.
0
5 [get_clocks nvdla_core_clk]
set_clock_transition -max -rise 0.
1
5 [get_clocks nvdla_core_clk]
set_clock_transition -max -fall 0.
0
5 [get_clocks nvdla_core_clk]
set_clock_transition -max -fall 0.
1
5 [get_clocks nvdla_core_clk]
set_clock_transition -min -rise 0.
0
5 [get_clocks nvdla_core_clk]
set_clock_transition -min -rise 0.
1
5 [get_clocks nvdla_core_clk]
set_clock_transition -min -fall 0.
0
5 [get_clocks nvdla_core_clk]
set_clock_transition -min -fall 0.
1
5 [get_clocks nvdla_core_clk]
set_false_path -from [get_ports direct_reset_]
set_false_path -from [get_ports direct_reset_]
set_false_path -from [get_ports dla_reset_rstn]
set_false_path -from [get_ports dla_reset_rstn]
set_false_path -from [get_ports test_mode]
set_false_path -from [get_ports test_mode]
...
...
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