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lvzhengyang
abc
Commits
c3168ba6
Commit
c3168ba6
authored
Oct 29, 2012
by
Niklas Een
Browse files
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Plain Diff
Replaced printfs with Abc_Print
parent
1e8565ee
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Showing
20 changed files
with
465 additions
and
451 deletions
+465
-451
Makefile
+1
-1
src/proof/pdr/pdrTsim.c
+39
-7
src/proof/ssw/sswAig.c
+8
-9
src/proof/ssw/sswBmc.c
+8
-9
src/proof/ssw/sswCnf.c
+13
-14
src/proof/ssw/sswConstr.c
+34
-35
src/proof/ssw/sswDyn.c
+16
-17
src/proof/ssw/sswFilter.c
+23
-24
src/proof/ssw/sswIslands.c
+21
-22
src/proof/ssw/sswLcorr.c
+12
-13
src/proof/ssw/sswMan.c
+18
-19
src/proof/ssw/sswPairs.c
+32
-33
src/proof/ssw/sswPart.c
+4
-5
src/proof/ssw/sswRarity.c
+91
-92
src/proof/ssw/sswRarity2.c
+31
-32
src/proof/ssw/sswSemi.c
+22
-23
src/proof/ssw/sswSim.c
+69
-70
src/proof/ssw/sswSimSat.c
+5
-6
src/proof/ssw/sswSweep.c
+11
-12
src/proof/ssw/sswUnique.c
+7
-8
No files found.
Makefile
View file @
c3168ba6
...
@@ -86,7 +86,7 @@ clean:
...
@@ -86,7 +86,7 @@ clean:
@
rm
-rvf
$(PROG)
lib
$(PROG)
.a
$(OBJ)
$(GARBAGE)
$
(
OBJ:.o
=
.d
)
@
rm
-rvf
$(PROG)
lib
$(PROG)
.a
$(OBJ)
$(GARBAGE)
$
(
OBJ:.o
=
.d
)
tags
:
tags
:
ctags
-R
.
etags
`
find
.
-type
f
-regex
'.*\.\(c\|h\)'
`
$(PROG)
:
$(OBJ)
$(PROG)
:
$(OBJ)
@
echo
"
\`\`
Building binary:"
$
(
notdir
$@
)
@
echo
"
\`\`
Building binary:"
$
(
notdir
$@
)
...
...
src/proof/pdr/pdrTsim.c
View file @
c3168ba6
...
@@ -152,14 +152,14 @@ int Pdr_ManExtendOneEval( Aig_Man_t * pAig, Aig_Obj_t * pObj )
...
@@ -152,14 +152,14 @@ int Pdr_ManExtendOneEval( Aig_Man_t * pAig, Aig_Obj_t * pObj )
Synopsis [Performs ternary simulation for one design.]
Synopsis [Performs ternary simulation for one design.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
int
Pdr_ManSimDataInit
(
Aig_Man_t
*
pAig
,
int
Pdr_ManSimDataInit
(
Aig_Man_t
*
pAig
,
Vec_Int_t
*
vCiObjs
,
Vec_Int_t
*
vCiVals
,
Vec_Int_t
*
vNodes
,
Vec_Int_t
*
vCiObjs
,
Vec_Int_t
*
vCiVals
,
Vec_Int_t
*
vNodes
,
Vec_Int_t
*
vCoObjs
,
Vec_Int_t
*
vCoVals
,
Vec_Int_t
*
vCi2Rem
)
Vec_Int_t
*
vCoObjs
,
Vec_Int_t
*
vCoVals
,
Vec_Int_t
*
vCi2Rem
)
{
{
Aig_Obj_t
*
pObj
;
Aig_Obj_t
*
pObj
;
...
@@ -190,7 +190,7 @@ int Pdr_ManSimDataInit( Aig_Man_t * pAig,
...
@@ -190,7 +190,7 @@ int Pdr_ManSimDataInit( Aig_Man_t * pAig,
Synopsis [Tries to assign ternary value to one of the CIs.]
Synopsis [Tries to assign ternary value to one of the CIs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -368,7 +368,7 @@ Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCube )
...
@@ -368,7 +368,7 @@ Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCube )
// collect CO objects
// collect CO objects
Vec_IntClear
(
vCoObjs
);
Vec_IntClear
(
vCoObjs
);
if
(
pCube
==
NULL
)
// the target is the property output
if
(
pCube
==
NULL
)
// the target is the property output
Vec_IntPush
(
vCoObjs
,
Aig_ObjId
(
Aig_ManCo
(
p
->
pAig
,
(
p
->
pPars
->
iOutput
==-
1
)
?
0
:
p
->
pPars
->
iOutput
))
);
Vec_IntPush
(
vCoObjs
,
Aig_ObjId
(
Aig_ManCo
(
p
->
pAig
,
(
p
->
pPars
->
iOutput
==-
1
)
?
0
:
p
->
pPars
->
iOutput
))
);
else
// the target is the cube
else
// the target is the cube
{
{
for
(
i
=
0
;
i
<
pCube
->
nLits
;
i
++
)
for
(
i
=
0
;
i
<
pCube
->
nLits
;
i
++
)
...
@@ -400,6 +400,7 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, NULL );
...
@@ -400,6 +400,7 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, NULL );
RetValue
=
Pdr_ManSimDataInit
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vNodes
,
vCoObjs
,
vCoVals
,
NULL
);
RetValue
=
Pdr_ManSimDataInit
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vNodes
,
vCoObjs
,
vCoVals
,
NULL
);
assert
(
RetValue
);
assert
(
RetValue
);
#if 1
// try removing high-priority flops
// try removing high-priority flops
Vec_IntClear
(
vCi2Rem
);
Vec_IntClear
(
vCi2Rem
);
Aig_ManForEachObjVec
(
vCiObjs
,
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachObjVec
(
vCiObjs
,
p
->
pAig
,
pObj
,
i
)
...
@@ -429,10 +430,42 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, NULL );
...
@@ -429,10 +430,42 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, NULL );
else
else
Pdr_ManExtendUndo
(
p
->
pAig
,
vUndo
);
Pdr_ManExtendUndo
(
p
->
pAig
,
vUndo
);
}
}
#else
// try removing low-priority flops
Aig_ManForEachObjVec
(
vCiObjs
,
p
->
pAig
,
pObj
,
i
)
{
if
(
!
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
continue
;
Entry
=
Aig_ObjCioId
(
pObj
)
-
Saig_ManPiNum
(
p
->
pAig
);
if
(
vPrio
==
NULL
||
Vec_IntEntry
(
vPrio
,
Entry
)
==
0
)
continue
;
Vec_IntClear
(
vUndo
);
if
(
Pdr_ManExtendOne
(
p
->
pAig
,
pObj
,
vUndo
,
vVisits
)
)
Vec_IntPush
(
vCi2Rem
,
Aig_ObjId
(
pObj
)
);
else
Pdr_ManExtendUndo
(
p
->
pAig
,
vUndo
);
}
// try removing high-priority flops
Vec_IntClear
(
vCi2Rem
);
Aig_ManForEachObjVec
(
vCiObjs
,
p
->
pAig
,
pObj
,
i
)
{
if
(
!
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
continue
;
Entry
=
Aig_ObjCioId
(
pObj
)
-
Saig_ManPiNum
(
p
->
pAig
);
if
(
vPrio
!=
NULL
&&
Vec_IntEntry
(
vPrio
,
Entry
)
!=
0
)
continue
;
Vec_IntClear
(
vUndo
);
if
(
Pdr_ManExtendOne
(
p
->
pAig
,
pObj
,
vUndo
,
vVisits
)
)
Vec_IntPush
(
vCi2Rem
,
Aig_ObjId
(
pObj
)
);
else
Pdr_ManExtendUndo
(
p
->
pAig
,
vUndo
);
}
#endif
if
(
p
->
pPars
->
fVeryVerbose
)
if
(
p
->
pPars
->
fVeryVerbose
)
Pdr_ManPrintCex
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vCi2Rem
);
Pdr_ManPrintCex
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vCi2Rem
);
RetValue
=
Pdr_ManSimDataInit
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vNodes
,
vCoObjs
,
vCoVals
,
vCi2Rem
);
RetValue
=
Pdr_ManSimDataInit
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vNodes
,
vCoObjs
,
vCoVals
,
vCi2Rem
);
assert
(
RetValue
);
assert
(
RetValue
);
// derive the set of resulting registers
// derive the set of resulting registers
Pdr_ManDeriveResult
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vCi2Rem
,
vRes
,
vPiLits
);
Pdr_ManDeriveResult
(
p
->
pAig
,
vCiObjs
,
vCiVals
,
vCi2Rem
,
vRes
,
vPiLits
);
...
@@ -447,4 +480,3 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, vCi2Rem );
...
@@ -447,4 +480,3 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, vCi2Rem );
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswAig.c
View file @
c3168ba6
...
@@ -45,7 +45,7 @@ ABC_NAMESPACE_IMPL_START
...
@@ -45,7 +45,7 @@ ABC_NAMESPACE_IMPL_START
Ssw_Frm_t
*
Ssw_FrmStart
(
Aig_Man_t
*
pAig
)
Ssw_Frm_t
*
Ssw_FrmStart
(
Aig_Man_t
*
pAig
)
{
{
Ssw_Frm_t
*
p
;
Ssw_Frm_t
*
p
;
p
=
ABC_ALLOC
(
Ssw_Frm_t
,
1
);
p
=
ABC_ALLOC
(
Ssw_Frm_t
,
1
);
memset
(
p
,
0
,
sizeof
(
Ssw_Frm_t
)
);
memset
(
p
,
0
,
sizeof
(
Ssw_Frm_t
)
);
p
->
pAig
=
pAig
;
p
->
pAig
=
pAig
;
p
->
nObjs
=
Aig_ManObjNumMax
(
pAig
);
p
->
nObjs
=
Aig_ManObjNumMax
(
pAig
);
...
@@ -80,7 +80,7 @@ void Ssw_FrmStop( Ssw_Frm_t * p )
...
@@ -80,7 +80,7 @@ void Ssw_FrmStop( Ssw_Frm_t * p )
Synopsis [Performs speculative reduction for one node.]
Synopsis [Performs speculative reduction for one node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -95,7 +95,7 @@ static inline void Ssw_FramesConstrainNode( Ssw_Man_t * p, Aig_Man_t * pFrames,
...
@@ -95,7 +95,7 @@ static inline void Ssw_FramesConstrainNode( Ssw_Man_t * p, Aig_Man_t * pFrames,
return
;
return
;
p
->
nConstrTotal
++
;
p
->
nConstrTotal
++
;
assert
(
pObjRepr
->
Id
<
pObj
->
Id
);
assert
(
pObjRepr
->
Id
<
pObj
->
Id
);
// get the new node
// get the new node
pObjNew
=
Ssw_ObjFrame
(
p
,
pObj
,
iFrame
);
pObjNew
=
Ssw_ObjFrame
(
p
,
pObj
,
iFrame
);
// get the new node of the representative
// get the new node of the representative
pObjReprNew
=
Ssw_ObjFrame
(
p
,
pObjRepr
,
iFrame
);
pObjReprNew
=
Ssw_ObjFrame
(
p
,
pObjRepr
,
iFrame
);
...
@@ -135,7 +135,7 @@ static inline void Ssw_FramesConstrainNode( Ssw_Man_t * p, Aig_Man_t * pFrames,
...
@@ -135,7 +135,7 @@ static inline void Ssw_FramesConstrainNode( Ssw_Man_t * p, Aig_Man_t * pFrames,
Synopsis [Prepares the inductive case with speculative reduction.]
Synopsis [Prepares the inductive case with speculative reduction.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -181,7 +181,7 @@ Aig_Man_t * Ssw_FramesWithClasses( Ssw_Man_t * p )
...
@@ -181,7 +181,7 @@ Aig_Man_t * Ssw_FramesWithClasses( Ssw_Man_t * p )
// transfer to the primary outputs
// transfer to the primary outputs
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
// transfer latch input to the latch outputs
// transfer latch input to the latch outputs
Saig_ManForEachLiLo
(
p
->
pAig
,
pObjLi
,
pObjLo
,
i
)
Saig_ManForEachLiLo
(
p
->
pAig
,
pObjLi
,
pObjLo
,
i
)
Ssw_ObjSetFrame
(
p
,
pObjLo
,
f
+
1
,
Ssw_ObjFrame
(
p
,
pObjLi
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObjLo
,
f
+
1
,
Ssw_ObjFrame
(
p
,
pObjLi
,
f
)
);
}
}
...
@@ -203,7 +203,7 @@ Aig_Man_t * Ssw_FramesWithClasses( Ssw_Man_t * p )
...
@@ -203,7 +203,7 @@ Aig_Man_t * Ssw_FramesWithClasses( Ssw_Man_t * p )
Synopsis [Prepares the inductive case with speculative reduction.]
Synopsis [Prepares the inductive case with speculative reduction.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -218,7 +218,7 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
...
@@ -218,7 +218,7 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
assert
(
Aig_ManRegNum
(
p
->
pAig
)
>
0
);
assert
(
Aig_ManRegNum
(
p
->
pAig
)
>
0
);
assert
(
Aig_ManRegNum
(
p
->
pAig
)
<
Aig_ManCiNum
(
p
->
pAig
)
);
assert
(
Aig_ManRegNum
(
p
->
pAig
)
<
Aig_ManCiNum
(
p
->
pAig
)
);
p
->
nConstrTotal
=
p
->
nConstrReduced
=
0
;
p
->
nConstrTotal
=
p
->
nConstrReduced
=
0
;
// start the fraig package
// start the fraig package
pFrames
=
Aig_ManStart
(
Aig_ManObjNumMax
(
p
->
pAig
)
*
p
->
nFrames
);
pFrames
=
Aig_ManStart
(
Aig_ManObjNumMax
(
p
->
pAig
)
*
p
->
nFrames
);
pFrames
->
pName
=
Abc_UtilStrsav
(
p
->
pAig
->
pName
);
pFrames
->
pName
=
Abc_UtilStrsav
(
p
->
pAig
->
pName
);
...
@@ -245,7 +245,7 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
...
@@ -245,7 +245,7 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
// remove dangling nodes
// remove dangling nodes
Aig_ManCleanup
(
pFrames
);
Aig_ManCleanup
(
pFrames
);
Aig_ManSetRegNum
(
pFrames
,
Aig_ManRegNum
(
p
->
pAig
)
);
Aig_ManSetRegNum
(
pFrames
,
Aig_ManRegNum
(
p
->
pAig
)
);
//
printf(
"SpecRed: Total constraints = %d. Reduced constraints = %d.\n",
//
Abc_Print( 1,
"SpecRed: Total constraints = %d. Reduced constraints = %d.\n",
// p->nConstrTotal, p->nConstrReduced );
// p->nConstrTotal, p->nConstrReduced );
return
pFrames
;
return
pFrames
;
}
}
...
@@ -256,4 +256,3 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
...
@@ -256,4 +256,3 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswBmc.c
View file @
c3168ba6
...
@@ -60,10 +60,10 @@ Aig_Obj_t * Ssw_BmcUnroll_rec( Ssw_Frm_t * pFrm, Aig_Obj_t * pObj, int f )
...
@@ -60,10 +60,10 @@ Aig_Obj_t * Ssw_BmcUnroll_rec( Ssw_Frm_t * pFrm, Aig_Obj_t * pObj, int f )
{
{
if
(
f
==
0
)
if
(
f
==
0
)
pRes
=
Aig_ManConst0
(
pFrm
->
pFrames
);
pRes
=
Aig_ManConst0
(
pFrm
->
pFrames
);
else
else
pRes
=
Ssw_BmcUnroll_rec
(
pFrm
,
Saig_ObjLoToLi
(
pFrm
->
pAig
,
pObj
),
f
-
1
);
pRes
=
Ssw_BmcUnroll_rec
(
pFrm
,
Saig_ObjLoToLi
(
pFrm
->
pAig
,
pObj
),
f
-
1
);
}
}
else
else
{
{
assert
(
Aig_ObjIsNode
(
pObj
)
);
assert
(
Aig_ObjIsNode
(
pObj
)
);
Ssw_BmcUnroll_rec
(
pFrm
,
Aig_ObjFanin0
(
pObj
),
f
);
Ssw_BmcUnroll_rec
(
pFrm
,
Aig_ObjFanin0
(
pObj
),
f
);
...
@@ -81,7 +81,7 @@ Aig_Obj_t * Ssw_BmcUnroll_rec( Ssw_Frm_t * pFrm, Aig_Obj_t * pObj, int f )
...
@@ -81,7 +81,7 @@ Aig_Obj_t * Ssw_BmcUnroll_rec( Ssw_Frm_t * pFrm, Aig_Obj_t * pObj, int f )
Synopsis [Derives counter-example.]
Synopsis [Derives counter-example.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -140,7 +140,7 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
...
@@ -140,7 +140,7 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
// report statistics
// report statistics
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"AIG: PI/PO/Reg = %d/%d/%d. Node = %6d. Lev = %5d.
\n
"
,
Abc_Print
(
1
,
"AIG: PI/PO/Reg = %d/%d/%d. Node = %6d. Lev = %5d.
\n
"
,
Saig_ManPiNum
(
pAig
),
Saig_ManPoNum
(
pAig
),
Saig_ManRegNum
(
pAig
),
Saig_ManPiNum
(
pAig
),
Saig_ManPoNum
(
pAig
),
Saig_ManRegNum
(
pAig
),
Aig_ManNodeNum
(
pAig
),
Aig_ManLevelNum
(
pAig
)
);
Aig_ManNodeNum
(
pAig
),
Aig_ManLevelNum
(
pAig
)
);
fflush
(
stdout
);
fflush
(
stdout
);
...
@@ -162,7 +162,7 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
...
@@ -162,7 +162,7 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
Lit
=
toLitCond
(
Ssw_ObjSatNum
(
pSat
,
pObjFrame
),
Aig_IsComplement
(
pObjFrame
)
);
Lit
=
toLitCond
(
Ssw_ObjSatNum
(
pSat
,
pObjFrame
),
Aig_IsComplement
(
pObjFrame
)
);
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Solving output %2d of frame %3d ...
\r
"
,
Abc_Print
(
1
,
"Solving output %2d of frame %3d ...
\r
"
,
i
%
Saig_ManPoNum
(
pAig
),
i
/
Saig_ManPoNum
(
pAig
)
);
i
%
Saig_ManPoNum
(
pAig
),
i
/
Saig_ManPoNum
(
pAig
)
);
}
}
status
=
sat_solver_solve
(
pSat
->
pSat
,
&
Lit
,
&
Lit
+
1
,
(
ABC_INT64_T
)
nConfLimit
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
);
status
=
sat_solver_solve
(
pSat
->
pSat
,
&
Lit
,
&
Lit
+
1
,
(
ABC_INT64_T
)
nConfLimit
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
);
...
@@ -199,9 +199,9 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
...
@@ -199,9 +199,9 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
}
}
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Solved %2d outputs of frame %3d. "
,
Saig_ManPoNum
(
pAig
),
f
);
Abc_Print
(
1
,
"Solved %2d outputs of frame %3d. "
,
Saig_ManPoNum
(
pAig
),
f
);
printf
(
"Conf =%8.0f. Var =%8d. AIG=%9d. "
,
Abc_Print
(
1
,
"Conf =%8.0f. Var =%8d. AIG=%9d. "
,
(
double
)
pSat
->
pSat
->
stats
.
conflicts
,
(
double
)
pSat
->
pSat
->
stats
.
conflicts
,
pSat
->
nSatVars
,
Aig_ManNodeNum
(
pFrm
->
pFrames
)
);
pSat
->
nSatVars
,
Aig_ManNodeNum
(
pFrm
->
pFrames
)
);
ABC_PRT
(
"T"
,
clock
()
-
clkPart
);
ABC_PRT
(
"T"
,
clock
()
-
clkPart
);
clkPart
=
clock
();
clkPart
=
clock
();
...
@@ -222,4 +222,3 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
...
@@ -222,4 +222,3 @@ int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbo
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswCnf.c
View file @
c3168ba6
...
@@ -46,7 +46,7 @@ Ssw_Sat_t * Ssw_SatStart( int fPolarFlip )
...
@@ -46,7 +46,7 @@ Ssw_Sat_t * Ssw_SatStart( int fPolarFlip )
{
{
Ssw_Sat_t
*
p
;
Ssw_Sat_t
*
p
;
int
Lit
;
int
Lit
;
p
=
ABC_ALLOC
(
Ssw_Sat_t
,
1
);
p
=
ABC_ALLOC
(
Ssw_Sat_t
,
1
);
memset
(
p
,
0
,
sizeof
(
Ssw_Sat_t
)
);
memset
(
p
,
0
,
sizeof
(
Ssw_Sat_t
)
);
p
->
pAig
=
NULL
;
p
->
pAig
=
NULL
;
p
->
fPolarFlip
=
fPolarFlip
;
p
->
fPolarFlip
=
fPolarFlip
;
...
@@ -80,7 +80,7 @@ Ssw_Sat_t * Ssw_SatStart( int fPolarFlip )
...
@@ -80,7 +80,7 @@ Ssw_Sat_t * Ssw_SatStart( int fPolarFlip )
***********************************************************************/
***********************************************************************/
void
Ssw_SatStop
(
Ssw_Sat_t
*
p
)
void
Ssw_SatStop
(
Ssw_Sat_t
*
p
)
{
{
//
printf(
"Recycling SAT solver with %d vars and %d restarts.\n",
//
Abc_Print( 1,
"Recycling SAT solver with %d vars and %d restarts.\n",
// p->pSat->size, p->pSat->stats.starts );
// p->pSat->size, p->pSat->stats.starts );
if
(
p
->
pSat
)
if
(
p
->
pSat
)
sat_solver_delete
(
p
->
pSat
);
sat_solver_delete
(
p
->
pSat
);
...
@@ -174,10 +174,10 @@ void Ssw_AddClausesMux( Ssw_Sat_t * p, Aig_Obj_t * pNode )
...
@@ -174,10 +174,10 @@ void Ssw_AddClausesMux( Ssw_Sat_t * p, Aig_Obj_t * pNode )
// two additional clauses
// two additional clauses
// t' & e' -> f'
// t' & e' -> f'
// t & e -> f
// t & e -> f
// t + e + f'
// t + e + f'
// t' + e' + f
// t' + e' + f
if
(
VarT
==
VarE
)
if
(
VarT
==
VarE
)
{
{
...
@@ -214,7 +214,7 @@ void Ssw_AddClausesMux( Ssw_Sat_t * p, Aig_Obj_t * pNode )
...
@@ -214,7 +214,7 @@ void Ssw_AddClausesMux( Ssw_Sat_t * p, Aig_Obj_t * pNode )
Synopsis [Addes clauses to the solver.]
Synopsis [Addes clauses to the solver.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -267,7 +267,7 @@ void Ssw_AddClausesSuper( Ssw_Sat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
...
@@ -267,7 +267,7 @@ void Ssw_AddClausesSuper( Ssw_Sat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
Synopsis [Collects the supergate.]
Synopsis [Collects the supergate.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -276,8 +276,8 @@ void Ssw_AddClausesSuper( Ssw_Sat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
...
@@ -276,8 +276,8 @@ void Ssw_AddClausesSuper( Ssw_Sat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
void
Ssw_CollectSuper_rec
(
Aig_Obj_t
*
pObj
,
Vec_Ptr_t
*
vSuper
,
int
fFirst
,
int
fUseMuxes
)
void
Ssw_CollectSuper_rec
(
Aig_Obj_t
*
pObj
,
Vec_Ptr_t
*
vSuper
,
int
fFirst
,
int
fUseMuxes
)
{
{
// if the new node is complemented or a PI, another gate begins
// if the new node is complemented or a PI, another gate begins
if
(
Aig_IsComplement
(
pObj
)
||
Aig_ObjIsCi
(
pObj
)
||
if
(
Aig_IsComplement
(
pObj
)
||
Aig_ObjIsCi
(
pObj
)
||
(
!
fFirst
&&
Aig_ObjRefs
(
pObj
)
>
1
)
||
(
!
fFirst
&&
Aig_ObjRefs
(
pObj
)
>
1
)
||
(
fUseMuxes
&&
Aig_ObjIsMuxType
(
pObj
))
)
(
fUseMuxes
&&
Aig_ObjIsMuxType
(
pObj
))
)
{
{
Vec_PtrPushUnique
(
vSuper
,
pObj
);
Vec_PtrPushUnique
(
vSuper
,
pObj
);
...
@@ -294,7 +294,7 @@ void Ssw_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int
...
@@ -294,7 +294,7 @@ void Ssw_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int
Synopsis [Collects the supergate.]
Synopsis [Collects the supergate.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -313,7 +313,7 @@ void Ssw_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
...
@@ -313,7 +313,7 @@ void Ssw_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
Synopsis [Updates the solver clause database.]
Synopsis [Updates the solver clause database.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -342,14 +342,14 @@ void Ssw_ObjAddToFrontier( Ssw_Sat_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vFrontie
...
@@ -342,14 +342,14 @@ void Ssw_ObjAddToFrontier( Ssw_Sat_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vFrontie
Synopsis [Updates the solver clause database.]
Synopsis [Updates the solver clause database.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
void
Ssw_CnfNodeAddToSolver
(
Ssw_Sat_t
*
p
,
Aig_Obj_t
*
pObj
)
void
Ssw_CnfNodeAddToSolver
(
Ssw_Sat_t
*
p
,
Aig_Obj_t
*
pObj
)
{
{
Vec_Ptr_t
*
vFrontier
;
Vec_Ptr_t
*
vFrontier
;
Aig_Obj_t
*
pNode
,
*
pFanin
;
Aig_Obj_t
*
pNode
,
*
pFanin
;
int
i
,
k
,
fUseMuxes
=
1
;
int
i
,
k
,
fUseMuxes
=
1
;
...
@@ -393,7 +393,7 @@ void Ssw_CnfNodeAddToSolver( Ssw_Sat_t * p, Aig_Obj_t * pObj )
...
@@ -393,7 +393,7 @@ void Ssw_CnfNodeAddToSolver( Ssw_Sat_t * p, Aig_Obj_t * pObj )
Synopsis [Copy pattern from the solver into the internal storage.]
Synopsis [Copy pattern from the solver into the internal storage.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -425,4 +425,3 @@ int Ssw_CnfGetNodeValue( Ssw_Sat_t * p, Aig_Obj_t * pObj )
...
@@ -425,4 +425,3 @@ int Ssw_CnfGetNodeValue( Ssw_Sat_t * p, Aig_Obj_t * pObj )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswConstr.c
View file @
c3168ba6
...
@@ -77,32 +77,32 @@ Aig_Man_t * Ssw_FramesWithConstraints( Aig_Man_t * p, int nFrames )
...
@@ -77,32 +77,32 @@ Aig_Man_t * Ssw_FramesWithConstraints( Aig_Man_t * p, int nFrames )
continue
;
continue
;
Aig_ObjCreateCo
(
pFrames
,
Aig_Not
(
Aig_ObjCopy
(
pObj
)
)
);
Aig_ObjCreateCo
(
pFrames
,
Aig_Not
(
Aig_ObjCopy
(
pObj
)
)
);
}
}
// transfer latch inputs to the latch outputs
// transfer latch inputs to the latch outputs
Saig_ManForEachLiLo
(
p
,
pObjLi
,
pObjLo
,
i
)
Saig_ManForEachLiLo
(
p
,
pObjLi
,
pObjLo
,
i
)
Aig_ObjSetCopy
(
pObjLo
,
Aig_ObjCopy
(
pObjLi
)
);
Aig_ObjSetCopy
(
pObjLo
,
Aig_ObjCopy
(
pObjLi
)
);
}
}
// remove dangling nodes
// remove dangling nodes
Aig_ManCleanup
(
pFrames
);
Aig_ManCleanup
(
pFrames
);
return
pFrames
;
return
pFrames
;
}
}
/**Function*************************************************************
/**Function*************************************************************
Synopsis [Finds one satisfiable assignment of the timeframes.]
Synopsis [Finds one satisfiable assignment of the timeframes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
int
Ssw_ManSetConstrPhases
(
Aig_Man_t
*
p
,
int
nFrames
,
Vec_Int_t
**
pvInits
)
int
Ssw_ManSetConstrPhases
(
Aig_Man_t
*
p
,
int
nFrames
,
Vec_Int_t
**
pvInits
)
{
{
Aig_Man_t
*
pFrames
;
Aig_Man_t
*
pFrames
;
sat_solver
*
pSat
;
sat_solver
*
pSat
;
Cnf_Dat_t
*
pCnf
;
Cnf_Dat_t
*
pCnf
;
Aig_Obj_t
*
pObj
;
Aig_Obj_t
*
pObj
;
int
i
,
RetValue
;
int
i
,
RetValue
;
if
(
pvInits
)
if
(
pvInits
)
*
pvInits
=
NULL
;
*
pvInits
=
NULL
;
...
@@ -110,7 +110,7 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
...
@@ -110,7 +110,7 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
// derive the timeframes
// derive the timeframes
pFrames
=
Ssw_FramesWithConstraints
(
p
,
nFrames
);
pFrames
=
Ssw_FramesWithConstraints
(
p
,
nFrames
);
// create CNF
// create CNF
pCnf
=
Cnf_Derive
(
pFrames
,
0
);
pCnf
=
Cnf_Derive
(
pFrames
,
0
);
// create SAT solver
// create SAT solver
pSat
=
(
sat_solver
*
)
Cnf_DataWriteIntoSolver
(
pCnf
,
1
,
0
);
pSat
=
(
sat_solver
*
)
Cnf_DataWriteIntoSolver
(
pCnf
,
1
,
0
);
if
(
pSat
==
NULL
)
if
(
pSat
==
NULL
)
...
@@ -120,7 +120,7 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
...
@@ -120,7 +120,7 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
return
1
;
return
1
;
}
}
// solve
// solve
RetValue
=
sat_solver_solve
(
pSat
,
NULL
,
NULL
,
RetValue
=
sat_solver_solve
(
pSat
,
NULL
,
NULL
,
(
ABC_INT64_T
)
1000000
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
);
(
ABC_INT64_T
)
1000000
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
);
if
(
RetValue
==
l_True
&&
pvInits
)
if
(
RetValue
==
l_True
&&
pvInits
)
{
{
...
@@ -129,8 +129,8 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
...
@@ -129,8 +129,8 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
Vec_IntPush
(
*
pvInits
,
sat_solver_var_value
(
pSat
,
pCnf
->
pVarNums
[
Aig_ObjId
(
pObj
)])
);
Vec_IntPush
(
*
pvInits
,
sat_solver_var_value
(
pSat
,
pCnf
->
pVarNums
[
Aig_ObjId
(
pObj
)])
);
// Aig_ManForEachCi( pFrames, pObj, i )
// Aig_ManForEachCi( pFrames, pObj, i )
//
printf(
"%d", Vec_IntEntry(*pvInits, i) );
//
Abc_Print( 1,
"%d", Vec_IntEntry(*pvInits, i) );
//
printf(
"\n" );
//
Abc_Print( 1,
"\n" );
}
}
sat_solver_delete
(
pSat
);
sat_solver_delete
(
pSat
);
Cnf_DataFree
(
pCnf
);
Cnf_DataFree
(
pCnf
);
...
@@ -154,19 +154,19 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
...
@@ -154,19 +154,19 @@ int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
***********************************************************************/
***********************************************************************/
int
Ssw_ManSetConstrPhases_
(
Aig_Man_t
*
p
,
int
nFrames
,
Vec_Int_t
**
pvInits
)
int
Ssw_ManSetConstrPhases_
(
Aig_Man_t
*
p
,
int
nFrames
,
Vec_Int_t
**
pvInits
)
{
{
Vec_Int_t
*
vLits
;
Vec_Int_t
*
vLits
;
sat_solver
*
pSat
;
sat_solver
*
pSat
;
Cnf_Dat_t
*
pCnf
;
Cnf_Dat_t
*
pCnf
;
Aig_Obj_t
*
pObj
;
Aig_Obj_t
*
pObj
;
int
i
,
f
,
iVar
,
RetValue
,
nRegs
;
int
i
,
f
,
iVar
,
RetValue
,
nRegs
;
if
(
pvInits
)
if
(
pvInits
)
*
pvInits
=
NULL
;
*
pvInits
=
NULL
;
assert
(
p
->
nConstrs
>
0
);
assert
(
p
->
nConstrs
>
0
);
// create CNF
// create CNF
nRegs
=
p
->
nRegs
;
p
->
nRegs
=
0
;
nRegs
=
p
->
nRegs
;
p
->
nRegs
=
0
;
pCnf
=
Cnf_Derive
(
p
,
Aig_ManCoNum
(
p
)
);
pCnf
=
Cnf_Derive
(
p
,
Aig_ManCoNum
(
p
)
);
p
->
nRegs
=
nRegs
;
p
->
nRegs
=
nRegs
;
// create SAT solver
// create SAT solver
pSat
=
(
sat_solver
*
)
Cnf_DataWriteIntoSolver
(
pCnf
,
nFrames
,
0
);
pSat
=
(
sat_solver
*
)
Cnf_DataWriteIntoSolver
(
pCnf
,
nFrames
,
0
);
assert
(
pSat
->
size
==
nFrames
*
pCnf
->
nVars
);
assert
(
pSat
->
size
==
nFrames
*
pCnf
->
nVars
);
...
@@ -188,8 +188,8 @@ int Ssw_ManSetConstrPhases_( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
...
@@ -188,8 +188,8 @@ int Ssw_ManSetConstrPhases_( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
Vec_IntPush
(
vLits
,
toLitCond
(
iVar
,
1
)
);
Vec_IntPush
(
vLits
,
toLitCond
(
iVar
,
1
)
);
}
}
}
}
RetValue
=
sat_solver_solve
(
pSat
,
(
int
*
)
Vec_IntArray
(
vLits
),
RetValue
=
sat_solver_solve
(
pSat
,
(
int
*
)
Vec_IntArray
(
vLits
),
(
int
*
)
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
),
(
int
*
)
Vec_IntArray
(
vLits
)
+
Vec_IntSize
(
vLits
),
(
ABC_INT64_T
)
1000000
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
);
(
ABC_INT64_T
)
1000000
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
,
(
ABC_INT64_T
)
0
);
if
(
RetValue
==
l_True
&&
pvInits
)
if
(
RetValue
==
l_True
&&
pvInits
)
{
{
...
@@ -225,12 +225,12 @@ int Ssw_ManSetConstrPhases_( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
...
@@ -225,12 +225,12 @@ int Ssw_ManSetConstrPhases_( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
***********************************************************************/
***********************************************************************/
void
Ssw_ManPrintPolarity
(
Aig_Man_t
*
p
)
void
Ssw_ManPrintPolarity
(
Aig_Man_t
*
p
)
{
{
Aig_Obj_t
*
pObj
;
Aig_Obj_t
*
pObj
;
int
i
;
int
i
;
Aig_ManForEachObj
(
p
,
pObj
,
i
)
Aig_ManForEachObj
(
p
,
pObj
,
i
)
printf
(
"%d"
,
pObj
->
fPhase
);
Abc_Print
(
1
,
"%d"
,
pObj
->
fPhase
);
printf
(
"
\n
"
);
Abc_Print
(
1
,
"
\n
"
);
}
}
/**Function*************************************************************
/**Function*************************************************************
...
@@ -245,7 +245,7 @@ void Ssw_ManPrintPolarity( Aig_Man_t * p )
...
@@ -245,7 +245,7 @@ void Ssw_ManPrintPolarity( Aig_Man_t * p )
***********************************************************************/
***********************************************************************/
void
Ssw_ManRefineByConstrSim
(
Ssw_Man_t
*
p
)
void
Ssw_ManRefineByConstrSim
(
Ssw_Man_t
*
p
)
{
{
Aig_Obj_t
*
pObj
,
*
pObjLi
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
int
f
,
i
,
iLits
,
RetValue1
,
RetValue2
;
int
f
,
i
,
iLits
,
RetValue1
,
RetValue2
;
int
nFrames
=
Vec_IntSize
(
p
->
vInits
)
/
Saig_ManPiNum
(
p
->
pAig
);
int
nFrames
=
Vec_IntSize
(
p
->
vInits
)
/
Saig_ManPiNum
(
p
->
pAig
);
...
@@ -276,12 +276,12 @@ void Ssw_ManRefineByConstrSim( Ssw_Man_t * p )
...
@@ -276,12 +276,12 @@ void Ssw_ManRefineByConstrSim( Ssw_Man_t * p )
if
(
i
<
Saig_ManPoNum
(
p
->
pAig
)
-
Saig_ManConstrNum
(
p
->
pAig
)
)
if
(
i
<
Saig_ManPoNum
(
p
->
pAig
)
-
Saig_ManConstrNum
(
p
->
pAig
)
)
{
{
if
(
pObj
->
fMarkB
)
if
(
pObj
->
fMarkB
)
printf
(
"output %d failed in frame %d.
\n
"
,
i
,
f
);
Abc_Print
(
1
,
"output %d failed in frame %d.
\n
"
,
i
,
f
);
}
}
else
else
{
{
if
(
pObj
->
fMarkB
)
if
(
pObj
->
fMarkB
)
printf
(
"constraint %d failed in frame %d.
\n
"
,
i
,
f
);
Abc_Print
(
1
,
"constraint %d failed in frame %d.
\n
"
,
i
,
f
);
}
}
}
}
// transfer
// transfer
...
@@ -312,7 +312,7 @@ void Ssw_ManRefineByConstrSim( Ssw_Man_t * p )
...
@@ -312,7 +312,7 @@ void Ssw_ManRefineByConstrSim( Ssw_Man_t * p )
***********************************************************************/
***********************************************************************/
int
Ssw_ManSweepNodeConstr
(
Ssw_Man_t
*
p
,
Aig_Obj_t
*
pObj
,
int
f
,
int
fBmc
)
int
Ssw_ManSweepNodeConstr
(
Ssw_Man_t
*
p
,
Aig_Obj_t
*
pObj
,
int
f
,
int
fBmc
)
{
{
Aig_Obj_t
*
pObjRepr
,
*
pObjFraig
,
*
pObjFraig2
,
*
pObjReprFraig
;
Aig_Obj_t
*
pObjRepr
,
*
pObjFraig
,
*
pObjFraig2
,
*
pObjReprFraig
;
int
RetValue
;
int
RetValue
;
// get representative of this class
// get representative of this class
...
@@ -328,7 +328,7 @@ int Ssw_ManSweepNodeConstr( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc )
...
@@ -328,7 +328,7 @@ int Ssw_ManSweepNodeConstr( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc )
assert
(
(
pObj
->
fPhase
==
pObjRepr
->
fPhase
)
==
(
Aig_ObjPhaseReal
(
pObjFraig
)
==
Aig_ObjPhaseReal
(
pObjReprFraig
))
);
assert
(
(
pObj
->
fPhase
==
pObjRepr
->
fPhase
)
==
(
Aig_ObjPhaseReal
(
pObjFraig
)
==
Aig_ObjPhaseReal
(
pObjReprFraig
))
);
// if the fraiged nodes are the same, return
// if the fraiged nodes are the same, return
if
(
Aig_Regular
(
pObjFraig
)
==
Aig_Regular
(
pObjReprFraig
)
)
if
(
Aig_Regular
(
pObjFraig
)
==
Aig_Regular
(
pObjReprFraig
)
)
return
0
;
return
0
;
// call equivalence checking
// call equivalence checking
if
(
Aig_Regular
(
pObjFraig
)
!=
Aig_ManConst1
(
p
->
pFrames
)
)
if
(
Aig_Regular
(
pObjFraig
)
!=
Aig_ManConst1
(
p
->
pFrames
)
)
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObjReprFraig
),
Aig_Regular
(
pObjFraig
)
);
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObjReprFraig
),
Aig_Regular
(
pObjFraig
)
);
...
@@ -351,7 +351,7 @@ int Ssw_ManSweepNodeConstr( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc )
...
@@ -351,7 +351,7 @@ int Ssw_ManSweepNodeConstr( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc )
assert
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
!=
pObjRepr
);
assert
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
!=
pObjRepr
);
if
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
==
pObjRepr
)
if
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
==
pObjRepr
)
{
{
printf
(
"Ssw_ManSweepNodeConstr(): Failed to refine representative.
\n
"
);
Abc_Print
(
1
,
"Ssw_ManSweepNodeConstr(): Failed to refine representative.
\n
"
);
}
}
return
1
;
return
1
;
}
}
...
@@ -398,7 +398,7 @@ Aig_Obj_t * Ssw_ManSweepBmcConstr_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
...
@@ -398,7 +398,7 @@ Aig_Obj_t * Ssw_ManSweepBmcConstr_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
Synopsis [Performs fraiging for the internal nodes.]
Synopsis [Performs fraiging for the internal nodes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -464,7 +464,7 @@ clk = clock();
...
@@ -464,7 +464,7 @@ clk = clock();
// quit if this is the last timeframe
// quit if this is the last timeframe
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
break
;
break
;
// transfer latch input to the latch outputs
// transfer latch input to the latch outputs
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
// build logic cones for register outputs
// build logic cones for register outputs
...
@@ -489,7 +489,7 @@ p->timeBmc += clock() - clk;
...
@@ -489,7 +489,7 @@ p->timeBmc += clock() - clk;
Synopsis [Performs fraiging for the internal nodes.]
Synopsis [Performs fraiging for the internal nodes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -545,7 +545,7 @@ clk = clock();
...
@@ -545,7 +545,7 @@ clk = clock();
// quit if this is the last timeframe
// quit if this is the last timeframe
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
break
;
break
;
// transfer latch input to the latch outputs
// transfer latch input to the latch outputs
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
// build logic cones for register outputs
// build logic cones for register outputs
...
@@ -572,7 +572,7 @@ p->timeBmc += clock() - clk;
...
@@ -572,7 +572,7 @@ p->timeBmc += clock() - clk;
Synopsis [Performs fraiging for the internal nodes.]
Synopsis [Performs fraiging for the internal nodes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -610,14 +610,14 @@ Aig_Obj_t * Ssw_FramesWithClasses_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
...
@@ -610,14 +610,14 @@ Aig_Obj_t * Ssw_FramesWithClasses_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
Synopsis [Performs fraiging for the internal nodes.]
Synopsis [Performs fraiging for the internal nodes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
int
Ssw_ManSweepConstr
(
Ssw_Man_t
*
p
)
int
Ssw_ManSweepConstr
(
Ssw_Man_t
*
p
)
{
{
Bar_Progress_t
*
pProgress
=
NULL
;
Bar_Progress_t
*
pProgress
=
NULL
;
Aig_Obj_t
*
pObj
,
*
pObj2
,
*
pObjNew
;
Aig_Obj_t
*
pObj
,
*
pObj2
,
*
pObjNew
;
int
nConstrPairs
,
i
,
f
,
iLits
;
int
nConstrPairs
,
i
,
f
,
iLits
;
...
@@ -672,7 +672,7 @@ p->timeReduce += clock() - clk;
...
@@ -672,7 +672,7 @@ p->timeReduce += clock() - clk;
assert
(
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
!=
Aig_ManConst1
(
p
->
pFrames
)
);
assert
(
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
!=
Aig_ManConst1
(
p
->
pFrames
)
);
if
(
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
==
Aig_ManConst1
(
p
->
pFrames
)
)
if
(
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
==
Aig_ManConst1
(
p
->
pFrames
)
)
{
{
printf
(
"Polarity violation.
\n
"
);
Abc_Print
(
1
,
"Polarity violation.
\n
"
);
continue
;
continue
;
}
}
Ssw_NodesAreConstrained
(
p
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Aig_ManConst0
(
p
->
pFrames
)
);
Ssw_NodesAreConstrained
(
p
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Aig_ManConst0
(
p
->
pFrames
)
);
...
@@ -695,7 +695,7 @@ p->timeReduce += clock() - clk;
...
@@ -695,7 +695,7 @@ p->timeReduce += clock() - clk;
if
(
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
if
(
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
p
->
fRefined
|=
Ssw_ManSweepNodeConstr
(
p
,
pObj
,
f
,
0
);
p
->
fRefined
|=
Ssw_ManSweepNodeConstr
(
p
,
pObj
,
f
,
0
);
else
if
(
Aig_ObjIsNode
(
pObj
)
)
else
if
(
Aig_ObjIsNode
(
pObj
)
)
{
{
pObjNew
=
Aig_And
(
p
->
pFrames
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Ssw_ObjChild1Fra
(
p
,
pObj
,
f
)
);
pObjNew
=
Aig_And
(
p
->
pFrames
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Ssw_ObjChild1Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
pObjNew
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
pObjNew
);
p
->
fRefined
|=
Ssw_ManSweepNodeConstr
(
p
,
pObj
,
f
,
0
);
p
->
fRefined
|=
Ssw_ManSweepNodeConstr
(
p
,
pObj
,
f
,
0
);
...
@@ -714,4 +714,3 @@ p->timeReduce += clock() - clk;
...
@@ -714,4 +714,3 @@ p->timeReduce += clock() - clk;
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswDyn.c
View file @
c3168ba6
...
@@ -94,7 +94,7 @@ void Ssw_ManCollectPis_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vNewPis )
...
@@ -94,7 +94,7 @@ void Ssw_ManCollectPis_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vNewPis )
Synopsis [Collects new POs in p->vNewPos.]
Synopsis [Collects new POs in p->vNewPos.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -129,11 +129,11 @@ void Ssw_ManCollectPos_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vNewPos
...
@@ -129,11 +129,11 @@ void Ssw_ManCollectPos_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vNewPos
Synopsis [Loads logic cones and relevant constraints.]
Synopsis [Loads logic cones and relevant constraints.]
Description [Both pRepr and pObj are objects of the AIG.
Description [Both pRepr and pObj are objects of the AIG.
The result is the current SAT solver loaded with the logic cones
The result is the current SAT solver loaded with the logic cones
for pRepr and pObj corresponding to them in the frames,
for pRepr and pObj corresponding to them in the frames,
as well as all the relevant constraints.]
as well as all the relevant constraints.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -151,7 +151,7 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
...
@@ -151,7 +151,7 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
pObjFrames
=
Aig_Regular
(
Ssw_ObjFrame
(
p
,
pObj
,
p
->
pPars
->
nFramesK
)
);
pObjFrames
=
Aig_Regular
(
Ssw_ObjFrame
(
p
,
pObj
,
p
->
pPars
->
nFramesK
)
);
assert
(
pReprFrames
!=
pObjFrames
);
assert
(
pReprFrames
!=
pObjFrames
);
/*
/*
// compute the AIG support
// compute the AIG support
Vec_PtrClear( p->vNewLos );
Vec_PtrClear( p->vNewLos );
Ssw_ManCollectPis_rec( pRepr, p->vNewLos );
Ssw_ManCollectPis_rec( pRepr, p->vNewLos );
Ssw_ManCollectPis_rec( pObj, p->vNewLos );
Ssw_ManCollectPis_rec( pObj, p->vNewLos );
...
@@ -166,7 +166,7 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
...
@@ -166,7 +166,7 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
Ssw_CnfNodeAddToSolver
(
p
->
pMSat
,
pReprFrames
);
Ssw_CnfNodeAddToSolver
(
p
->
pMSat
,
pReprFrames
);
Ssw_CnfNodeAddToSolver
(
p
->
pMSat
,
pObjFrames
);
Ssw_CnfNodeAddToSolver
(
p
->
pMSat
,
pObjFrames
);
// compute the frames support
// compute the frames support
Vec_PtrClear
(
p
->
vNewLos
);
Vec_PtrClear
(
p
->
vNewLos
);
Ssw_ManCollectPis_rec
(
pReprFrames
,
p
->
vNewLos
);
Ssw_ManCollectPis_rec
(
pReprFrames
,
p
->
vNewLos
);
Ssw_ManCollectPis_rec
(
pObjFrames
,
p
->
vNewLos
);
Ssw_ManCollectPis_rec
(
pObjFrames
,
p
->
vNewLos
);
...
@@ -202,7 +202,7 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
...
@@ -202,7 +202,7 @@ void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
Synopsis [Tranfers simulation information from FRAIG to AIG.]
Synopsis [Tranfers simulation information from FRAIG to AIG.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -254,7 +254,7 @@ void Ssw_ManSweepTransferDyn( Ssw_Man_t * p )
...
@@ -254,7 +254,7 @@ void Ssw_ManSweepTransferDyn( Ssw_Man_t * p )
Synopsis [Performs one round of simulation with counter-examples.]
Synopsis [Performs one round of simulation with counter-examples.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -286,7 +286,7 @@ p->timeSimSat += clock() - clk;
...
@@ -286,7 +286,7 @@ p->timeSimSat += clock() - clk;
Synopsis [Performs one round of simulation with counter-examples.]
Synopsis [Performs one round of simulation with counter-examples.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -364,14 +364,14 @@ p->timeSimSat += clock() - clk;
...
@@ -364,14 +364,14 @@ p->timeSimSat += clock() - clk;
Synopsis [Performs fraiging for the internal nodes.]
Synopsis [Performs fraiging for the internal nodes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
int
Ssw_ManSweepDyn
(
Ssw_Man_t
*
p
)
int
Ssw_ManSweepDyn
(
Ssw_Man_t
*
p
)
{
{
Bar_Progress_t
*
pProgress
=
NULL
;
Bar_Progress_t
*
pProgress
=
NULL
;
Aig_Obj_t
*
pObj
,
*
pObjNew
;
Aig_Obj_t
*
pObj
,
*
pObjNew
;
int
i
,
f
;
int
i
,
f
;
...
@@ -414,15 +414,15 @@ p->timeReduce += clock() - clk;
...
@@ -414,15 +414,15 @@ p->timeReduce += clock() - clk;
if
(
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
if
(
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
NULL
);
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
NULL
);
else
if
(
Aig_ObjIsNode
(
pObj
)
)
else
if
(
Aig_ObjIsNode
(
pObj
)
)
{
{
pObjNew
=
Aig_And
(
p
->
pFrames
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Ssw_ObjChild1Fra
(
p
,
pObj
,
f
)
);
pObjNew
=
Aig_And
(
p
->
pFrames
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Ssw_ObjChild1Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
pObjNew
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
pObjNew
);
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
NULL
);
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
NULL
);
}
}
// check if it is time to recycle the solver
// check if it is time to recycle the solver
if
(
p
->
pMSat
->
pSat
==
NULL
||
if
(
p
->
pMSat
->
pSat
==
NULL
||
(
p
->
pPars
->
nSatVarMax2
&&
(
p
->
pPars
->
nSatVarMax2
&&
p
->
pMSat
->
nSatVars
>
p
->
pPars
->
nSatVarMax2
&&
p
->
pMSat
->
nSatVars
>
p
->
pPars
->
nSatVarMax2
&&
p
->
nRecycleCalls
>
p
->
pPars
->
nRecycleCalls2
)
)
p
->
nRecycleCalls
>
p
->
pPars
->
nRecycleCalls2
)
)
{
{
// resimulate
// resimulate
...
@@ -435,7 +435,7 @@ p->timeReduce += clock() - clk;
...
@@ -435,7 +435,7 @@ p->timeReduce += clock() - clk;
Ssw_ManSweepResimulateDyn
(
p
,
f
);
Ssw_ManSweepResimulateDyn
(
p
,
f
);
p
->
iNodeStart
=
i
+
1
;
p
->
iNodeStart
=
i
+
1
;
}
}
//
printf(
"Recycling SAT solver with %d vars and %d calls.\n",
//
Abc_Print( 1,
"Recycling SAT solver with %d vars and %d calls.\n",
// p->pMSat->nSatVars, p->nRecycleCalls );
// p->pMSat->nSatVars, p->nRecycleCalls );
// Aig_ManCleanMarkAB( p->pAig );
// Aig_ManCleanMarkAB( p->pAig );
Aig_ManCleanMarkAB
(
p
->
pFrames
);
Aig_ManCleanMarkAB
(
p
->
pFrames
);
...
@@ -489,4 +489,3 @@ p->timeReduce += clock() - clk;
...
@@ -489,4 +489,3 @@ p->timeReduce += clock() - clk;
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswFilter.c
View file @
c3168ba6
...
@@ -44,7 +44,7 @@ ABC_NAMESPACE_IMPL_START
...
@@ -44,7 +44,7 @@ ABC_NAMESPACE_IMPL_START
***********************************************************************/
***********************************************************************/
void
Ssw_ManRefineByFilterSim
(
Ssw_Man_t
*
p
,
int
nFrames
)
void
Ssw_ManRefineByFilterSim
(
Ssw_Man_t
*
p
,
int
nFrames
)
{
{
Aig_Obj_t
*
pObj
,
*
pObjLi
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
int
f
,
i
,
RetValue1
,
RetValue2
;
int
f
,
i
,
RetValue1
,
RetValue2
;
assert
(
nFrames
>
0
);
assert
(
nFrames
>
0
);
...
@@ -87,14 +87,14 @@ void Ssw_ManRefineByFilterSim( Ssw_Man_t * p, int nFrames )
...
@@ -87,14 +87,14 @@ void Ssw_ManRefineByFilterSim( Ssw_Man_t * p, int nFrames )
Synopsis [Performs fraiging for one node.]
Synopsis [Performs fraiging for one node.]
Description [Returns the fraiged node.]
Description [Returns the fraiged node.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
void
Ssw_ManRollForward
(
Ssw_Man_t
*
p
,
int
nFrames
)
void
Ssw_ManRollForward
(
Ssw_Man_t
*
p
,
int
nFrames
)
{
{
Aig_Obj_t
*
pObj
,
*
pObjLi
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
int
f
,
i
;
int
f
,
i
;
assert
(
nFrames
>
0
);
assert
(
nFrames
>
0
);
...
@@ -129,14 +129,14 @@ void Ssw_ManRollForward( Ssw_Man_t * p, int nFrames )
...
@@ -129,14 +129,14 @@ void Ssw_ManRollForward( Ssw_Man_t * p, int nFrames )
Synopsis [Performs fraiging for one node.]
Synopsis [Performs fraiging for one node.]
Description [Returns the fraiged node.]
Description [Returns the fraiged node.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
void
Ssw_ManFindStartingState
(
Ssw_Man_t
*
p
,
Abc_Cex_t
*
pCex
)
void
Ssw_ManFindStartingState
(
Ssw_Man_t
*
p
,
Abc_Cex_t
*
pCex
)
{
{
Aig_Obj_t
*
pObj
,
*
pObjLi
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
int
f
,
i
,
iBit
;
int
f
,
i
,
iBit
;
// assign register outputs
// assign register outputs
...
@@ -164,7 +164,7 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
...
@@ -164,7 +164,7 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
// check that the output failed as expected -- cannot check because it is not an SRM!
// check that the output failed as expected -- cannot check because it is not an SRM!
// pObj = Aig_ManCo( p->pAig, pCex->iPo );
// pObj = Aig_ManCo( p->pAig, pCex->iPo );
// if ( pObj->fMarkB != 1 )
// if ( pObj->fMarkB != 1 )
//
printf(
"The counter-example does not refine the output.\n" );
//
Abc_Print( 1,
"The counter-example does not refine the output.\n" );
// record the new pattern
// record the new pattern
Saig_ManForEachLo
(
p
->
pAig
,
pObj
,
i
)
Saig_ManForEachLo
(
p
->
pAig
,
pObj
,
i
)
if
(
pObj
->
fMarkB
^
Abc_InfoHasBit
(
p
->
pPatWords
,
Saig_ManPiNum
(
p
->
pAig
)
+
i
)
)
if
(
pObj
->
fMarkB
^
Abc_InfoHasBit
(
p
->
pPatWords
,
Saig_ManPiNum
(
p
->
pAig
)
+
i
)
)
...
@@ -183,7 +183,7 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
...
@@ -183,7 +183,7 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
***********************************************************************/
***********************************************************************/
int
Ssw_ManSweepNodeFilter
(
Ssw_Man_t
*
p
,
Aig_Obj_t
*
pObj
,
int
f
)
int
Ssw_ManSweepNodeFilter
(
Ssw_Man_t
*
p
,
Aig_Obj_t
*
pObj
,
int
f
)
{
{
Aig_Obj_t
*
pObjRepr
,
*
pObjFraig
,
*
pObjFraig2
,
*
pObjReprFraig
;
Aig_Obj_t
*
pObjRepr
,
*
pObjFraig
,
*
pObjFraig2
,
*
pObjReprFraig
;
int
RetValue
;
int
RetValue
;
// get representative of this class
// get representative of this class
...
@@ -199,7 +199,7 @@ int Ssw_ManSweepNodeFilter( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
...
@@ -199,7 +199,7 @@ int Ssw_ManSweepNodeFilter( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
assert
(
(
pObj
->
fPhase
==
pObjRepr
->
fPhase
)
==
(
Aig_ObjPhaseReal
(
pObjFraig
)
==
Aig_ObjPhaseReal
(
pObjReprFraig
))
);
assert
(
(
pObj
->
fPhase
==
pObjRepr
->
fPhase
)
==
(
Aig_ObjPhaseReal
(
pObjFraig
)
==
Aig_ObjPhaseReal
(
pObjReprFraig
))
);
// if the fraiged nodes are the same, return
// if the fraiged nodes are the same, return
if
(
Aig_Regular
(
pObjFraig
)
==
Aig_Regular
(
pObjReprFraig
)
)
if
(
Aig_Regular
(
pObjFraig
)
==
Aig_Regular
(
pObjReprFraig
)
)
return
0
;
return
0
;
// call equivalence checking
// call equivalence checking
if
(
Aig_Regular
(
pObjFraig
)
!=
Aig_ManConst1
(
p
->
pFrames
)
)
if
(
Aig_Regular
(
pObjFraig
)
!=
Aig_ManConst1
(
p
->
pFrames
)
)
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObjReprFraig
),
Aig_Regular
(
pObjFraig
)
);
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObjReprFraig
),
Aig_Regular
(
pObjFraig
)
);
...
@@ -222,7 +222,7 @@ int Ssw_ManSweepNodeFilter( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
...
@@ -222,7 +222,7 @@ int Ssw_ManSweepNodeFilter( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
assert
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
!=
pObjRepr
);
assert
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
!=
pObjRepr
);
if
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
==
pObjRepr
)
if
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
==
pObjRepr
)
{
{
printf
(
"Ssw_ManSweepNodeFilter(): Failed to refine representative.
\n
"
);
Abc_Print
(
1
,
"Ssw_ManSweepNodeFilter(): Failed to refine representative.
\n
"
);
}
}
return
0
;
return
0
;
}
}
...
@@ -287,15 +287,15 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
...
@@ -287,15 +287,15 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
if
(
Abc_InfoHasBit
(
p
->
pPatWords
,
Saig_ManPiNum
(
p
->
pAig
)
+
i
)
)
if
(
Abc_InfoHasBit
(
p
->
pPatWords
,
Saig_ManPiNum
(
p
->
pAig
)
+
i
)
)
{
{
Ssw_ObjSetFrame
(
p
,
pObj
,
0
,
Aig_ManConst1
(
p
->
pFrames
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
0
,
Aig_ManConst1
(
p
->
pFrames
)
);
//
printf(
"1" );
//
Abc_Print( 1,
"1" );
}
}
else
else
{
{
Ssw_ObjSetFrame
(
p
,
pObj
,
0
,
Aig_ManConst0
(
p
->
pFrames
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
0
,
Aig_ManConst0
(
p
->
pFrames
)
);
//
printf(
"0" );
//
Abc_Print( 1,
"0" );
}
}
}
}
//
printf(
"\n" );
//
Abc_Print( 1,
"\n" );
// sweep internal nodes
// sweep internal nodes
for
(
f
=
0
;
f
<
p
->
pPars
->
nFramesK
;
f
++
)
for
(
f
=
0
;
f
<
p
->
pPars
->
nFramesK
;
f
++
)
...
@@ -332,20 +332,20 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
...
@@ -332,20 +332,20 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
// printout
// printout
if
(
p
->
pPars
->
fVerbose
)
if
(
p
->
pPars
->
fVerbose
)
{
{
printf
(
"Frame %4d : "
,
f
);
Abc_Print
(
1
,
"Frame %4d : "
,
f
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
}
}
if
(
i
<
Vec_PtrSize
(
p
->
pAig
->
vObjs
)
)
if
(
i
<
Vec_PtrSize
(
p
->
pAig
->
vObjs
)
)
{
{
if
(
p
->
pPars
->
fVerbose
)
if
(
p
->
pPars
->
fVerbose
)
printf
(
"Exceeded the resource limits (%d conflicts). Quitting...
\n
"
,
p
->
pPars
->
nBTLimit
);
Abc_Print
(
1
,
"Exceeded the resource limits (%d conflicts). Quitting...
\n
"
,
p
->
pPars
->
nBTLimit
);
break
;
break
;
}
}
// quit if this is the last timeframe
// quit if this is the last timeframe
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
{
{
if
(
p
->
pPars
->
fVerbose
)
if
(
p
->
pPars
->
fVerbose
)
printf
(
"Exceeded the time frame limit (%d time frames). Quitting...
\n
"
,
p
->
pPars
->
nFramesK
);
Abc_Print
(
1
,
"Exceeded the time frame limit (%d time frames). Quitting...
\n
"
,
p
->
pPars
->
nFramesK
);
break
;
break
;
}
}
// check timeout
// check timeout
...
@@ -371,9 +371,9 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
...
@@ -371,9 +371,9 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
Synopsis [Filter equivalence classes of nodes.]
Synopsis [Filter equivalence classes of nodes.]
Description [Unrolls at most nFramesMax frames. Works with nConfMax
Description [Unrolls at most nFramesMax frames. Works with nConfMax
conflicts until the first undefined SAT call. Verbose prints the message.]
conflicts until the first undefined SAT call. Verbose prints the message.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -415,18 +415,18 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
...
@@ -415,18 +415,18 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
for
(
r
=
0
;
r
<
nRounds
;
r
++
)
for
(
r
=
0
;
r
<
nRounds
;
r
++
)
{
{
if
(
p
->
pPars
->
fVerbose
)
if
(
p
->
pPars
->
fVerbose
)
printf
(
"Round %3d:
\n
"
,
r
);
Abc_Print
(
1
,
"Round %3d:
\n
"
,
r
);
// start filtering equivalence classes
// start filtering equivalence classes
Ssw_ManRefineByFilterSim
(
p
,
p
->
pPars
->
nFramesK
);
Ssw_ManRefineByFilterSim
(
p
,
p
->
pPars
->
nFramesK
);
if
(
Ssw_ClassesCand1Num
(
p
->
ppClasses
)
==
0
&&
Ssw_ClassesClassNum
(
p
->
ppClasses
)
==
0
)
if
(
Ssw_ClassesCand1Num
(
p
->
ppClasses
)
==
0
&&
Ssw_ClassesClassNum
(
p
->
ppClasses
)
==
0
)
{
{
printf
(
"All equivalences are refined away.
\n
"
);
Abc_Print
(
1
,
"All equivalences are refined away.
\n
"
);
break
;
break
;
}
}
// printout
// printout
if
(
p
->
pPars
->
fVerbose
)
if
(
p
->
pPars
->
fVerbose
)
{
{
printf
(
"Initial : "
);
Abc_Print
(
1
,
"Initial : "
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
}
}
p
->
pMSat
=
Ssw_SatStart
(
0
);
p
->
pMSat
=
Ssw_SatStart
(
0
);
...
@@ -447,7 +447,7 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
...
@@ -447,7 +447,7 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
// check timeout
// check timeout
if
(
TimeLimit
&&
clock
()
>
nTimeToStop
)
if
(
TimeLimit
&&
clock
()
>
nTimeToStop
)
{
{
printf
(
"Reached timeout (%d seconds).
\n
"
,
TimeLimit
);
Abc_Print
(
1
,
"Reached timeout (%d seconds).
\n
"
,
TimeLimit
);
break
;
break
;
}
}
}
}
...
@@ -471,7 +471,7 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
...
@@ -471,7 +471,7 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
***********************************************************************/
***********************************************************************/
void
Ssw_SignalFilterGia
(
Gia_Man_t
*
p
,
int
nFramesMax
,
int
nConfMax
,
int
nRounds
,
int
TimeLimit
,
int
TimeLimit2
,
Abc_Cex_t
*
pCex
,
int
fLatchOnly
,
int
fVerbose
)
void
Ssw_SignalFilterGia
(
Gia_Man_t
*
p
,
int
nFramesMax
,
int
nConfMax
,
int
nRounds
,
int
TimeLimit
,
int
TimeLimit2
,
Abc_Cex_t
*
pCex
,
int
fLatchOnly
,
int
fVerbose
)
{
{
Aig_Man_t
*
pAig
;
Aig_Man_t
*
pAig
;
pAig
=
Gia_ManToAigSimple
(
p
);
pAig
=
Gia_ManToAigSimple
(
p
);
if
(
p
->
pReprs
!=
NULL
)
if
(
p
->
pReprs
!=
NULL
)
...
@@ -491,4 +491,3 @@ void Ssw_SignalFilterGia( Gia_Man_t * p, int nFramesMax, int nConfMax, int nRoun
...
@@ -491,4 +491,3 @@ void Ssw_SignalFilterGia( Gia_Man_t * p, int nFramesMax, int nConfMax, int nRoun
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswIslands.c
View file @
c3168ba6
...
@@ -104,7 +104,7 @@ void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
...
@@ -104,7 +104,7 @@ void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
continue
;
continue
;
pObj1
=
(
Aig_Obj_t
*
)
pObj0
->
pData
;
pObj1
=
(
Aig_Obj_t
*
)
pObj0
->
pData
;
if
(
!
Saig_ObjIsLo
(
p1
,
pObj1
)
)
if
(
!
Saig_ObjIsLo
(
p1
,
pObj1
)
)
printf
(
"Mismatch between LO pairs.
\n
"
);
Abc_Print
(
1
,
"Mismatch between LO pairs.
\n
"
);
}
}
Saig_ManForEachLo
(
p1
,
pObj1
,
i
)
Saig_ManForEachLo
(
p1
,
pObj1
,
i
)
{
{
...
@@ -112,7 +112,7 @@ void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
...
@@ -112,7 +112,7 @@ void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
continue
;
continue
;
pObj0
=
(
Aig_Obj_t
*
)
pObj1
->
pData
;
pObj0
=
(
Aig_Obj_t
*
)
pObj1
->
pData
;
if
(
!
Saig_ObjIsLo
(
p0
,
pObj0
)
)
if
(
!
Saig_ObjIsLo
(
p0
,
pObj0
)
)
printf
(
"Mismatch between LO pairs.
\n
"
);
Abc_Print
(
1
,
"Mismatch between LO pairs.
\n
"
);
}
}
}
}
...
@@ -164,7 +164,7 @@ void Ssw_MatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
...
@@ -164,7 +164,7 @@ void Ssw_MatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
Vec_PtrPush
(
vNodes
,
pNext
);
Vec_PtrPush
(
vNodes
,
pNext
);
}
}
}
}
Aig_ObjForEachFanout
(
p
,
pObj
,
pNext
,
iFan
,
k
)
Aig_ObjForEachFanout
(
p
,
pObj
,
pNext
,
iFan
,
k
)
{
{
if
(
Saig_ObjIsPo
(
p
,
pNext
)
)
if
(
Saig_ObjIsPo
(
p
,
pNext
)
)
continue
;
continue
;
...
@@ -184,7 +184,7 @@ void Ssw_MatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
...
@@ -184,7 +184,7 @@ void Ssw_MatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
Synopsis [Establishes relationship between nodes using pairing.]
Synopsis [Establishes relationship between nodes using pairing.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -228,9 +228,9 @@ void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose
...
@@ -228,9 +228,9 @@ void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose
if
(
fVerbose
)
if
(
fVerbose
)
{
{
int
nUnmached
=
Ssw_MatchingCountUnmached
(
p0
);
int
nUnmached
=
Ssw_MatchingCountUnmached
(
p0
);
printf
(
"Extending islands by %d steps:
\n
"
,
nDist
);
Abc_Print
(
1
,
"Extending islands by %d steps:
\n
"
,
nDist
);
printf
(
"%2d : Total = %6d. Unmatched = %6d. Ratio = %6.2f %%
\n
"
,
Abc_Print
(
1
,
"%2d : Total = %6d. Unmatched = %6d. Ratio = %6.2f %%
\n
"
,
0
,
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
),
0
,
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
),
nUnmached
,
100
.
0
*
nUnmached
/
(
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
))
);
nUnmached
,
100
.
0
*
nUnmached
/
(
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
))
);
}
}
for
(
d
=
0
;
d
<
nDist
;
d
++
)
for
(
d
=
0
;
d
<
nDist
;
d
++
)
...
@@ -262,8 +262,8 @@ void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose
...
@@ -262,8 +262,8 @@ void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose
if
(
fVerbose
)
if
(
fVerbose
)
{
{
int
nUnmached
=
Ssw_MatchingCountUnmached
(
p0
);
int
nUnmached
=
Ssw_MatchingCountUnmached
(
p0
);
printf
(
"%2d : Total = %6d. Unmatched = %6d. Ratio = %6.2f %%
\n
"
,
Abc_Print
(
1
,
"%2d : Total = %6d. Unmatched = %6d. Ratio = %6.2f %%
\n
"
,
d
+
1
,
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
),
d
+
1
,
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
),
nUnmached
,
100
.
0
*
nUnmached
/
(
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
))
);
nUnmached
,
100
.
0
*
nUnmached
/
(
Aig_ManCiNum
(
p0
)
+
Aig_ManNodeNum
(
p0
))
);
}
}
}
}
...
@@ -323,7 +323,7 @@ void Ssw_MatchingComplete( Aig_Man_t * p0, Aig_Man_t * p1 )
...
@@ -323,7 +323,7 @@ void Ssw_MatchingComplete( Aig_Man_t * p0, Aig_Man_t * p1 )
Synopsis [Derives matching for all pairs.]
Synopsis [Derives matching for all pairs.]
Description [Modifies both AIGs.]
Description [Modifies both AIGs.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -361,7 +361,7 @@ Vec_Int_t * Ssw_MatchingPairs( Aig_Man_t * p0, Aig_Man_t * p1 )
...
@@ -361,7 +361,7 @@ Vec_Int_t * Ssw_MatchingPairs( Aig_Man_t * p0, Aig_Man_t * p1 )
Synopsis [Transfers the result of matching to miter.]
Synopsis [Transfers the result of matching to miter.]
Description [The array of pairs should be complete.]
Description [The array of pairs should be complete.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -410,7 +410,7 @@ Vec_Int_t * Ssw_MatchingMiter( Aig_Man_t * pMiter, Aig_Man_t * p0, Aig_Man_t * p
...
@@ -410,7 +410,7 @@ Vec_Int_t * Ssw_MatchingMiter( Aig_Man_t * pMiter, Aig_Man_t * p0, Aig_Man_t * p
Synopsis [Solves SEC using structural similarity.]
Synopsis [Solves SEC using structural similarity.]
Description [Modifies both p0 and p1 by adding extra logic.]
Description [Modifies both p0 and p1 by adding extra logic.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -418,7 +418,7 @@ Vec_Int_t * Ssw_MatchingMiter( Aig_Man_t * pMiter, Aig_Man_t * p0, Aig_Man_t * p
...
@@ -418,7 +418,7 @@ Vec_Int_t * Ssw_MatchingMiter( Aig_Man_t * pMiter, Aig_Man_t * p0, Aig_Man_t * p
***********************************************************************/
***********************************************************************/
Aig_Man_t
*
Ssw_SecWithSimilaritySweep
(
Aig_Man_t
*
p0
,
Aig_Man_t
*
p1
,
Vec_Int_t
*
vPairs
,
Ssw_Pars_t
*
pPars
)
Aig_Man_t
*
Ssw_SecWithSimilaritySweep
(
Aig_Man_t
*
p0
,
Aig_Man_t
*
p1
,
Vec_Int_t
*
vPairs
,
Ssw_Pars_t
*
pPars
)
{
{
Ssw_Man_t
*
p
;
Ssw_Man_t
*
p
;
Vec_Int_t
*
vPairsAll
,
*
vPairsMiter
;
Vec_Int_t
*
vPairsAll
,
*
vPairsMiter
;
Aig_Man_t
*
pMiter
,
*
pAigNew
;
Aig_Man_t
*
pMiter
,
*
pAigNew
;
// derive full matching
// derive full matching
...
@@ -446,10 +446,10 @@ Aig_Man_t * Ssw_SecWithSimilaritySweep( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_
...
@@ -446,10 +446,10 @@ Aig_Man_t * Ssw_SecWithSimilaritySweep( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_
Aig_Man_t
*
pSRed
=
Ssw_SpeculativeReduction
(
p
);
Aig_Man_t
*
pSRed
=
Ssw_SpeculativeReduction
(
p
);
Aig_ManDumpBlif
(
pSRed
,
"srm_part.blif"
,
NULL
,
NULL
);
Aig_ManDumpBlif
(
pSRed
,
"srm_part.blif"
,
NULL
,
NULL
);
Aig_ManStop
(
pSRed
);
Aig_ManStop
(
pSRed
);
printf
(
"Speculatively reduced miter is saved in file
\"
%s
\"
.
\n
"
,
"srm_part.blif"
);
Abc_Print
(
1
,
"Speculatively reduced miter is saved in file
\"
%s
\"
.
\n
"
,
"srm_part.blif"
);
}
}
else
else
printf
(
"Dumping speculative miter is possible only for partial signal correspondence (switch
\"
-c
\"
).
\n
"
);
Abc_Print
(
1
,
"Dumping speculative miter is possible only for partial signal correspondence (switch
\"
-c
\"
).
\n
"
);
}
}
p
->
pSml
=
Ssw_SmlStart
(
pMiter
,
0
,
1
+
p
->
pPars
->
nFramesAddSim
,
1
);
p
->
pSml
=
Ssw_SmlStart
(
pMiter
,
0
,
1
+
p
->
pPars
->
nFramesAddSim
,
1
);
Ssw_ClassesSetData
(
p
->
ppClasses
,
p
->
pSml
,
(
unsigned
(
*
)(
void
*
,
Aig_Obj_t
*
))
Ssw_SmlObjHashWord
,
(
int
(
*
)(
void
*
,
Aig_Obj_t
*
))
Ssw_SmlObjIsConstWord
,
(
int
(
*
)(
void
*
,
Aig_Obj_t
*
,
Aig_Obj_t
*
))
Ssw_SmlObjsAreEqualWord
);
Ssw_ClassesSetData
(
p
->
ppClasses
,
p
->
pSml
,
(
unsigned
(
*
)(
void
*
,
Aig_Obj_t
*
))
Ssw_SmlObjHashWord
,
(
int
(
*
)(
void
*
,
Aig_Obj_t
*
))
Ssw_SmlObjIsConstWord
,
(
int
(
*
)(
void
*
,
Aig_Obj_t
*
,
Aig_Obj_t
*
))
Ssw_SmlObjsAreEqualWord
);
...
@@ -489,11 +489,11 @@ int Ssw_SecWithSimilarityPairs( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPai
...
@@ -489,11 +489,11 @@ int Ssw_SecWithSimilarityPairs( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPai
// report the result of verification
// report the result of verification
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
if
(
RetValue
==
1
)
if
(
RetValue
==
1
)
printf
(
"Verification successful. "
);
Abc_Print
(
1
,
"Verification successful. "
);
else
if
(
RetValue
==
0
)
else
if
(
RetValue
==
0
)
printf
(
"Verification failed with a counter-example. "
);
Abc_Print
(
1
,
"Verification failed with a counter-example. "
);
else
else
printf
(
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Abc_Print
(
1
,
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
p0
)
+
Aig_ManRegNum
(
p1
)
);
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
p0
)
+
Aig_ManRegNum
(
p1
)
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
Aig_ManStop
(
pAigRes
);
Aig_ManStop
(
pAigRes
);
...
@@ -545,7 +545,7 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
...
@@ -545,7 +545,7 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
Aig_Man_t
*
pPart0
,
*
pPart1
;
Aig_Man_t
*
pPart0
,
*
pPart1
;
int
RetValue
;
int
RetValue
;
if
(
pPars
->
fVerbose
)
if
(
pPars
->
fVerbose
)
printf
(
"Performing sequential verification using structural similarity.
\n
"
);
Abc_Print
(
1
,
"Performing sequential verification using structural similarity.
\n
"
);
// consider the case when a miter is given
// consider the case when a miter is given
if
(
p1
==
NULL
)
if
(
p1
==
NULL
)
{
{
...
@@ -556,7 +556,7 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
...
@@ -556,7 +556,7 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
// demiter the miter
// demiter the miter
if
(
!
Saig_ManDemiterSimpleDiff
(
p0
,
&
pPart0
,
&
pPart1
)
)
if
(
!
Saig_ManDemiterSimpleDiff
(
p0
,
&
pPart0
,
&
pPart1
)
)
{
{
printf
(
"Demitering has failed.
\n
"
);
Abc_Print
(
1
,
"Demitering has failed.
\n
"
);
return
-
1
;
return
-
1
;
}
}
}
}
...
@@ -573,7 +573,7 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
...
@@ -573,7 +573,7 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
{
{
// Aig_ManDumpBlif( pPart0, "part0.blif", NULL, NULL );
// Aig_ManDumpBlif( pPart0, "part0.blif", NULL, NULL );
// Aig_ManDumpBlif( pPart1, "part1.blif", NULL, NULL );
// Aig_ManDumpBlif( pPart1, "part1.blif", NULL, NULL );
//
printf(
"The result of demitering is written into files \"%s\" and \"%s\".\n", "part0.blif", "part1.blif" );
//
Abc_Print( 1,
"The result of demitering is written into files \"%s\" and \"%s\".\n", "part0.blif", "part1.blif" );
}
}
}
}
assert
(
Aig_ManRegNum
(
pPart0
)
>
0
);
assert
(
Aig_ManRegNum
(
pPart0
)
>
0
);
...
@@ -596,4 +596,3 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
...
@@ -596,4 +596,3 @@ int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswLcorr.c
View file @
c3168ba6
...
@@ -69,7 +69,7 @@ void Ssw_ManSweepTransfer( Ssw_Man_t * p )
...
@@ -69,7 +69,7 @@ void Ssw_ManSweepTransfer( Ssw_Man_t * p )
Synopsis [Performs one round of simulation with counter-examples.]
Synopsis [Performs one round of simulation with counter-examples.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -99,7 +99,7 @@ p->timeSimSat += clock() - clk;
...
@@ -99,7 +99,7 @@ p->timeSimSat += clock() - clk;
Synopsis [Saves one counter-example into internal storage.]
Synopsis [Saves one counter-example into internal storage.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -127,7 +127,7 @@ void Ssw_SmlAddPattern( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pCand )
...
@@ -127,7 +127,7 @@ void Ssw_SmlAddPattern( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pCand )
Synopsis [Builds fraiged logic cone of the node.]
Synopsis [Builds fraiged logic cone of the node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -151,7 +151,7 @@ void Ssw_ManBuildCone_rec( Ssw_Man_t * p, Aig_Obj_t * pObj )
...
@@ -151,7 +151,7 @@ void Ssw_ManBuildCone_rec( Ssw_Man_t * p, Aig_Obj_t * pObj )
Synopsis [Recycles the SAT solver.]
Synopsis [Recycles the SAT solver.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -173,17 +173,17 @@ void Ssw_ManSweepLatchOne( Ssw_Man_t * p, Aig_Obj_t * pObjRepr, Aig_Obj_t * pObj
...
@@ -173,17 +173,17 @@ void Ssw_ManSweepLatchOne( Ssw_Man_t * p, Aig_Obj_t * pObjRepr, Aig_Obj_t * pObj
p
->
nCallsDelta
=
0
;
p
->
nCallsDelta
=
0
;
clk
=
clock
();
clk
=
clock
();
// get the fraiged node
// get the fraiged node
pObjLi
=
Saig_ObjLoToLi
(
p
->
pAig
,
pObj
);
pObjLi
=
Saig_ObjLoToLi
(
p
->
pAig
,
pObj
);
Ssw_ManBuildCone_rec
(
p
,
Aig_ObjFanin0
(
pObjLi
)
);
Ssw_ManBuildCone_rec
(
p
,
Aig_ObjFanin0
(
pObjLi
)
);
pObjFraig
=
Ssw_ObjChild0Fra
(
p
,
pObjLi
,
0
);
pObjFraig
=
Ssw_ObjChild0Fra
(
p
,
pObjLi
,
0
);
// get the fraiged representative
// get the fraiged representative
if
(
Aig_ObjIsCi
(
pObjRepr
)
)
if
(
Aig_ObjIsCi
(
pObjRepr
)
)
{
{
pObjLi
=
Saig_ObjLoToLi
(
p
->
pAig
,
pObjRepr
);
pObjLi
=
Saig_ObjLoToLi
(
p
->
pAig
,
pObjRepr
);
Ssw_ManBuildCone_rec
(
p
,
Aig_ObjFanin0
(
pObjLi
)
);
Ssw_ManBuildCone_rec
(
p
,
Aig_ObjFanin0
(
pObjLi
)
);
pObjReprFraig
=
Ssw_ObjChild0Fra
(
p
,
pObjLi
,
0
);
pObjReprFraig
=
Ssw_ObjChild0Fra
(
p
,
pObjLi
,
0
);
}
}
else
else
pObjReprFraig
=
Ssw_ObjFrame
(
p
,
pObjRepr
,
0
);
pObjReprFraig
=
Ssw_ObjFrame
(
p
,
pObjRepr
,
0
);
p
->
timeReduce
+=
clock
()
-
clk
;
p
->
timeReduce
+=
clock
()
-
clk
;
// if the fraiged nodes are the same, return
// if the fraiged nodes are the same, return
...
@@ -200,7 +200,7 @@ p->timeReduce += clock() - clk;
...
@@ -200,7 +200,7 @@ p->timeReduce += clock() - clk;
p
->
fRefined
=
1
;
p
->
fRefined
=
1
;
}
}
else
else
{
{
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObjReprFraig
),
Aig_Regular
(
pObjFraig
)
);
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObjReprFraig
),
Aig_Regular
(
pObjFraig
)
);
if
(
RetValue
==
1
)
// proved equivalence
if
(
RetValue
==
1
)
// proved equivalence
{
{
...
@@ -215,7 +215,7 @@ p->timeReduce += clock() - clk;
...
@@ -215,7 +215,7 @@ p->timeReduce += clock() - clk;
return
;
return
;
}
}
else
// disproved equivalence
else
// disproved equivalence
{
{
Ssw_SmlAddPattern
(
p
,
pObjRepr
,
pObj
);
Ssw_SmlAddPattern
(
p
,
pObjRepr
,
pObj
);
p
->
nPatterns
++
;
p
->
nPatterns
++
;
p
->
nCallsSat
++
;
p
->
nCallsSat
++
;
...
@@ -229,7 +229,7 @@ p->timeReduce += clock() - clk;
...
@@ -229,7 +229,7 @@ p->timeReduce += clock() - clk;
Synopsis [Performs one iteration of sweeping latches.]
Synopsis [Performs one iteration of sweeping latches.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -301,7 +301,7 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
...
@@ -301,7 +301,7 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
if
(
p
->
nPatterns
==
32
)
if
(
p
->
nPatterns
==
32
)
Ssw_ManSweepResimulate
(
p
);
Ssw_ManSweepResimulate
(
p
);
// attempt recycling the SAT solver
// attempt recycling the SAT solver
if
(
p
->
pPars
->
nSatVarMax
&&
if
(
p
->
pPars
->
nSatVarMax
&&
p
->
pMSat
->
nSatVars
>
p
->
pPars
->
nSatVarMax
&&
p
->
pMSat
->
nSatVars
>
p
->
pPars
->
nSatVarMax
&&
p
->
nRecycleCalls
>
p
->
pPars
->
nRecycleCalls
)
p
->
nRecycleCalls
>
p
->
pPars
->
nRecycleCalls
)
{
{
...
@@ -315,7 +315,7 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
...
@@ -315,7 +315,7 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
}
}
// ABC_PRT( "reduce", p->timeReduce );
// ABC_PRT( "reduce", p->timeReduce );
// Aig_TableProfile( p->pFrames );
// Aig_TableProfile( p->pFrames );
//
printf(
"And gates = %d\n", Aig_ManNodeNum(p->pFrames) );
//
Abc_Print( 1,
"And gates = %d\n", Aig_ManNodeNum(p->pFrames) );
// resimulate
// resimulate
if
(
p
->
nPatterns
>
0
)
if
(
p
->
nPatterns
>
0
)
Ssw_ManSweepResimulate
(
p
);
Ssw_ManSweepResimulate
(
p
);
...
@@ -335,4 +335,3 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
...
@@ -335,4 +335,3 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswMan.c
View file @
c3168ba6
...
@@ -50,7 +50,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -50,7 +50,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
Aig_ManFanoutStart
(
pAig
);
Aig_ManFanoutStart
(
pAig
);
Aig_ManSetCioIds
(
pAig
);
Aig_ManSetCioIds
(
pAig
);
// create interpolation manager
// create interpolation manager
p
=
ABC_ALLOC
(
Ssw_Man_t
,
1
);
p
=
ABC_ALLOC
(
Ssw_Man_t
,
1
);
memset
(
p
,
0
,
sizeof
(
Ssw_Man_t
)
);
memset
(
p
,
0
,
sizeof
(
Ssw_Man_t
)
);
p
->
pPars
=
pPars
;
p
->
pPars
=
pPars
;
p
->
pAig
=
pAig
;
p
->
pAig
=
pAig
;
...
@@ -60,7 +60,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -60,7 +60,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
p
->
iOutputLit
=
-
1
;
p
->
iOutputLit
=
-
1
;
// allocate storage for sim pattern
// allocate storage for sim pattern
p
->
nPatWords
=
Abc_BitWordNum
(
Saig_ManPiNum
(
pAig
)
*
p
->
nFrames
+
Saig_ManRegNum
(
pAig
)
);
p
->
nPatWords
=
Abc_BitWordNum
(
Saig_ManPiNum
(
pAig
)
*
p
->
nFrames
+
Saig_ManRegNum
(
pAig
)
);
p
->
pPatWords
=
ABC_CALLOC
(
unsigned
,
p
->
nPatWords
);
p
->
pPatWords
=
ABC_CALLOC
(
unsigned
,
p
->
nPatWords
);
// other
// other
p
->
vNewLos
=
Vec_PtrAlloc
(
100
);
p
->
vNewLos
=
Vec_PtrAlloc
(
100
);
p
->
vNewPos
=
Vec_IntAlloc
(
100
);
p
->
vNewPos
=
Vec_IntAlloc
(
100
);
...
@@ -75,7 +75,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -75,7 +75,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
Synopsis [Prints stats of the manager.]
Synopsis [Prints stats of the manager.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -105,17 +105,17 @@ void Ssw_ManPrintStats( Ssw_Man_t * p )
...
@@ -105,17 +105,17 @@ void Ssw_ManPrintStats( Ssw_Man_t * p )
{
{
double
nMemory
=
1
.
0
*
Aig_ManObjNumMax
(
p
->
pAig
)
*
p
->
nFrames
*
(
2
*
sizeof
(
int
)
+
2
*
sizeof
(
void
*
))
/
(
1
<<
20
);
double
nMemory
=
1
.
0
*
Aig_ManObjNumMax
(
p
->
pAig
)
*
p
->
nFrames
*
(
2
*
sizeof
(
int
)
+
2
*
sizeof
(
void
*
))
/
(
1
<<
20
);
printf
(
"Parameters: F = %d. AddF = %d. C-lim = %d. Constr = %d. MaxLev = %d. Mem = %0.2f MB.
\n
"
,
Abc_Print
(
1
,
"Parameters: F = %d. AddF = %d. C-lim = %d. Constr = %d. MaxLev = %d. Mem = %0.2f MB.
\n
"
,
p
->
pPars
->
nFramesK
,
p
->
pPars
->
nFramesAddSim
,
p
->
pPars
->
nBTLimit
,
Saig_ManConstrNum
(
p
->
pAig
),
p
->
pPars
->
nMaxLevs
,
nMemory
);
p
->
pPars
->
nFramesK
,
p
->
pPars
->
nFramesAddSim
,
p
->
pPars
->
nBTLimit
,
Saig_ManConstrNum
(
p
->
pAig
),
p
->
pPars
->
nMaxLevs
,
nMemory
);
printf
(
"AIG : PI = %d. PO = %d. Latch = %d. Node = %d. Ave SAT vars = %d.
\n
"
,
Abc_Print
(
1
,
"AIG : PI = %d. PO = %d. Latch = %d. Node = %d. Ave SAT vars = %d.
\n
"
,
Saig_ManPiNum
(
p
->
pAig
),
Saig_ManPoNum
(
p
->
pAig
),
Saig_ManRegNum
(
p
->
pAig
),
Aig_ManNodeNum
(
p
->
pAig
),
Saig_ManPiNum
(
p
->
pAig
),
Saig_ManPoNum
(
p
->
pAig
),
Saig_ManRegNum
(
p
->
pAig
),
Aig_ManNodeNum
(
p
->
pAig
),
0
/
(
p
->
pPars
->
nIters
+
1
)
);
0
/
(
p
->
pPars
->
nIters
+
1
)
);
printf
(
"SAT calls : Proof = %d. Cex = %d. Fail = %d. Lits proved = %d.
\n
"
,
Abc_Print
(
1
,
"SAT calls : Proof = %d. Cex = %d. Fail = %d. Lits proved = %d.
\n
"
,
p
->
nSatProof
,
p
->
nSatCallsSat
,
p
->
nSatFailsReal
,
Ssw_ManCountEquivs
(
p
)
);
p
->
nSatProof
,
p
->
nSatCallsSat
,
p
->
nSatFailsReal
,
Ssw_ManCountEquivs
(
p
)
);
printf
(
"SAT solver: Vars max = %d. Calls max = %d. Recycles = %d. Sim rounds = %d.
\n
"
,
Abc_Print
(
1
,
"SAT solver: Vars max = %d. Calls max = %d. Recycles = %d. Sim rounds = %d.
\n
"
,
p
->
nVarsMax
,
p
->
nCallsMax
,
p
->
nRecyclesTotal
,
p
->
nSimRounds
);
p
->
nVarsMax
,
p
->
nCallsMax
,
p
->
nRecyclesTotal
,
p
->
nSimRounds
);
printf
(
"NBeg = %d. NEnd = %d. (Gain = %6.2f %%). RBeg = %d. REnd = %d. (Gain = %6.2f %%).
\n
"
,
Abc_Print
(
1
,
"NBeg = %d. NEnd = %d. (Gain = %6.2f %%). RBeg = %d. REnd = %d. (Gain = %6.2f %%).
\n
"
,
p
->
nNodesBeg
,
p
->
nNodesEnd
,
100
.
0
*
(
p
->
nNodesBeg
-
p
->
nNodesEnd
)
/
(
p
->
nNodesBeg
?
p
->
nNodesBeg
:
1
),
p
->
nNodesBeg
,
p
->
nNodesEnd
,
100
.
0
*
(
p
->
nNodesBeg
-
p
->
nNodesEnd
)
/
(
p
->
nNodesBeg
?
p
->
nNodesBeg
:
1
),
p
->
nRegsBeg
,
p
->
nRegsEnd
,
100
.
0
*
(
p
->
nRegsBeg
-
p
->
nRegsEnd
)
/
(
p
->
nRegsBeg
?
p
->
nRegsBeg
:
1
)
);
p
->
nRegsBeg
,
p
->
nRegsEnd
,
100
.
0
*
(
p
->
nRegsBeg
-
p
->
nRegsEnd
)
/
(
p
->
nRegsBeg
?
p
->
nRegsBeg
:
1
)
);
p
->
timeOther
=
p
->
timeTotal
-
p
->
timeBmc
-
p
->
timeReduce
-
p
->
timeMarkCones
-
p
->
timeSimSat
-
p
->
timeSat
;
p
->
timeOther
=
p
->
timeTotal
-
p
->
timeBmc
-
p
->
timeReduce
-
p
->
timeMarkCones
-
p
->
timeSimSat
-
p
->
timeSat
;
...
@@ -133,13 +133,13 @@ void Ssw_ManPrintStats( Ssw_Man_t * p )
...
@@ -133,13 +133,13 @@ void Ssw_ManPrintStats( Ssw_Man_t * p )
// report the reductions
// report the reductions
if
(
p
->
pAig
->
nConstrs
)
if
(
p
->
pAig
->
nConstrs
)
{
{
printf
(
"Statistics reflecting the use of constraints:
\n
"
);
Abc_Print
(
1
,
"Statistics reflecting the use of constraints:
\n
"
);
printf
(
"Total cones = %6d. Constraint cones = %6d. (%6.2f %%)
\n
"
,
Abc_Print
(
1
,
"Total cones = %6d. Constraint cones = %6d. (%6.2f %%)
\n
"
,
p
->
nConesTotal
,
p
->
nConesConstr
,
100
.
0
*
p
->
nConesConstr
/
p
->
nConesTotal
);
p
->
nConesTotal
,
p
->
nConesConstr
,
100
.
0
*
p
->
nConesConstr
/
p
->
nConesTotal
);
printf
(
"Total equivs = %6d. Removed equivs = %6d. (%6.2f %%)
\n
"
,
Abc_Print
(
1
,
"Total equivs = %6d. Removed equivs = %6d. (%6.2f %%)
\n
"
,
p
->
nEquivsTotal
,
p
->
nEquivsConstr
,
100
.
0
*
p
->
nEquivsConstr
/
p
->
nEquivsTotal
);
p
->
nEquivsTotal
,
p
->
nEquivsConstr
,
100
.
0
*
p
->
nEquivsConstr
/
p
->
nEquivsTotal
);
printf
(
"NBeg = %d. NEnd = %d. (Gain = %6.2f %%). RBeg = %d. REnd = %d. (Gain = %6.2f %%).
\n
"
,
Abc_Print
(
1
,
"NBeg = %d. NEnd = %d. (Gain = %6.2f %%). RBeg = %d. REnd = %d. (Gain = %6.2f %%).
\n
"
,
p
->
nNodesBegC
,
p
->
nNodesEndC
,
100
.
0
*
(
p
->
nNodesBegC
-
p
->
nNodesEndC
)
/
(
p
->
nNodesBegC
?
p
->
nNodesBegC
:
1
),
p
->
nNodesBegC
,
p
->
nNodesEndC
,
100
.
0
*
(
p
->
nNodesBegC
-
p
->
nNodesEndC
)
/
(
p
->
nNodesBegC
?
p
->
nNodesBegC
:
1
),
p
->
nRegsBegC
,
p
->
nRegsEndC
,
100
.
0
*
(
p
->
nRegsBegC
-
p
->
nRegsEndC
)
/
(
p
->
nRegsBegC
?
p
->
nRegsBegC
:
1
)
);
p
->
nRegsBegC
,
p
->
nRegsEndC
,
100
.
0
*
(
p
->
nRegsBegC
-
p
->
nRegsEndC
)
/
(
p
->
nRegsBegC
?
p
->
nRegsBegC
:
1
)
);
}
}
}
}
...
@@ -166,7 +166,7 @@ void Ssw_ManCleanup( Ssw_Man_t * p )
...
@@ -166,7 +166,7 @@ void Ssw_ManCleanup( Ssw_Man_t * p )
p
->
pFrames
=
NULL
;
p
->
pFrames
=
NULL
;
memset
(
p
->
pNodeToFrames
,
0
,
sizeof
(
Aig_Obj_t
*
)
*
Aig_ManObjNumMax
(
p
->
pAig
)
*
p
->
nFrames
);
memset
(
p
->
pNodeToFrames
,
0
,
sizeof
(
Aig_Obj_t
*
)
*
Aig_ManObjNumMax
(
p
->
pAig
)
*
p
->
nFrames
);
}
}
if
(
p
->
vSimInfo
)
if
(
p
->
vSimInfo
)
{
{
Vec_PtrFree
(
p
->
vSimInfo
);
Vec_PtrFree
(
p
->
vSimInfo
);
p
->
vSimInfo
=
NULL
;
p
->
vSimInfo
=
NULL
;
...
@@ -180,7 +180,7 @@ void Ssw_ManCleanup( Ssw_Man_t * p )
...
@@ -180,7 +180,7 @@ void Ssw_ManCleanup( Ssw_Man_t * p )
Synopsis [Frees the manager.]
Synopsis [Frees the manager.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -193,7 +193,7 @@ void Ssw_ManStop( Ssw_Man_t * p )
...
@@ -193,7 +193,7 @@ void Ssw_ManStop( Ssw_Man_t * p )
Ssw_ManPrintStats
(
p
);
Ssw_ManPrintStats
(
p
);
if
(
p
->
ppClasses
)
if
(
p
->
ppClasses
)
Ssw_ClassesStop
(
p
->
ppClasses
);
Ssw_ClassesStop
(
p
->
ppClasses
);
if
(
p
->
pSml
)
if
(
p
->
pSml
)
Ssw_SmlStop
(
p
->
pSml
);
Ssw_SmlStop
(
p
->
pSml
);
if
(
p
->
vDiffPairs
)
if
(
p
->
vDiffPairs
)
Vec_IntFree
(
p
->
vDiffPairs
);
Vec_IntFree
(
p
->
vDiffPairs
);
...
@@ -215,4 +215,3 @@ void Ssw_ManStop( Ssw_Man_t * p )
...
@@ -215,4 +215,3 @@ void Ssw_ManStop( Ssw_Man_t * p )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswPairs.c
View file @
c3168ba6
...
@@ -80,11 +80,11 @@ int Ssw_MiterStatus( Aig_Man_t * p, int fVerbose )
...
@@ -80,11 +80,11 @@ int Ssw_MiterStatus( Aig_Man_t * p, int fVerbose )
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Miter has %d outputs. "
,
Saig_ManPoNum
(
p
)
);
Abc_Print
(
1
,
"Miter has %d outputs. "
,
Saig_ManPoNum
(
p
)
);
printf
(
"Const0 = %d. "
,
CountConst0
);
Abc_Print
(
1
,
"Const0 = %d. "
,
CountConst0
);
printf
(
"NonConst0 = %d. "
,
CountNonConst0
);
Abc_Print
(
1
,
"NonConst0 = %d. "
,
CountNonConst0
);
printf
(
"Undecided = %d. "
,
CountUndecided
);
Abc_Print
(
1
,
"Undecided = %d. "
,
CountUndecided
);
printf
(
"
\n
"
);
Abc_Print
(
1
,
"
\n
"
);
}
}
if
(
CountNonConst0
)
if
(
CountNonConst0
)
...
@@ -140,7 +140,7 @@ Vec_Int_t * Ssw_TransferSignalPairs( Aig_Man_t * pMiter, Aig_Man_t * pAig1, Aig_
...
@@ -140,7 +140,7 @@ Vec_Int_t * Ssw_TransferSignalPairs( Aig_Man_t * pMiter, Aig_Man_t * pAig1, Aig_
Synopsis [Transform pairs into class representation.]
Synopsis [Transform pairs into class representation.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -187,12 +187,12 @@ Vec_Int_t ** Ssw_TransformPairsIntoTempClasses( Vec_Int_t * vPairs, int nObjNumM
...
@@ -187,12 +187,12 @@ Vec_Int_t ** Ssw_TransformPairsIntoTempClasses( Vec_Int_t * vPairs, int nObjNumM
else
if
(
idReprRepr
==
-
1
&&
idReprObj
>=
0
)
else
if
(
idReprRepr
==
-
1
&&
idReprObj
>=
0
)
{
// object has a class
{
// object has a class
assert
(
idReprObj
!=
idRepr
);
assert
(
idReprObj
!=
idRepr
);
if
(
idReprObj
<
idRepr
)
if
(
idReprObj
<
idRepr
)
{
// add idRepr to the same class
{
// add idRepr to the same class
Vec_IntPushUniqueOrder
(
pvClasses
[
idReprObj
],
idRepr
);
Vec_IntPushUniqueOrder
(
pvClasses
[
idReprObj
],
idRepr
);
pReprs
[
idRepr
]
=
idReprObj
;
pReprs
[
idRepr
]
=
idReprObj
;
}
}
else
// if ( idReprObj > idRepr )
else
// if ( idReprObj > idRepr )
{
// make idRepr new representative
{
// make idRepr new representative
Vec_IntPushFirst
(
pvClasses
[
idReprObj
],
idRepr
);
Vec_IntPushFirst
(
pvClasses
[
idReprObj
],
idRepr
);
pvClasses
[
idRepr
]
=
pvClasses
[
idReprObj
];
pvClasses
[
idRepr
]
=
pvClasses
[
idReprObj
];
...
@@ -243,7 +243,7 @@ Vec_Int_t ** Ssw_TransformPairsIntoTempClasses( Vec_Int_t * vPairs, int nObjNumM
...
@@ -243,7 +243,7 @@ Vec_Int_t ** Ssw_TransformPairsIntoTempClasses( Vec_Int_t * vPairs, int nObjNumM
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -253,7 +253,7 @@ void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
...
@@ -253,7 +253,7 @@ void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
{
{
int
i
;
int
i
;
for
(
i
=
0
;
i
<
nObjNumMax
;
i
++
)
for
(
i
=
0
;
i
<
nObjNumMax
;
i
++
)
if
(
pvClasses
[
i
]
)
if
(
pvClasses
[
i
]
)
Vec_IntFree
(
pvClasses
[
i
]
);
Vec_IntFree
(
pvClasses
[
i
]
);
ABC_FREE
(
pvClasses
);
ABC_FREE
(
pvClasses
);
}
}
...
@@ -263,7 +263,7 @@ void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
...
@@ -263,7 +263,7 @@ void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
Synopsis [Performs signal correspondence for the miter of two AIGs with node pairs defined.]
Synopsis [Performs signal correspondence for the miter of two AIGs with node pairs defined.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -271,7 +271,7 @@ void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
...
@@ -271,7 +271,7 @@ void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
***********************************************************************/
***********************************************************************/
Aig_Man_t
*
Ssw_SignalCorrespondenceWithPairs
(
Aig_Man_t
*
pAig1
,
Aig_Man_t
*
pAig2
,
Vec_Int_t
*
vIds1
,
Vec_Int_t
*
vIds2
,
Ssw_Pars_t
*
pPars
)
Aig_Man_t
*
Ssw_SignalCorrespondenceWithPairs
(
Aig_Man_t
*
pAig1
,
Aig_Man_t
*
pAig2
,
Vec_Int_t
*
vIds1
,
Vec_Int_t
*
vIds2
,
Ssw_Pars_t
*
pPars
)
{
{
Ssw_Man_t
*
p
;
Ssw_Man_t
*
p
;
Aig_Man_t
*
pAigNew
,
*
pMiter
;
Aig_Man_t
*
pAigNew
,
*
pMiter
;
Ssw_Pars_t
Pars
;
Ssw_Pars_t
Pars
;
Vec_Int_t
*
vPairs
;
Vec_Int_t
*
vPairs
;
...
@@ -308,7 +308,7 @@ Aig_Man_t * Ssw_SignalCorrespondenceWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pA
...
@@ -308,7 +308,7 @@ Aig_Man_t * Ssw_SignalCorrespondenceWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pA
Synopsis [Runs inductive SEC for the miter of two AIGs with node pairs defined.]
Synopsis [Runs inductive SEC for the miter of two AIGs with node pairs defined.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -337,16 +337,16 @@ Aig_Man_t * Ssw_SignalCorrespondeceTestPairs( Aig_Man_t * pAig )
...
@@ -337,16 +337,16 @@ Aig_Man_t * Ssw_SignalCorrespondeceTestPairs( Aig_Man_t * pAig )
continue
;
continue
;
/*
/*
if ( Aig_ObjIsNode(pObj) )
if ( Aig_ObjIsNode(pObj) )
printf(
"n " );
Abc_Print( 1,
"n " );
else if ( Saig_ObjIsPi(pAig, pObj) )
else if ( Saig_ObjIsPi(pAig, pObj) )
printf(
"pi " );
Abc_Print( 1,
"pi " );
else if ( Saig_ObjIsLo(pAig, pObj) )
else if ( Saig_ObjIsLo(pAig, pObj) )
printf(
"lo " );
Abc_Print( 1,
"lo " );
*/
*/
Vec_IntPush
(
vIds1
,
Aig_ObjId
(
pObj
)
);
Vec_IntPush
(
vIds1
,
Aig_ObjId
(
pObj
)
);
Vec_IntPush
(
vIds2
,
Aig_ObjId
(
pRepr
)
);
Vec_IntPush
(
vIds2
,
Aig_ObjId
(
pRepr
)
);
}
}
printf
(
"Recorded %d pairs (before: %d after: %d).
\n
"
,
Vec_IntSize
(
vIds1
),
Aig_ManObjNumMax
(
pAig
),
Aig_ManObjNumMax
(
pAigNew
)
);
Abc_Print
(
1
,
"Recorded %d pairs (before: %d after: %d).
\n
"
,
Vec_IntSize
(
vIds1
),
Aig_ManObjNumMax
(
pAig
),
Aig_ManObjNumMax
(
pAigNew
)
);
// try the new AIGs
// try the new AIGs
pAigRes
=
Ssw_SignalCorrespondenceWithPairs
(
pAig
,
pAigNew
,
vIds1
,
vIds2
,
pPars
);
pAigRes
=
Ssw_SignalCorrespondenceWithPairs
(
pAig
,
pAigNew
,
vIds1
,
vIds2
,
pPars
);
Vec_IntFree
(
vIds1
);
Vec_IntFree
(
vIds1
);
...
@@ -354,11 +354,11 @@ Aig_Man_t * Ssw_SignalCorrespondeceTestPairs( Aig_Man_t * pAig )
...
@@ -354,11 +354,11 @@ Aig_Man_t * Ssw_SignalCorrespondeceTestPairs( Aig_Man_t * pAig )
// report the results
// report the results
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
if
(
RetValue
==
1
)
if
(
RetValue
==
1
)
printf
(
"Verification successful. "
);
Abc_Print
(
1
,
"Verification successful. "
);
else
if
(
RetValue
==
0
)
else
if
(
RetValue
==
0
)
printf
(
"Verification failed with the counter-example. "
);
Abc_Print
(
1
,
"Verification failed with the counter-example. "
);
else
else
printf
(
"Verification UNDECIDED. Remaining registers %d (total %d). "
,
Abc_Print
(
1
,
"Verification UNDECIDED. Remaining registers %d (total %d). "
,
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pAig
)
+
Aig_ManRegNum
(
pAigNew
)
);
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pAig
)
+
Aig_ManRegNum
(
pAigNew
)
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
// cleanup
// cleanup
...
@@ -384,16 +384,16 @@ int Ssw_SecWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vIds1, V
...
@@ -384,16 +384,16 @@ int Ssw_SecWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vIds1, V
clock_t
clk
=
clock
();
clock_t
clk
=
clock
();
assert
(
vIds1
!=
NULL
&&
vIds2
!=
NULL
);
assert
(
vIds1
!=
NULL
&&
vIds2
!=
NULL
);
// try the new AIGs
// try the new AIGs
printf
(
"Performing specialized verification with node pairs.
\n
"
);
Abc_Print
(
1
,
"Performing specialized verification with node pairs.
\n
"
);
pAigRes
=
Ssw_SignalCorrespondenceWithPairs
(
pAig1
,
pAig2
,
vIds1
,
vIds2
,
pPars
);
pAigRes
=
Ssw_SignalCorrespondenceWithPairs
(
pAig1
,
pAig2
,
vIds1
,
vIds2
,
pPars
);
// report the results
// report the results
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
if
(
RetValue
==
1
)
if
(
RetValue
==
1
)
printf
(
"Verification successful. "
);
Abc_Print
(
1
,
"Verification successful. "
);
else
if
(
RetValue
==
0
)
else
if
(
RetValue
==
0
)
printf
(
"Verification failed with a counter-example. "
);
Abc_Print
(
1
,
"Verification failed with a counter-example. "
);
else
else
printf
(
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Abc_Print
(
1
,
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pAig1
)
+
Aig_ManRegNum
(
pAig2
)
);
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pAig1
)
+
Aig_ManRegNum
(
pAig2
)
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
// cleanup
// cleanup
...
@@ -418,7 +418,7 @@ int Ssw_SecGeneral( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Ssw_Pars_t * pPars )
...
@@ -418,7 +418,7 @@ int Ssw_SecGeneral( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Ssw_Pars_t * pPars )
int
RetValue
;
int
RetValue
;
clock_t
clk
=
clock
();
clock_t
clk
=
clock
();
// try the new AIGs
// try the new AIGs
printf
(
"Performing general verification without node pairs.
\n
"
);
Abc_Print
(
1
,
"Performing general verification without node pairs.
\n
"
);
pMiter
=
Saig_ManCreateMiter
(
pAig1
,
pAig2
,
0
);
pMiter
=
Saig_ManCreateMiter
(
pAig1
,
pAig2
,
0
);
Aig_ManCleanup
(
pMiter
);
Aig_ManCleanup
(
pMiter
);
pAigRes
=
Ssw_SignalCorrespondence
(
pMiter
,
pPars
);
pAigRes
=
Ssw_SignalCorrespondence
(
pMiter
,
pPars
);
...
@@ -426,11 +426,11 @@ int Ssw_SecGeneral( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Ssw_Pars_t * pPars )
...
@@ -426,11 +426,11 @@ int Ssw_SecGeneral( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Ssw_Pars_t * pPars )
// report the results
// report the results
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
if
(
RetValue
==
1
)
if
(
RetValue
==
1
)
printf
(
"Verification successful. "
);
Abc_Print
(
1
,
"Verification successful. "
);
else
if
(
RetValue
==
0
)
else
if
(
RetValue
==
0
)
printf
(
"Verification failed with a counter-example. "
);
Abc_Print
(
1
,
"Verification failed with a counter-example. "
);
else
else
printf
(
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Abc_Print
(
1
,
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pAig1
)
+
Aig_ManRegNum
(
pAig2
)
);
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pAig1
)
+
Aig_ManRegNum
(
pAig2
)
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
// cleanup
// cleanup
...
@@ -455,16 +455,16 @@ int Ssw_SecGeneralMiter( Aig_Man_t * pMiter, Ssw_Pars_t * pPars )
...
@@ -455,16 +455,16 @@ int Ssw_SecGeneralMiter( Aig_Man_t * pMiter, Ssw_Pars_t * pPars )
int
RetValue
;
int
RetValue
;
clock_t
clk
=
clock
();
clock_t
clk
=
clock
();
// try the new AIGs
// try the new AIGs
//
printf(
"Performing general verification without node pairs.\n" );
//
Abc_Print( 1,
"Performing general verification without node pairs.\n" );
pAigRes
=
Ssw_SignalCorrespondence
(
pMiter
,
pPars
);
pAigRes
=
Ssw_SignalCorrespondence
(
pMiter
,
pPars
);
// report the results
// report the results
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
RetValue
=
Ssw_MiterStatus
(
pAigRes
,
1
);
if
(
RetValue
==
1
)
if
(
RetValue
==
1
)
printf
(
"Verification successful. "
);
Abc_Print
(
1
,
"Verification successful. "
);
else
if
(
RetValue
==
0
)
else
if
(
RetValue
==
0
)
printf
(
"Verification failed with a counter-example. "
);
Abc_Print
(
1
,
"Verification failed with a counter-example. "
);
else
else
printf
(
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Abc_Print
(
1
,
"Verification UNDECIDED. The number of remaining regs = %d (total = %d). "
,
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pMiter
)
);
Aig_ManRegNum
(
pAigRes
),
Aig_ManRegNum
(
pMiter
)
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
ABC_PRT
(
"Time"
,
clock
()
-
clk
);
// cleanup
// cleanup
...
@@ -478,4 +478,3 @@ int Ssw_SecGeneralMiter( Aig_Man_t * pMiter, Ssw_Pars_t * pPars )
...
@@ -478,4 +478,3 @@ int Ssw_SecGeneralMiter( Aig_Man_t * pMiter, Ssw_Pars_t * pPars )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswPart.c
View file @
c3168ba6
...
@@ -56,7 +56,7 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -56,7 +56,7 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
clock_t
clk
=
clock
();
clock_t
clk
=
clock
();
if
(
pPars
->
fConstrs
)
if
(
pPars
->
fConstrs
)
{
{
printf
(
"Cannot use partitioned computation with constraints.
\n
"
);
Abc_Print
(
1
,
"Cannot use partitioned computation with constraints.
\n
"
);
return
NULL
;
return
NULL
;
}
}
// save parameters
// save parameters
...
@@ -82,14 +82,14 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -82,14 +82,14 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
if
(
fPrintParts
)
if
(
fPrintParts
)
{
{
// print partitions
// print partitions
printf
(
"Simple partitioning. %d partitions are saved:
\n
"
,
Vec_PtrSize
(
vResult
)
);
Abc_Print
(
1
,
"Simple partitioning. %d partitions are saved:
\n
"
,
Vec_PtrSize
(
vResult
)
);
Vec_PtrForEachEntry
(
Vec_Int_t
*
,
vResult
,
vPart
,
i
)
Vec_PtrForEachEntry
(
Vec_Int_t
*
,
vResult
,
vPart
,
i
)
{
{
// extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
// extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
sprintf
(
Buffer
,
"part%03d.aig"
,
i
);
sprintf
(
Buffer
,
"part%03d.aig"
,
i
);
pTemp
=
Aig_ManRegCreatePart
(
pAig
,
vPart
,
&
nCountPis
,
&
nCountRegs
,
NULL
);
pTemp
=
Aig_ManRegCreatePart
(
pAig
,
vPart
,
&
nCountPis
,
&
nCountRegs
,
NULL
);
Ioa_WriteAiger
(
pTemp
,
Buffer
,
0
,
0
);
Ioa_WriteAiger
(
pTemp
,
Buffer
,
0
,
0
);
printf
(
"part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.
\n
"
,
Abc_Print
(
1
,
"part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.
\n
"
,
i
,
Vec_IntSize
(
vPart
),
Aig_ManCiNum
(
pTemp
)
-
Vec_IntSize
(
vPart
),
nCountPis
,
nCountRegs
,
Aig_ManNodeNum
(
pTemp
)
);
i
,
Vec_IntSize
(
vPart
),
Aig_ManCiNum
(
pTemp
)
-
Vec_IntSize
(
vPart
),
nCountPis
,
nCountRegs
,
Aig_ManNodeNum
(
pTemp
)
);
Aig_ManStop
(
pTemp
);
Aig_ManStop
(
pTemp
);
}
}
...
@@ -109,7 +109,7 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -109,7 +109,7 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
pNew
=
Ssw_SignalCorrespondence
(
pTemp
,
pPars
);
pNew
=
Ssw_SignalCorrespondence
(
pTemp
,
pPars
);
nClasses
=
Aig_TransferMappedClasses
(
pAig
,
pTemp
,
pMapBack
);
nClasses
=
Aig_TransferMappedClasses
(
pAig
,
pTemp
,
pMapBack
);
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d.
\n
"
,
Abc_Print
(
1
,
"%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d.
\n
"
,
i
,
Vec_IntSize
(
vPart
),
Aig_ManCiNum
(
pTemp
)
-
Vec_IntSize
(
vPart
),
nCountPis
,
nCountRegs
,
Aig_ManNodeNum
(
pTemp
),
pPars
->
nIters
,
nClasses
);
i
,
Vec_IntSize
(
vPart
),
Aig_ManCiNum
(
pTemp
)
-
Vec_IntSize
(
vPart
),
nCountPis
,
nCountRegs
,
Aig_ManNodeNum
(
pTemp
),
pPars
->
nIters
,
nClasses
);
Aig_ManStop
(
pNew
);
Aig_ManStop
(
pNew
);
}
}
...
@@ -138,4 +138,3 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
...
@@ -138,4 +138,3 @@ Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswRarity.c
View file @
c3168ba6
...
@@ -17,7 +17,7 @@
...
@@ -17,7 +17,7 @@
Revision [$Id: sswRarity.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
Revision [$Id: sswRarity.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
***********************************************************************/
***********************************************************************/
#include "sswInt.h"
#include "sswInt.h"
#include "aig/gia/giaAig.h"
#include "aig/gia/giaAig.h"
#include "base/main/main.h"
#include "base/main/main.h"
...
@@ -59,19 +59,19 @@ struct Ssw_RarMan_t_
...
@@ -59,19 +59,19 @@ struct Ssw_RarMan_t_
};
};
static
inline
int
Ssw_RarGetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
static
inline
int
Ssw_RarGetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
{
{
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
return
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
];
return
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
];
}
}
static
inline
void
Ssw_RarSetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
,
int
Value
)
static
inline
void
Ssw_RarSetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
,
int
Value
)
{
{
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
]
=
Value
;
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
]
=
Value
;
}
}
static
inline
void
Ssw_RarAddToBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
static
inline
void
Ssw_RarAddToBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
{
{
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
...
@@ -93,7 +93,7 @@ static inline word * Ssw_RarPatSim( Ssw_RarMan_t * p, int Id ) { assert( Id < 6
...
@@ -93,7 +93,7 @@ static inline word * Ssw_RarPatSim( Ssw_RarMan_t * p, int Id ) { assert( Id < 6
Synopsis [Prepares random number generator.]
Synopsis [Prepares random number generator.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -112,7 +112,7 @@ void Ssw_RarManPrepareRandom( int nRandSeed )
...
@@ -112,7 +112,7 @@ void Ssw_RarManPrepareRandom( int nRandSeed )
Synopsis [Initializes random primary inputs.]
Synopsis [Initializes random primary inputs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -139,7 +139,7 @@ void Ssw_RarManAssingRandomPis( Ssw_RarMan_t * p )
...
@@ -139,7 +139,7 @@ void Ssw_RarManAssingRandomPis( Ssw_RarMan_t * p )
Synopsis [Derives the counter-example.]
Synopsis [Derives the counter-example.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -184,13 +184,13 @@ Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFin
...
@@ -184,13 +184,13 @@ Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFin
// verify the counter example
// verify the counter example
if
(
!
Saig_ManVerifyCex
(
p
->
pAig
,
pCex
)
)
if
(
!
Saig_ManVerifyCex
(
p
->
pAig
,
pCex
)
)
{
{
printf
(
"Ssw_RarDeriveCex(): Counter-example is invalid.
\n
"
);
Abc_Print
(
1
,
"Ssw_RarDeriveCex(): Counter-example is invalid.
\n
"
);
// Abc_CexFree( pCex );
// Abc_CexFree( pCex );
// pCex = NULL;
// pCex = NULL;
}
}
else
else
{
{
//
printf(
"Counter-example verification is successful.\n" );
//
Abc_Print( 1,
"Counter-example verification is successful.\n" );
}
}
return
pCex
;
return
pCex
;
}
}
...
@@ -209,9 +209,9 @@ Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFin
...
@@ -209,9 +209,9 @@ Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFin
***********************************************************************/
***********************************************************************/
void
transpose32
(
unsigned
A
[
32
]
)
void
transpose32
(
unsigned
A
[
32
]
)
{
{
int
j
,
k
;
int
j
,
k
;
unsigned
t
,
m
=
0x0000FFFF
;
unsigned
t
,
m
=
0x0000FFFF
;
for
(
j
=
16
;
j
!=
0
;
j
=
j
>>
1
,
m
=
m
^
(
m
<<
j
)
)
for
(
j
=
16
;
j
!=
0
;
j
=
j
>>
1
,
m
=
m
^
(
m
<<
j
)
)
{
{
for
(
k
=
0
;
k
<
32
;
k
=
(
k
+
j
+
1
)
&
~
j
)
for
(
k
=
0
;
k
<
32
;
k
=
(
k
+
j
+
1
)
&
~
j
)
{
{
...
@@ -220,7 +220,7 @@ void transpose32( unsigned A[32] )
...
@@ -220,7 +220,7 @@ void transpose32( unsigned A[32] )
A
[
k
+
j
]
=
A
[
k
+
j
]
^
(
t
<<
j
);
A
[
k
+
j
]
=
A
[
k
+
j
]
^
(
t
<<
j
);
}
}
}
}
}
}
/**Function*************************************************************
/**Function*************************************************************
...
@@ -235,9 +235,9 @@ void transpose32( unsigned A[32] )
...
@@ -235,9 +235,9 @@ void transpose32( unsigned A[32] )
***********************************************************************/
***********************************************************************/
void
transpose64
(
word
A
[
64
]
)
void
transpose64
(
word
A
[
64
]
)
{
{
int
j
,
k
;
int
j
,
k
;
word
t
,
m
=
0x00000000FFFFFFFF
;
word
t
,
m
=
0x00000000FFFFFFFF
;
for
(
j
=
32
;
j
!=
0
;
j
=
j
>>
1
,
m
=
m
^
(
m
<<
j
)
)
for
(
j
=
32
;
j
!=
0
;
j
=
j
>>
1
,
m
=
m
^
(
m
<<
j
)
)
{
{
for
(
k
=
0
;
k
<
64
;
k
=
(
k
+
j
+
1
)
&
~
j
)
for
(
k
=
0
;
k
<
64
;
k
=
(
k
+
j
+
1
)
&
~
j
)
{
{
...
@@ -246,14 +246,14 @@ void transpose64( word A[64] )
...
@@ -246,14 +246,14 @@ void transpose64( word A[64] )
A
[
k
+
j
]
=
A
[
k
+
j
]
^
(
t
<<
j
);
A
[
k
+
j
]
=
A
[
k
+
j
]
^
(
t
<<
j
);
}
}
}
}
}
}
/**Function*************************************************************
/**Function*************************************************************
Synopsis [Transposing 64-bit matrix.]
Synopsis [Transposing 64-bit matrix.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -261,10 +261,10 @@ void transpose64( word A[64] )
...
@@ -261,10 +261,10 @@ void transpose64( word A[64] )
***********************************************************************/
***********************************************************************/
void
transpose64Simple
(
word
A
[
64
],
word
B
[
64
]
)
void
transpose64Simple
(
word
A
[
64
],
word
B
[
64
]
)
{
{
int
i
,
k
;
int
i
,
k
;
for
(
i
=
0
;
i
<
64
;
i
++
)
for
(
i
=
0
;
i
<
64
;
i
++
)
B
[
i
]
=
0
;
B
[
i
]
=
0
;
for
(
i
=
0
;
i
<
64
;
i
++
)
for
(
i
=
0
;
i
<
64
;
i
++
)
for
(
k
=
0
;
k
<
64
;
k
++
)
for
(
k
=
0
;
k
<
64
;
k
++
)
if
(
(
A
[
i
]
>>
k
)
&
1
)
if
(
(
A
[
i
]
>>
k
)
&
1
)
B
[
k
]
|=
((
word
)
1
<<
(
63
-
i
));
B
[
k
]
|=
((
word
)
1
<<
(
63
-
i
));
...
@@ -292,7 +292,7 @@ void TransposeTest()
...
@@ -292,7 +292,7 @@ void TransposeTest()
for
(
i
=
0
;
i
<
64
;
i
++
)
for
(
i
=
0
;
i
<
64
;
i
++
)
M
[
i
]
=
i
?
(
word
)
0
:
~
(
word
)
0
;
M
[
i
]
=
i
?
(
word
)
0
:
~
(
word
)
0
;
// for ( i = 0; i < 64; i++ )
// for ( i = 0; i < 64; i++ )
// Extra_PrintBinary( stdout, (unsigned *)&M[i], 64 ),
printf(
"\n" );
// Extra_PrintBinary( stdout, (unsigned *)&M[i], 64 ),
Abc_Print( 1,
"\n" );
clk
=
clock
();
clk
=
clock
();
for
(
i
=
0
;
i
<
100001
;
i
++
)
for
(
i
=
0
;
i
<
100001
;
i
++
)
...
@@ -306,14 +306,14 @@ void TransposeTest()
...
@@ -306,14 +306,14 @@ void TransposeTest()
for
(
i
=
0
;
i
<
64
;
i
++
)
for
(
i
=
0
;
i
<
64
;
i
++
)
if
(
M
[
i
]
!=
N
[
i
]
)
if
(
M
[
i
]
!=
N
[
i
]
)
printf
(
"Mismatch
\n
"
);
Abc_Print
(
1
,
"Mismatch
\n
"
);
/*
/*
printf(
"\n" );
Abc_Print( 1,
"\n" );
for ( i = 0; i < 64; i++ )
for ( i = 0; i < 64; i++ )
Extra_PrintBinary( stdout, (unsigned *)&M[i], 64 ),
printf(
"\n" );
Extra_PrintBinary( stdout, (unsigned *)&M[i], 64 ),
Abc_Print( 1,
"\n" );
printf(
"\n" );
Abc_Print( 1,
"\n" );
for ( i = 0; i < 64; i++ )
for ( i = 0; i < 64; i++ )
Extra_PrintBinary( stdout, (unsigned *)&N[i], 64 ),
printf(
"\n" );
Extra_PrintBinary( stdout, (unsigned *)&N[i], 64 ),
Abc_Print( 1,
"\n" );
*/
*/
}
}
...
@@ -357,15 +357,15 @@ void Ssw_RarTranspose( Ssw_RarMan_t * p )
...
@@ -357,15 +357,15 @@ void Ssw_RarTranspose( Ssw_RarMan_t * p )
Saig_ManForEachLi( p->pAig, pObj, i )
Saig_ManForEachLi( p->pAig, pObj, i )
{
{
word * pBitData = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
word * pBitData = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
Extra_PrintBinary( stdout, (unsigned *)pBitData, 64*p->nWords );
printf(
"\n" );
Extra_PrintBinary( stdout, (unsigned *)pBitData, 64*p->nWords );
Abc_Print( 1,
"\n" );
}
}
printf(
"\n" );
Abc_Print( 1,
"\n" );
for ( i = 0; i < p->nWords*64; i++ )
for ( i = 0; i < p->nWords*64; i++ )
{
{
word * pBitData = Ssw_RarPatSim( p, i );
word * pBitData = Ssw_RarPatSim( p, i );
Extra_PrintBinary( stdout, (unsigned *)pBitData, Aig_ManRegNum(p->pAig) );
printf(
"\n" );
Extra_PrintBinary( stdout, (unsigned *)pBitData, Aig_ManRegNum(p->pAig) );
Abc_Print( 1,
"\n" );
}
}
printf(
"\n" );
Abc_Print( 1,
"\n" );
*/
*/
}
}
...
@@ -423,7 +423,7 @@ void Ssw_RarManInitialize( Ssw_RarMan_t * p, Vec_Int_t * vInit )
...
@@ -423,7 +423,7 @@ void Ssw_RarManInitialize( Ssw_RarMan_t * p, Vec_Int_t * vInit )
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -446,7 +446,7 @@ int Ssw_RarManObjIsConst( void * pMan, Aig_Obj_t * pObj )
...
@@ -446,7 +446,7 @@ int Ssw_RarManObjIsConst( void * pMan, Aig_Obj_t * pObj )
Synopsis [Returns 1 if simulation infos are equal.]
Synopsis [Returns 1 if simulation infos are equal.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -470,7 +470,7 @@ int Ssw_RarManObjsAreEqual( void * pMan, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
...
@@ -470,7 +470,7 @@ int Ssw_RarManObjsAreEqual( void * pMan, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
Synopsis [Computes hash value of the node using its simulation info.]
Synopsis [Computes hash value of the node using its simulation info.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -479,19 +479,19 @@ int Ssw_RarManObjsAreEqual( void * pMan, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
...
@@ -479,19 +479,19 @@ int Ssw_RarManObjsAreEqual( void * pMan, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
unsigned
Ssw_RarManObjHashWord
(
void
*
pMan
,
Aig_Obj_t
*
pObj
)
unsigned
Ssw_RarManObjHashWord
(
void
*
pMan
,
Aig_Obj_t
*
pObj
)
{
{
Ssw_RarMan_t
*
p
=
(
Ssw_RarMan_t
*
)
pMan
;
Ssw_RarMan_t
*
p
=
(
Ssw_RarMan_t
*
)
pMan
;
static
int
s_SPrimes
[
128
]
=
{
static
int
s_SPrimes
[
128
]
=
{
1009
,
1049
,
1093
,
1151
,
1201
,
1249
,
1297
,
1361
,
1427
,
1459
,
1009
,
1049
,
1093
,
1151
,
1201
,
1249
,
1297
,
1361
,
1427
,
1459
,
1499
,
1559
,
1607
,
1657
,
1709
,
1759
,
1823
,
1877
,
1933
,
1997
,
1499
,
1559
,
1607
,
1657
,
1709
,
1759
,
1823
,
1877
,
1933
,
1997
,
2039
,
2089
,
2141
,
2213
,
2269
,
2311
,
2371
,
2411
,
2467
,
2543
,
2039
,
2089
,
2141
,
2213
,
2269
,
2311
,
2371
,
2411
,
2467
,
2543
,
2609
,
2663
,
2699
,
2741
,
2797
,
2851
,
2909
,
2969
,
3037
,
3089
,
2609
,
2663
,
2699
,
2741
,
2797
,
2851
,
2909
,
2969
,
3037
,
3089
,
3169
,
3221
,
3299
,
3331
,
3389
,
3461
,
3517
,
3557
,
3613
,
3671
,
3169
,
3221
,
3299
,
3331
,
3389
,
3461
,
3517
,
3557
,
3613
,
3671
,
3719
,
3779
,
3847
,
3907
,
3943
,
4013
,
4073
,
4129
,
4201
,
4243
,
3719
,
3779
,
3847
,
3907
,
3943
,
4013
,
4073
,
4129
,
4201
,
4243
,
4289
,
4363
,
4441
,
4493
,
4549
,
4621
,
4663
,
4729
,
4793
,
4871
,
4289
,
4363
,
4441
,
4493
,
4549
,
4621
,
4663
,
4729
,
4793
,
4871
,
4933
,
4973
,
5021
,
5087
,
5153
,
5227
,
5281
,
5351
,
5417
,
5471
,
4933
,
4973
,
5021
,
5087
,
5153
,
5227
,
5281
,
5351
,
5417
,
5471
,
5519
,
5573
,
5651
,
5693
,
5749
,
5821
,
5861
,
5923
,
6011
,
6073
,
5519
,
5573
,
5651
,
5693
,
5749
,
5821
,
5861
,
5923
,
6011
,
6073
,
6131
,
6199
,
6257
,
6301
,
6353
,
6397
,
6481
,
6563
,
6619
,
6689
,
6131
,
6199
,
6257
,
6301
,
6353
,
6397
,
6481
,
6563
,
6619
,
6689
,
6737
,
6803
,
6863
,
6917
,
6977
,
7027
,
7109
,
7187
,
7237
,
7309
,
6737
,
6803
,
6863
,
6917
,
6977
,
7027
,
7109
,
7187
,
7237
,
7309
,
7393
,
7477
,
7523
,
7561
,
7607
,
7681
,
7727
,
7817
,
7877
,
7933
,
7393
,
7477
,
7523
,
7561
,
7607
,
7681
,
7727
,
7817
,
7877
,
7933
,
8011
,
8039
,
8059
,
8081
,
8093
,
8111
,
8123
,
8147
8011
,
8039
,
8059
,
8081
,
8093
,
8111
,
8123
,
8147
};
};
unsigned
*
pSims
;
unsigned
*
pSims
;
...
@@ -509,7 +509,7 @@ unsigned Ssw_RarManObjHashWord( void * pMan, Aig_Obj_t * pObj )
...
@@ -509,7 +509,7 @@ unsigned Ssw_RarManObjHashWord( void * pMan, Aig_Obj_t * pObj )
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -537,7 +537,7 @@ int Ssw_RarManObjWhichOne( Ssw_RarMan_t * p, Aig_Obj_t * pObj )
...
@@ -537,7 +537,7 @@ int Ssw_RarManObjWhichOne( Ssw_RarMan_t * p, Aig_Obj_t * pObj )
Synopsis [Check if any of the POs becomes non-constant.]
Synopsis [Check if any of the POs becomes non-constant.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -568,7 +568,7 @@ int Ssw_RarManCheckNonConstOutputs( Ssw_RarMan_t * p )
...
@@ -568,7 +568,7 @@ int Ssw_RarManCheckNonConstOutputs( Ssw_RarMan_t * p )
Synopsis [Performs one round of simulation.]
Synopsis [Performs one round of simulation.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -580,7 +580,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
...
@@ -580,7 +580,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
word
*
pSim
,
*
pSim0
,
*
pSim1
;
word
*
pSim
,
*
pSim0
,
*
pSim1
;
word
Flip
,
Flip0
,
Flip1
;
word
Flip
,
Flip0
,
Flip1
;
int
w
,
i
;
int
w
,
i
;
// initialize
// initialize
Ssw_RarManInitialize
(
p
,
vInit
);
Ssw_RarManInitialize
(
p
,
vInit
);
Vec_PtrClear
(
p
->
vUpdConst
);
Vec_PtrClear
(
p
->
vUpdConst
);
Vec_PtrClear
(
p
->
vUpdClass
);
Vec_PtrClear
(
p
->
vUpdClass
);
...
@@ -603,7 +603,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
...
@@ -603,7 +603,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
Aig_ObjSetTravIdCurrent
(
p
->
pAig
,
pRepr
);
Aig_ObjSetTravIdCurrent
(
p
->
pAig
,
pRepr
);
}
}
}
}
// simulate
// simulate
Aig_ManForEachNode
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachNode
(
p
->
pAig
,
pObj
,
i
)
{
{
pSim
=
Ssw_RarObjSim
(
p
,
Aig_ObjId
(
pObj
)
);
pSim
=
Ssw_RarObjSim
(
p
,
Aig_ObjId
(
pObj
)
);
...
@@ -657,7 +657,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
...
@@ -657,7 +657,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
Ssw_ClassesRefineConst1Group
(
p
->
ppClasses
,
p
->
vUpdConst
,
1
);
Ssw_ClassesRefineConst1Group
(
p
->
ppClasses
,
p
->
vUpdConst
,
1
);
Ssw_ClassesRefineGroup
(
p
->
ppClasses
,
p
->
vUpdClass
,
1
);
Ssw_ClassesRefineGroup
(
p
->
ppClasses
,
p
->
vUpdClass
,
1
);
}
}
}
}
}
}
...
@@ -666,7 +666,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
...
@@ -666,7 +666,7 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int f
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -700,7 +700,7 @@ static Ssw_RarMan_t * Ssw_RarManStart( Aig_Man_t * pAig, int nWords, int nFrames
...
@@ -700,7 +700,7 @@ static Ssw_RarMan_t * Ssw_RarManStart( Aig_Man_t * pAig, int nWords, int nFrames
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -725,7 +725,7 @@ static void Ssw_RarManStop( Ssw_RarMan_t * p )
...
@@ -725,7 +725,7 @@ static void Ssw_RarManStop( Ssw_RarMan_t * p )
Synopsis [Select best patterns.]
Synopsis [Select best patterns.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -762,7 +762,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
...
@@ -762,7 +762,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
p
->
pPatCosts
[
k
]
+=
1
.
0
/
(
Value
*
Value
);
p
->
pPatCosts
[
k
]
+=
1
.
0
/
(
Value
*
Value
);
}
}
// print the result
// print the result
//
printf(
"%3d : %9.6f\n", k, p->pPatCosts[k] );
//
Abc_Print( 1,
"%3d : %9.6f\n", k, p->pPatCosts[k] );
}
}
// choose as many as there are words
// choose as many as there are words
...
@@ -785,7 +785,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
...
@@ -785,7 +785,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
pPattern
=
(
unsigned
*
)
Ssw_RarPatSim
(
p
,
iPatBest
);
pPattern
=
(
unsigned
*
)
Ssw_RarPatSim
(
p
,
iPatBest
);
for
(
k
=
0
;
k
<
Aig_ManRegNum
(
p
->
pAig
);
k
++
)
for
(
k
=
0
;
k
<
Aig_ManRegNum
(
p
->
pAig
);
k
++
)
Vec_IntPush
(
vInits
,
Abc_InfoHasBit
(
pPattern
,
k
)
);
Vec_IntPush
(
vInits
,
Abc_InfoHasBit
(
pPattern
,
k
)
);
//
printf(
"Best pattern %5d\n", iPatBest );
//
Abc_Print( 1,
"Best pattern %5d\n", iPatBest );
Vec_IntPush
(
p
->
vPatBests
,
iPatBest
);
Vec_IntPush
(
p
->
vPatBests
,
iPatBest
);
}
}
assert
(
Vec_IntSize
(
vInits
)
==
Aig_ManRegNum
(
p
->
pAig
)
*
p
->
nWords
);
assert
(
Vec_IntSize
(
vInits
)
==
Aig_ManRegNum
(
p
->
pAig
)
*
p
->
nWords
);
...
@@ -804,7 +804,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
...
@@ -804,7 +804,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
***********************************************************************/
***********************************************************************/
static
Vec_Int_t
*
Ssw_RarFindStartingState
(
Aig_Man_t
*
pAig
,
Abc_Cex_t
*
pCex
)
static
Vec_Int_t
*
Ssw_RarFindStartingState
(
Aig_Man_t
*
pAig
,
Abc_Cex_t
*
pCex
)
{
{
Vec_Int_t
*
vInit
;
Vec_Int_t
*
vInit
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
int
f
,
i
,
iBit
;
int
f
,
i
,
iBit
;
...
@@ -833,15 +833,15 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
...
@@ -833,15 +833,15 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
// check that the output failed as expected -- cannot check because it is not an SRM!
// check that the output failed as expected -- cannot check because it is not an SRM!
// pObj = Aig_ManCo( pAig, pCex->iPo );
// pObj = Aig_ManCo( pAig, pCex->iPo );
// if ( pObj->fMarkB != 1 )
// if ( pObj->fMarkB != 1 )
//
printf(
"The counter-example does not refine the output.\n" );
//
Abc_Print( 1,
"The counter-example does not refine the output.\n" );
// record the new pattern
// record the new pattern
vInit
=
Vec_IntAlloc
(
Saig_ManRegNum
(
pAig
)
);
vInit
=
Vec_IntAlloc
(
Saig_ManRegNum
(
pAig
)
);
Saig_ManForEachLo
(
pAig
,
pObj
,
i
)
Saig_ManForEachLo
(
pAig
,
pObj
,
i
)
{
{
//
printf(
"%d", pObj->fMarkB );
//
Abc_Print( 1,
"%d", pObj->fMarkB );
Vec_IntPush
(
vInit
,
pObj
->
fMarkB
);
Vec_IntPush
(
vInit
,
pObj
->
fMarkB
);
}
}
//
printf(
"\n" );
//
Abc_Print( 1,
"\n" );
Aig_ManCleanMarkB
(
pAig
);
Aig_ManCleanMarkB
(
pAig
);
return
vInit
;
return
vInit
;
}
}
...
@@ -872,7 +872,7 @@ int Ssw_RarCheckTrivial( Aig_Man_t * pAig, int fVerbose )
...
@@ -872,7 +872,7 @@ int Ssw_RarCheckTrivial( Aig_Man_t * pAig, int fVerbose )
pAig
->
pSeqModel
=
Abc_CexAlloc
(
Aig_ManRegNum
(
pAig
),
Saig_ManPiNum
(
pAig
),
1
);
pAig
->
pSeqModel
=
Abc_CexAlloc
(
Aig_ManRegNum
(
pAig
),
Saig_ManPiNum
(
pAig
),
1
);
pAig
->
pSeqModel
->
iPo
=
i
;
pAig
->
pSeqModel
->
iPo
=
i
;
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Output %d is trivally SAT in frame 0.
\n
"
,
i
);
Abc_Print
(
1
,
"Output %d is trivally SAT in frame 0.
\n
"
,
i
);
return
1
;
return
1
;
}
}
}
}
...
@@ -911,7 +911,7 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
...
@@ -911,7 +911,7 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
if
(
fMiter
&&
Ssw_RarCheckTrivial
(
pAig
,
fVerbose
)
)
if
(
fMiter
&&
Ssw_RarCheckTrivial
(
pAig
,
fVerbose
)
)
return
0
;
return
0
;
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Rarity simulation with %d words, %d frames, %d rounds, %d seed, and %d sec timeout.
\n
"
,
Abc_Print
(
1
,
"Rarity simulation with %d words, %d frames, %d rounds, %d seed, and %d sec timeout.
\n
"
,
nWords
,
nFrames
,
nRounds
,
nRandSeed
,
TimeOut
);
nWords
,
nFrames
,
nRounds
,
nRandSeed
,
TimeOut
);
// reset random numbers
// reset random numbers
Ssw_RarManPrepareRandom
(
nSavedSeed
);
Ssw_RarManPrepareRandom
(
nSavedSeed
);
...
@@ -929,7 +929,7 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
...
@@ -929,7 +929,7 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
Aig_Man_t
*
pNewAig
=
Saig_ManDupWithPhase
(
pAig
,
p
->
vInits
);
Aig_Man_t
*
pNewAig
=
Saig_ManDupWithPhase
(
pAig
,
p
->
vInits
);
Saig_BmcPerform
(
pNewAig
,
0
,
100
,
2000
,
3
,
0
,
0
,
1
/*fVerbose*/
,
0
,
&
iFrameFail
,
0
);
Saig_BmcPerform
(
pNewAig
,
0
,
100
,
2000
,
3
,
0
,
0
,
1
/*fVerbose*/
,
0
,
&
iFrameFail
,
0
);
// if ( pNewAig->pSeqModel != NULL )
// if ( pNewAig->pSeqModel != NULL )
//
printf(
"BMC has found a counter-example in frame %d.\n", iFrameFail );
//
Abc_Print( 1,
"BMC has found a counter-example in frame %d.\n", iFrameFail );
Aig_ManStop
(
pNewAig
);
Aig_ManStop
(
pNewAig
);
}
}
// simulate
// simulate
...
@@ -938,12 +938,12 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
...
@@ -938,12 +938,12 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
Ssw_RarManSimulate
(
p
,
f
?
NULL
:
p
->
vInits
,
0
,
0
);
Ssw_RarManSimulate
(
p
,
f
?
NULL
:
p
->
vInits
,
0
,
0
);
if
(
fMiter
&&
Ssw_RarManCheckNonConstOutputs
(
p
)
)
if
(
fMiter
&&
Ssw_RarManCheckNonConstOutputs
(
p
)
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
//
printf(
"Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
//
Abc_Print( 1,
"Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
Ssw_RarManPrepareRandom
(
nSavedSeed
);
Ssw_RarManPrepareRandom
(
nSavedSeed
);
ABC_FREE
(
pAig
->
pSeqModel
);
ABC_FREE
(
pAig
->
pSeqModel
);
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Simulated %d frames for %d rounds with %d restarts.
\n
"
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_Print
(
1
,
"Simulated %d frames for %d rounds with %d restarts.
\n
"
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
pAig
->
pSeqModel
=
Ssw_RarDeriveCex
(
p
,
r
*
p
->
nFrames
+
f
,
p
->
iFailPo
,
p
->
iFailPat
,
fVerbose
);
pAig
->
pSeqModel
=
Ssw_RarDeriveCex
(
p
,
r
*
p
->
nFrames
+
f
,
p
->
iFailPo
,
p
->
iFailPat
,
fVerbose
);
// print final report
// print final report
Abc_Print
(
1
,
"Output %d of miter
\"
%s
\"
was asserted in frame %d. "
,
pAig
->
pSeqModel
->
iPo
,
pAig
->
pName
,
pAig
->
pSeqModel
->
iFrame
);
Abc_Print
(
1
,
"Output %d of miter
\"
%s
\"
was asserted in frame %d. "
,
pAig
->
pSeqModel
->
iPo
,
pAig
->
pName
,
pAig
->
pSeqModel
->
iFrame
);
...
@@ -954,9 +954,9 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
...
@@ -954,9 +954,9 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
// check timeout
// check timeout
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Simulated %d frames for %d rounds with %d restarts. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_Print
(
1
,
"Simulated %d frames for %d rounds with %d restarts. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
printf
(
"Reached timeout (%d sec).
\n
"
,
TimeOut
);
Abc_Print
(
1
,
"Reached timeout (%d sec).
\n
"
,
TimeOut
);
goto
finish
;
goto
finish
;
}
}
}
}
...
@@ -977,16 +977,16 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
...
@@ -977,16 +977,16 @@ int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, in
// printout
// printout
if
(
fVerbose
)
if
(
fVerbose
)
{
{
//
printf(
"Round %3d: ", r );
//
Abc_Print( 1,
"Round %3d: ", r );
// Abc_PrintTime( 1, "Time", clock() - clk );
// Abc_PrintTime( 1, "Time", clock() - clk );
printf
(
"."
);
Abc_Print
(
1
,
"."
);
}
}
}
}
finish:
finish:
if
(
r
==
nRounds
&&
f
==
nFrames
)
if
(
r
==
nRounds
&&
f
==
nFrames
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Simulation of %d frames for %d rounds with %d restarts did not assert POs. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_Print
(
1
,
"Simulation of %d frames for %d rounds with %d restarts did not assert POs. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
}
}
// cleanup
// cleanup
...
@@ -1048,7 +1048,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1048,7 +1048,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
if
(
fMiter
&&
Ssw_RarCheckTrivial
(
pAig
,
1
)
)
if
(
fMiter
&&
Ssw_RarCheckTrivial
(
pAig
,
1
)
)
return
0
;
return
0
;
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Rarity equiv filtering with %d words, %d frames, %d rounds, %d seed, and %d sec timeout.
\n
"
,
Abc_Print
(
1
,
"Rarity equiv filtering with %d words, %d frames, %d rounds, %d seed, and %d sec timeout.
\n
"
,
nWords
,
nFrames
,
nRounds
,
nRandSeed
,
TimeOut
);
nWords
,
nFrames
,
nRounds
,
nRandSeed
,
TimeOut
);
// reset random numbers
// reset random numbers
Ssw_RarManPrepareRandom
(
nSavedSeed
);
Ssw_RarManPrepareRandom
(
nSavedSeed
);
...
@@ -1060,7 +1060,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1060,7 +1060,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
if
(
pCex
)
if
(
pCex
)
{
{
p
->
vInits
=
Ssw_RarFindStartingState
(
pAig
,
pCex
);
p
->
vInits
=
Ssw_RarFindStartingState
(
pAig
,
pCex
);
printf
(
"Beginning simulation from the state derived using the counter-example.
\n
"
);
Abc_Print
(
1
,
"Beginning simulation from the state derived using the counter-example.
\n
"
);
}
}
else
else
p
->
vInits
=
Vec_IntStart
(
Aig_ManRegNum
(
pAig
)
);
p
->
vInits
=
Vec_IntStart
(
Aig_ManRegNum
(
pAig
)
);
...
@@ -1079,7 +1079,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1079,7 +1079,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
// print the stats
// print the stats
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Initial : "
);
Abc_Print
(
1
,
"Initial : "
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
}
}
// refine classes using BMC
// refine classes using BMC
...
@@ -1088,7 +1088,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1088,7 +1088,7 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
// start filtering equivalence classes
// start filtering equivalence classes
if
(
Ssw_ClassesCand1Num
(
p
->
ppClasses
)
==
0
&&
Ssw_ClassesClassNum
(
p
->
ppClasses
)
==
0
)
if
(
Ssw_ClassesCand1Num
(
p
->
ppClasses
)
==
0
&&
Ssw_ClassesClassNum
(
p
->
ppClasses
)
==
0
)
{
{
printf
(
"All equivalences are refined away.
\n
"
);
Abc_Print
(
1
,
"All equivalences are refined away.
\n
"
);
break
;
break
;
}
}
// simulate
// simulate
...
@@ -1097,11 +1097,11 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1097,11 +1097,11 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
Ssw_RarManSimulate
(
p
,
f
?
NULL
:
p
->
vInits
,
1
,
!
r
&&
!
f
);
Ssw_RarManSimulate
(
p
,
f
?
NULL
:
p
->
vInits
,
1
,
!
r
&&
!
f
);
if
(
fMiter
&&
Ssw_RarManCheckNonConstOutputs
(
p
)
)
if
(
fMiter
&&
Ssw_RarManCheckNonConstOutputs
(
p
)
)
{
{
if
(
!
fVerbose
)
if
(
!
fVerbose
)
printf
(
"%s"
,
Abc_FrameIsBatchMode
()
?
"
\n
"
:
"
\r
"
);
Abc_Print
(
1
,
"%s"
,
Abc_FrameIsBatchMode
()
?
"
\n
"
:
"
\r
"
);
//
printf(
"Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
//
Abc_Print( 1,
"Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Simulated %d frames for %d rounds with %d restarts.
\n
"
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_Print
(
1
,
"Simulated %d frames for %d rounds with %d restarts.
\n
"
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Ssw_RarManPrepareRandom
(
nSavedSeed
);
Ssw_RarManPrepareRandom
(
nSavedSeed
);
Abc_CexFree
(
pAig
->
pSeqModel
);
Abc_CexFree
(
pAig
->
pSeqModel
);
pAig
->
pSeqModel
=
Ssw_RarDeriveCex
(
p
,
r
*
p
->
nFrames
+
f
,
p
->
iFailPo
,
p
->
iFailPat
,
1
);
pAig
->
pSeqModel
=
Ssw_RarDeriveCex
(
p
,
r
*
p
->
nFrames
+
f
,
p
->
iFailPo
,
p
->
iFailPat
,
1
);
...
@@ -1114,9 +1114,9 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1114,9 +1114,9 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
// check timeout
// check timeout
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Simulated %d frames for %d rounds with %d restarts. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_Print
(
1
,
"Simulated %d frames for %d rounds with %d restarts. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
printf
(
"Reached timeout (%d sec).
\n
"
,
TimeOut
);
Abc_Print
(
1
,
"Reached timeout (%d sec).
\n
"
,
TimeOut
);
goto
finish
;
goto
finish
;
}
}
}
}
...
@@ -1137,21 +1137,21 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
...
@@ -1137,21 +1137,21 @@ int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize
// printout
// printout
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Round %3d: "
,
r
);
Abc_Print
(
1
,
"Round %3d: "
,
r
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
}
}
else
else
{
{
printf
(
"."
);
Abc_Print
(
1
,
"."
);
}
}
}
}
finish:
finish:
// report
// report
if
(
r
==
nRounds
&&
f
==
nFrames
)
if
(
r
==
nRounds
&&
f
==
nFrames
)
{
{
if
(
!
fVerbose
)
if
(
!
fVerbose
)
printf
(
"%s"
,
Abc_FrameIsBatchMode
()
?
"
\n
"
:
"
\r
"
);
Abc_Print
(
1
,
"%s"
,
Abc_FrameIsBatchMode
()
?
"
\n
"
:
"
\r
"
);
printf
(
"Simulation of %d frames for %d rounds with %d restarts did not assert POs. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_Print
(
1
,
"Simulation of %d frames for %d rounds with %d restarts did not assert POs. "
,
nFrames
,
nNumRestart
*
nRestart
+
r
,
nNumRestart
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
}
}
// cleanup
// cleanup
...
@@ -1171,7 +1171,7 @@ finish:
...
@@ -1171,7 +1171,7 @@ finish:
***********************************************************************/
***********************************************************************/
int
Ssw_RarSignalFilterGia
(
Gia_Man_t
*
p
,
int
nFrames
,
int
nWords
,
int
nBinSize
,
int
nRounds
,
int
nRestart
,
int
nRandSeed
,
int
TimeOut
,
int
fMiter
,
Abc_Cex_t
*
pCex
,
int
fLatchOnly
,
int
fVerbose
)
int
Ssw_RarSignalFilterGia
(
Gia_Man_t
*
p
,
int
nFrames
,
int
nWords
,
int
nBinSize
,
int
nRounds
,
int
nRestart
,
int
nRandSeed
,
int
TimeOut
,
int
fMiter
,
Abc_Cex_t
*
pCex
,
int
fLatchOnly
,
int
fVerbose
)
{
{
Aig_Man_t
*
pAig
;
Aig_Man_t
*
pAig
;
int
RetValue
;
int
RetValue
;
pAig
=
Gia_ManToAigSimple
(
p
);
pAig
=
Gia_ManToAigSimple
(
p
);
...
@@ -1197,4 +1197,3 @@ int Ssw_RarSignalFilterGia( Gia_Man_t * p, int nFrames, int nWords, int nBinSize
...
@@ -1197,4 +1197,3 @@ int Ssw_RarSignalFilterGia( Gia_Man_t * p, int nFrames, int nWords, int nBinSize
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswRarity2.c
View file @
c3168ba6
...
@@ -50,19 +50,19 @@ struct Ssw_RarMan_t_
...
@@ -50,19 +50,19 @@ struct Ssw_RarMan_t_
};
};
static
inline
int
Ssw_RarGetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
static
inline
int
Ssw_RarGetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
{
{
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
return
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
];
return
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
];
}
}
static
inline
void
Ssw_RarSetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
,
int
Value
)
static
inline
void
Ssw_RarSetBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
,
int
Value
)
{
{
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
]
=
Value
;
p
->
pRarity
[
iBin
*
(
1
<<
p
->
nBinSize
)
+
iPat
]
=
Value
;
}
}
static
inline
void
Ssw_RarAddToBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
static
inline
void
Ssw_RarAddToBinPat
(
Ssw_RarMan_t
*
p
,
int
iBin
,
int
iPat
)
{
{
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iBin
>=
0
&&
iBin
<
Aig_ManRegNum
(
p
->
pAig
)
/
p
->
nBinSize
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
assert
(
iPat
>=
0
&&
iPat
<
(
1
<<
p
->
nBinSize
)
);
...
@@ -78,7 +78,7 @@ static inline void Ssw_RarAddToBinPat( Ssw_RarMan_t * p, int iBin, int iPat )
...
@@ -78,7 +78,7 @@ static inline void Ssw_RarAddToBinPat( Ssw_RarMan_t * p, int iBin, int iPat )
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -109,7 +109,7 @@ static Ssw_RarMan_t * Ssw_RarManStart( Aig_Man_t * pAig, int nWords, int nFrames
...
@@ -109,7 +109,7 @@ static Ssw_RarMan_t * Ssw_RarManStart( Aig_Man_t * pAig, int nWords, int nFrames
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -148,7 +148,7 @@ static void Ssw_RarUpdateCounters( Ssw_RarMan_t * p )
...
@@ -148,7 +148,7 @@ static void Ssw_RarUpdateCounters( Ssw_RarMan_t * p )
Saig_ManForEachLi( p->pAig, pObj, i )
Saig_ManForEachLi( p->pAig, pObj, i )
{
{
pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
Extra_PrintBinary( stdout, pData, 32 );
printf(
"\n" );
Extra_PrintBinary( stdout, pData, 32 );
Abc_Print( 1,
"\n" );
}
}
*/
*/
for
(
k
=
0
;
k
<
p
->
nWords
*
32
;
k
++
)
for
(
k
=
0
;
k
<
p
->
nWords
*
32
;
k
++
)
...
@@ -168,8 +168,8 @@ static void Ssw_RarUpdateCounters( Ssw_RarMan_t * p )
...
@@ -168,8 +168,8 @@ static void Ssw_RarUpdateCounters( Ssw_RarMan_t * p )
for ( i = 0; i < p->nGroups; i++ )
for ( i = 0; i < p->nGroups; i++ )
{
{
for ( k = 0; k < (1 << p->nBinSize); k++ )
for ( k = 0; k < (1 << p->nBinSize); k++ )
printf(
"%d ", Ssw_RarGetBinPat(p, i, k) );
Abc_Print( 1,
"%d ", Ssw_RarGetBinPat(p, i, k) );
printf(
"\n" );
Abc_Print( 1,
"\n" );
}
}
*/
*/
}
}
...
@@ -212,7 +212,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
...
@@ -212,7 +212,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
p
->
pPatCosts
[
k
]
+=
1
.
0
/
(
Value
*
Value
);
p
->
pPatCosts
[
k
]
+=
1
.
0
/
(
Value
*
Value
);
}
}
// print the result
// print the result
//
printf(
"%3d : %9.6f\n", k, p->pPatCosts[k] );
//
Abc_Print( 1,
"%3d : %9.6f\n", k, p->pPatCosts[k] );
}
}
// choose as many as there are words
// choose as many as there are words
...
@@ -237,7 +237,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
...
@@ -237,7 +237,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
pData
=
(
unsigned
*
)
Vec_PtrEntry
(
p
->
vSimInfo
,
Aig_ObjId
(
pObj
)
)
+
p
->
nWords
*
(
p
->
nFrames
-
1
);
pData
=
(
unsigned
*
)
Vec_PtrEntry
(
p
->
vSimInfo
,
Aig_ObjId
(
pObj
)
)
+
p
->
nWords
*
(
p
->
nFrames
-
1
);
Vec_IntPush
(
vInits
,
Abc_InfoHasBit
(
pData
,
iPatBest
)
);
Vec_IntPush
(
vInits
,
Abc_InfoHasBit
(
pData
,
iPatBest
)
);
}
}
//
printf(
"Best pattern %5d\n", iPatBest );
//
Abc_Print( 1,
"Best pattern %5d\n", iPatBest );
}
}
assert
(
Vec_IntSize
(
vInits
)
==
Aig_ManRegNum
(
p
->
pAig
)
*
p
->
nWords
);
assert
(
Vec_IntSize
(
vInits
)
==
Aig_ManRegNum
(
p
->
pAig
)
*
p
->
nWords
);
}
}
...
@@ -255,7 +255,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
...
@@ -255,7 +255,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
***********************************************************************/
***********************************************************************/
static
Vec_Int_t
*
Ssw_RarFindStartingState
(
Aig_Man_t
*
pAig
,
Abc_Cex_t
*
pCex
)
static
Vec_Int_t
*
Ssw_RarFindStartingState
(
Aig_Man_t
*
pAig
,
Abc_Cex_t
*
pCex
)
{
{
Vec_Int_t
*
vInit
;
Vec_Int_t
*
vInit
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
Aig_Obj_t
*
pObj
,
*
pObjLi
;
int
f
,
i
,
iBit
;
int
f
,
i
,
iBit
;
...
@@ -284,7 +284,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
...
@@ -284,7 +284,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
// check that the output failed as expected -- cannot check because it is not an SRM!
// check that the output failed as expected -- cannot check because it is not an SRM!
// pObj = Aig_ManCo( pAig, pCex->iPo );
// pObj = Aig_ManCo( pAig, pCex->iPo );
// if ( pObj->fMarkB != 1 )
// if ( pObj->fMarkB != 1 )
//
printf(
"The counter-example does not refine the output.\n" );
//
Abc_Print( 1,
"The counter-example does not refine the output.\n" );
// record the new pattern
// record the new pattern
vInit
=
Vec_IntAlloc
(
Saig_ManRegNum
(
pAig
)
);
vInit
=
Vec_IntAlloc
(
Saig_ManRegNum
(
pAig
)
);
Saig_ManForEachLo
(
pAig
,
pObj
,
i
)
Saig_ManForEachLo
(
pAig
,
pObj
,
i
)
...
@@ -318,7 +318,7 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
...
@@ -318,7 +318,7 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
if
(
Aig_ManNodeNum
(
pAig
)
==
0
)
if
(
Aig_ManNodeNum
(
pAig
)
==
0
)
return
-
1
;
return
-
1
;
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Simulating %d words through %d frames with %d binsize, %d rounds, and %d sec timeout.
\n
"
,
Abc_Print
(
1
,
"Simulating %d words through %d frames with %d binsize, %d rounds, and %d sec timeout.
\n
"
,
nWords
,
nFrames
,
nBinSize
,
nRounds
,
TimeOut
);
nWords
,
nFrames
,
nBinSize
,
nRounds
,
TimeOut
);
// reset random numbers
// reset random numbers
Aig_ManRandom
(
1
);
Aig_ManRandom
(
1
);
...
@@ -336,8 +336,8 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
...
@@ -336,8 +336,8 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
Ssw_SmlSimulateOne
(
p
->
pSml
);
Ssw_SmlSimulateOne
(
p
->
pSml
);
if
(
fMiter
&&
Ssw_SmlCheckNonConstOutputs
(
p
->
pSml
)
)
if
(
fMiter
&&
Ssw_SmlCheckNonConstOutputs
(
p
->
pSml
)
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Simulation asserted a PO in frame f: %d <= f < %d.
\n
"
,
r
*
nFrames
,
(
r
+
1
)
*
nFrames
);
Abc_Print
(
1
,
"Simulation asserted a PO in frame f: %d <= f < %d.
\n
"
,
r
*
nFrames
,
(
r
+
1
)
*
nFrames
);
RetValue
=
0
;
RetValue
=
0
;
break
;
break
;
}
}
...
@@ -348,22 +348,22 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
...
@@ -348,22 +348,22 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
// printout
// printout
if
(
fVerbose
)
if
(
fVerbose
)
{
{
//
printf(
"Round %3d: ", r );
//
Abc_Print( 1,
"Round %3d: ", r );
// Abc_PrintTime( 1, "Time", clock() - clk );
// Abc_PrintTime( 1, "Time", clock() - clk );
printf
(
"."
);
Abc_Print
(
1
,
"."
);
}
}
// check timeout
// check timeout
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Reached timeout (%d seconds).
\n
"
,
TimeOut
);
Abc_Print
(
1
,
"Reached timeout (%d seconds).
\n
"
,
TimeOut
);
break
;
break
;
}
}
}
}
if
(
r
==
nRounds
)
if
(
r
==
nRounds
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Simulation did not assert POs in the first %d frames. "
,
nRounds
*
nFrames
);
Abc_Print
(
1
,
"Simulation did not assert POs in the first %d frames. "
,
nRounds
*
nFrames
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
}
}
// cleanup
// cleanup
...
@@ -397,7 +397,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
...
@@ -397,7 +397,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
if
(
Aig_ManNodeNum
(
pAig
)
==
0
)
if
(
Aig_ManNodeNum
(
pAig
)
==
0
)
return
-
1
;
return
-
1
;
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Filtering equivs with %d words through %d frames with %d binsize, %d rounds, and %d sec timeout.
\n
"
,
Abc_Print
(
1
,
"Filtering equivs with %d words through %d frames with %d binsize, %d rounds, and %d sec timeout.
\n
"
,
nWords
,
nFrames
,
nBinSize
,
nRounds
,
TimeOut
);
nWords
,
nFrames
,
nBinSize
,
nRounds
,
TimeOut
);
// reset random numbers
// reset random numbers
Aig_ManRandom
(
1
);
Aig_ManRandom
(
1
);
...
@@ -427,7 +427,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
...
@@ -427,7 +427,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
// print the stats
// print the stats
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Initial : "
);
Abc_Print
(
1
,
"Initial : "
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
}
}
// refine classes using BMC
// refine classes using BMC
...
@@ -436,15 +436,15 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
...
@@ -436,15 +436,15 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
// start filtering equivalence classes
// start filtering equivalence classes
if
(
Ssw_ClassesCand1Num
(
p
->
ppClasses
)
==
0
&&
Ssw_ClassesClassNum
(
p
->
ppClasses
)
==
0
)
if
(
Ssw_ClassesCand1Num
(
p
->
ppClasses
)
==
0
&&
Ssw_ClassesClassNum
(
p
->
ppClasses
)
==
0
)
{
{
printf
(
"All equivalences are refined away.
\n
"
);
Abc_Print
(
1
,
"All equivalences are refined away.
\n
"
);
break
;
break
;
}
}
// simulate
// simulate
Ssw_SmlSimulateOne
(
p
->
pSml
);
Ssw_SmlSimulateOne
(
p
->
pSml
);
if
(
fMiter
&&
Ssw_SmlCheckNonConstOutputs
(
p
->
pSml
)
)
if
(
fMiter
&&
Ssw_SmlCheckNonConstOutputs
(
p
->
pSml
)
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Simulation asserted a PO in frame f: %d <= f < %d.
\n
"
,
r
*
nFrames
,
(
r
+
1
)
*
nFrames
);
Abc_Print
(
1
,
"Simulation asserted a PO in frame f: %d <= f < %d.
\n
"
,
r
*
nFrames
,
(
r
+
1
)
*
nFrames
);
RetValue
=
0
;
RetValue
=
0
;
break
;
break
;
}
}
...
@@ -454,7 +454,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
...
@@ -454,7 +454,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
// printout
// printout
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"Round %3d: "
,
r
);
Abc_Print
(
1
,
"Round %3d: "
,
r
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
Ssw_ClassesPrint
(
p
->
ppClasses
,
0
);
}
}
// get initialization patterns
// get initialization patterns
...
@@ -464,14 +464,14 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
...
@@ -464,14 +464,14 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
// check timeout
// check timeout
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
if
(
TimeOut
&&
clock
()
>
nTimeToStop
)
{
{
if
(
fVerbose
)
printf
(
"
\n
"
);
if
(
fVerbose
)
Abc_Print
(
1
,
"
\n
"
);
printf
(
"Reached timeout (%d seconds).
\n
"
,
TimeOut
);
Abc_Print
(
1
,
"Reached timeout (%d seconds).
\n
"
,
TimeOut
);
break
;
break
;
}
}
}
}
if
(
r
==
nRounds
)
if
(
r
==
nRounds
)
{
{
printf
(
"Simulation did not assert POs in the first %d frames. "
,
nRounds
*
nFrames
);
Abc_Print
(
1
,
"Simulation did not assert POs in the first %d frames. "
,
nRounds
*
nFrames
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
Abc_PrintTime
(
1
,
"Time"
,
clock
()
-
clkTotal
);
}
}
// cleanup
// cleanup
...
@@ -491,7 +491,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
...
@@ -491,7 +491,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
***********************************************************************/
***********************************************************************/
int
Ssw_RarSignalFilterGia2
(
Gia_Man_t
*
p
,
int
nFrames
,
int
nWords
,
int
nBinSize
,
int
nRounds
,
int
TimeOut
,
Abc_Cex_t
*
pCex
,
int
fLatchOnly
,
int
fVerbose
)
int
Ssw_RarSignalFilterGia2
(
Gia_Man_t
*
p
,
int
nFrames
,
int
nWords
,
int
nBinSize
,
int
nRounds
,
int
TimeOut
,
Abc_Cex_t
*
pCex
,
int
fLatchOnly
,
int
fVerbose
)
{
{
Aig_Man_t
*
pAig
;
Aig_Man_t
*
pAig
;
int
RetValue
;
int
RetValue
;
pAig
=
Gia_ManToAigSimple
(
p
);
pAig
=
Gia_ManToAigSimple
(
p
);
...
@@ -516,4 +516,3 @@ int Ssw_RarSignalFilterGia2( Gia_Man_t * p, int nFrames, int nWords, int nBinSiz
...
@@ -516,4 +516,3 @@ int Ssw_RarSignalFilterGia2( Gia_Man_t * p, int nFrames, int nWords, int nBinSiz
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswSemi.c
View file @
c3168ba6
...
@@ -67,7 +67,7 @@ Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
...
@@ -67,7 +67,7 @@ Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
Aig_Obj_t
*
pObj
;
Aig_Obj_t
*
pObj
;
int
i
;
int
i
;
// create interpolation manager
// create interpolation manager
p
=
ABC_ALLOC
(
Ssw_Sem_t
,
1
);
p
=
ABC_ALLOC
(
Ssw_Sem_t
,
1
);
memset
(
p
,
0
,
sizeof
(
Ssw_Sem_t
)
);
memset
(
p
,
0
,
sizeof
(
Ssw_Sem_t
)
);
p
->
nConfMaxStart
=
nConfMax
;
p
->
nConfMaxStart
=
nConfMax
;
p
->
nConfMax
=
nConfMax
;
p
->
nConfMax
=
nConfMax
;
...
@@ -101,7 +101,7 @@ Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
...
@@ -101,7 +101,7 @@ Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -120,7 +120,7 @@ void Ssw_SemManStop( Ssw_Sem_t * p )
...
@@ -120,7 +120,7 @@ void Ssw_SemManStop( Ssw_Sem_t * p )
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -141,7 +141,7 @@ int Ssw_SemCheckTargets( Ssw_Sem_t * p )
...
@@ -141,7 +141,7 @@ int Ssw_SemCheckTargets( Ssw_Sem_t * p )
Synopsis []
Synopsis []
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -168,7 +168,7 @@ void Ssw_ManFilterBmcSavePattern( Ssw_Sem_t * p )
...
@@ -168,7 +168,7 @@ void Ssw_ManFilterBmcSavePattern( Ssw_Sem_t * p )
Synopsis [Performs fraiging for the internal nodes.]
Synopsis [Performs fraiging for the internal nodes.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -212,7 +212,7 @@ clk = clock();
...
@@ -212,7 +212,7 @@ clk = clock();
{
{
fFirst
=
1
;
fFirst
=
1
;
pBmc
->
nConfMax
*=
10
;
pBmc
->
nConfMax
*=
10
;
}
}
}
}
if
(
f
>
0
&&
p
->
pMSat
->
pSat
->
stats
.
conflicts
>=
pBmc
->
nConfMax
)
if
(
f
>
0
&&
p
->
pMSat
->
pSat
->
stats
.
conflicts
>=
pBmc
->
nConfMax
)
{
{
...
@@ -236,7 +236,7 @@ clk = clock();
...
@@ -236,7 +236,7 @@ clk = clock();
Ssw_ObjSetFrame
(
p
,
pObjLo
,
f
+
1
,
pObjNew
);
Ssw_ObjSetFrame
(
p
,
pObjLo
,
f
+
1
,
pObjNew
);
Ssw_CnfNodeAddToSolver
(
p
->
pMSat
,
Aig_Regular
(
pObjNew
)
);
Ssw_CnfNodeAddToSolver
(
p
->
pMSat
,
Aig_Regular
(
pObjNew
)
);
}
}
//
printf(
"Frame %2d : Conflicts = %6d. \n", f, p->pSat->stats.conflicts );
//
Abc_Print( 1,
"Frame %2d : Conflicts = %6d. \n", f, p->pSat->stats.conflicts );
}
}
if
(
fFirst
)
if
(
fFirst
)
pBmc
->
nConfMax
/=
10
;
pBmc
->
nConfMax
/=
10
;
...
@@ -272,10 +272,10 @@ int Ssw_FilterUsingSemi( Ssw_Man_t * pMan, int fCheckTargets, int nConfMax, int
...
@@ -272,10 +272,10 @@ int Ssw_FilterUsingSemi( Ssw_Man_t * pMan, int fCheckTargets, int nConfMax, int
}
}
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"AIG : C = %6d. Cl = %6d. Nodes = %6d. ConfMax = %6d. FramesMax = %6d.
\n
"
,
Abc_Print
(
1
,
"AIG : C = %6d. Cl = %6d. Nodes = %6d. ConfMax = %6d. FramesMax = %6d.
\n
"
,
Ssw_ClassesCand1Num
(
p
->
pMan
->
ppClasses
),
Ssw_ClassesClassNum
(
p
->
pMan
->
ppClasses
),
Ssw_ClassesCand1Num
(
p
->
pMan
->
ppClasses
),
Ssw_ClassesClassNum
(
p
->
pMan
->
ppClasses
),
Aig_ManNodeNum
(
p
->
pMan
->
pAig
),
p
->
nConfMax
,
p
->
nFramesSweep
);
Aig_ManNodeNum
(
p
->
pMan
->
pAig
),
p
->
nConfMax
,
p
->
nFramesSweep
);
}
}
RetValue
=
0
;
RetValue
=
0
;
for
(
Iter
=
0
;
Iter
<
p
->
nPatterns
;
Iter
++
)
for
(
Iter
=
0
;
Iter
<
p
->
nPatterns
;
Iter
++
)
{
{
...
@@ -284,16 +284,16 @@ clk = clock();
...
@@ -284,16 +284,16 @@ clk = clock();
Frames
=
Ssw_ManFilterBmc
(
p
,
Iter
,
fCheckTargets
);
Frames
=
Ssw_ManFilterBmc
(
p
,
Iter
,
fCheckTargets
);
if
(
fVerbose
)
if
(
fVerbose
)
{
{
printf
(
"%3d : C = %6d. Cl = %6d. NR = %6d. F = %3d. C = %5d. P = %3d. %s "
,
Abc_Print
(
1
,
"%3d : C = %6d. Cl = %6d. NR = %6d. F = %3d. C = %5d. P = %3d. %s "
,
Iter
,
Ssw_ClassesCand1Num
(
p
->
pMan
->
ppClasses
),
Ssw_ClassesClassNum
(
p
->
pMan
->
ppClasses
),
Iter
,
Ssw_ClassesCand1Num
(
p
->
pMan
->
ppClasses
),
Ssw_ClassesClassNum
(
p
->
pMan
->
ppClasses
),
Aig_ManNodeNum
(
p
->
pMan
->
pFrames
),
Frames
,
(
int
)
p
->
pMan
->
pMSat
->
pSat
->
stats
.
conflicts
,
p
->
nPatterns
,
Aig_ManNodeNum
(
p
->
pMan
->
pFrames
),
Frames
,
(
int
)
p
->
pMan
->
pMSat
->
pSat
->
stats
.
conflicts
,
p
->
nPatterns
,
p
->
pMan
->
nSatFailsReal
?
"f"
:
" "
);
p
->
pMan
->
nSatFailsReal
?
"f"
:
" "
);
ABC_PRT
(
"T"
,
clock
()
-
clk
);
ABC_PRT
(
"T"
,
clock
()
-
clk
);
}
}
Ssw_ManCleanup
(
p
->
pMan
);
Ssw_ManCleanup
(
p
->
pMan
);
if
(
fCheckTargets
&&
Ssw_SemCheckTargets
(
p
)
)
if
(
fCheckTargets
&&
Ssw_SemCheckTargets
(
p
)
)
{
{
printf
(
"Target is hit!!!
\n
"
);
Abc_Print
(
1
,
"Target is hit!!!
\n
"
);
RetValue
=
1
;
RetValue
=
1
;
}
}
if
(
p
->
nPatterns
>=
p
->
nPatternsAlloc
)
if
(
p
->
nPatterns
>=
p
->
nPatternsAlloc
)
...
@@ -304,14 +304,14 @@ clk = clock();
...
@@ -304,14 +304,14 @@ clk = clock();
pMan
->
nStrangers
=
0
;
pMan
->
nStrangers
=
0
;
pMan
->
nSatCalls
=
0
;
pMan
->
nSatCalls
=
0
;
pMan
->
nSatProof
=
0
;
pMan
->
nSatProof
=
0
;
pMan
->
nSatFailsReal
=
0
;
pMan
->
nSatFailsReal
=
0
;
pMan
->
nSatCallsUnsat
=
0
;
pMan
->
nSatCallsUnsat
=
0
;
pMan
->
nSatCallsSat
=
0
;
pMan
->
nSatCallsSat
=
0
;
pMan
->
timeSimSat
=
0
;
pMan
->
timeSimSat
=
0
;
pMan
->
timeSat
=
0
;
pMan
->
timeSat
=
0
;
pMan
->
timeSatSat
=
0
;
pMan
->
timeSatSat
=
0
;
pMan
->
timeSatUnsat
=
0
;
pMan
->
timeSatUnsat
=
0
;
pMan
->
timeSatUndec
=
0
;
pMan
->
timeSatUndec
=
0
;
return
RetValue
;
return
RetValue
;
}
}
...
@@ -321,4 +321,3 @@ clk = clock();
...
@@ -321,4 +321,3 @@ clk = clock();
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswSim.c
View file @
c3168ba6
...
@@ -62,19 +62,19 @@ static inline unsigned Ssw_ObjRandomSim() { return Aig_ManRa
...
@@ -62,19 +62,19 @@ static inline unsigned Ssw_ObjRandomSim() { return Aig_ManRa
***********************************************************************/
***********************************************************************/
unsigned
Ssw_SmlObjHashWord
(
Ssw_Sml_t
*
p
,
Aig_Obj_t
*
pObj
)
unsigned
Ssw_SmlObjHashWord
(
Ssw_Sml_t
*
p
,
Aig_Obj_t
*
pObj
)
{
{
static
int
s_SPrimes
[
128
]
=
{
static
int
s_SPrimes
[
128
]
=
{
1009
,
1049
,
1093
,
1151
,
1201
,
1249
,
1297
,
1361
,
1427
,
1459
,
1009
,
1049
,
1093
,
1151
,
1201
,
1249
,
1297
,
1361
,
1427
,
1459
,
1499
,
1559
,
1607
,
1657
,
1709
,
1759
,
1823
,
1877
,
1933
,
1997
,
1499
,
1559
,
1607
,
1657
,
1709
,
1759
,
1823
,
1877
,
1933
,
1997
,
2039
,
2089
,
2141
,
2213
,
2269
,
2311
,
2371
,
2411
,
2467
,
2543
,
2039
,
2089
,
2141
,
2213
,
2269
,
2311
,
2371
,
2411
,
2467
,
2543
,
2609
,
2663
,
2699
,
2741
,
2797
,
2851
,
2909
,
2969
,
3037
,
3089
,
2609
,
2663
,
2699
,
2741
,
2797
,
2851
,
2909
,
2969
,
3037
,
3089
,
3169
,
3221
,
3299
,
3331
,
3389
,
3461
,
3517
,
3557
,
3613
,
3671
,
3169
,
3221
,
3299
,
3331
,
3389
,
3461
,
3517
,
3557
,
3613
,
3671
,
3719
,
3779
,
3847
,
3907
,
3943
,
4013
,
4073
,
4129
,
4201
,
4243
,
3719
,
3779
,
3847
,
3907
,
3943
,
4013
,
4073
,
4129
,
4201
,
4243
,
4289
,
4363
,
4441
,
4493
,
4549
,
4621
,
4663
,
4729
,
4793
,
4871
,
4289
,
4363
,
4441
,
4493
,
4549
,
4621
,
4663
,
4729
,
4793
,
4871
,
4933
,
4973
,
5021
,
5087
,
5153
,
5227
,
5281
,
5351
,
5417
,
5471
,
4933
,
4973
,
5021
,
5087
,
5153
,
5227
,
5281
,
5351
,
5417
,
5471
,
5519
,
5573
,
5651
,
5693
,
5749
,
5821
,
5861
,
5923
,
6011
,
6073
,
5519
,
5573
,
5651
,
5693
,
5749
,
5821
,
5861
,
5923
,
6011
,
6073
,
6131
,
6199
,
6257
,
6301
,
6353
,
6397
,
6481
,
6563
,
6619
,
6689
,
6131
,
6199
,
6257
,
6301
,
6353
,
6397
,
6481
,
6563
,
6619
,
6689
,
6737
,
6803
,
6863
,
6917
,
6977
,
7027
,
7109
,
7187
,
7237
,
7309
,
6737
,
6803
,
6863
,
6917
,
6977
,
7027
,
7109
,
7187
,
7237
,
7309
,
7393
,
7477
,
7523
,
7561
,
7607
,
7681
,
7727
,
7817
,
7877
,
7933
,
7393
,
7477
,
7523
,
7561
,
7607
,
7681
,
7727
,
7817
,
7877
,
7933
,
8011
,
8039
,
8059
,
8081
,
8093
,
8111
,
8123
,
8147
8011
,
8039
,
8059
,
8081
,
8093
,
8111
,
8123
,
8147
};
};
unsigned
*
pSims
;
unsigned
*
pSims
;
...
@@ -93,7 +93,7 @@ unsigned Ssw_SmlObjHashWord( Ssw_Sml_t * p, Aig_Obj_t * pObj )
...
@@ -93,7 +93,7 @@ unsigned Ssw_SmlObjHashWord( Ssw_Sml_t * p, Aig_Obj_t * pObj )
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -115,7 +115,7 @@ int Ssw_SmlObjIsConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj )
...
@@ -115,7 +115,7 @@ int Ssw_SmlObjIsConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj )
Synopsis [Returns 1 if simulation infos are equal.]
Synopsis [Returns 1 if simulation infos are equal.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -138,7 +138,7 @@ int Ssw_SmlObjsAreEqualWord( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1
...
@@ -138,7 +138,7 @@ int Ssw_SmlObjsAreEqualWord( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1
Synopsis [Returns 1 if the node appears to be constant 1 candidate.]
Synopsis [Returns 1 if the node appears to be constant 1 candidate.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -154,7 +154,7 @@ int Ssw_SmlObjIsConstBit( void * p, Aig_Obj_t * pObj )
...
@@ -154,7 +154,7 @@ int Ssw_SmlObjIsConstBit( void * p, Aig_Obj_t * pObj )
Synopsis [Returns 1 if the nodes appear equal.]
Synopsis [Returns 1 if the nodes appear equal.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -171,7 +171,7 @@ int Ssw_SmlObjsAreEqualBit( void * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
...
@@ -171,7 +171,7 @@ int Ssw_SmlObjsAreEqualBit( void * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
Synopsis [Counts the number of 1s in the XOR of simulation data.]
Synopsis [Counts the number of 1s in the XOR of simulation data.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -193,7 +193,7 @@ int Ssw_SmlNodeNotEquWeight( Ssw_Sml_t * p, int Left, int Right )
...
@@ -193,7 +193,7 @@ int Ssw_SmlNodeNotEquWeight( Ssw_Sml_t * p, int Left, int Right )
Synopsis [Checks implication.]
Synopsis [Checks implication.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -228,7 +228,7 @@ int Ssw_SmlCheckXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * p
...
@@ -228,7 +228,7 @@ int Ssw_SmlCheckXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * p
Synopsis [Counts the number of 1s in the implication.]
Synopsis [Counts the number of 1s in the implication.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -261,7 +261,7 @@ int Ssw_SmlCountXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * p
...
@@ -261,7 +261,7 @@ int Ssw_SmlCountXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * p
Synopsis [Counts the number of 1s in the implication.]
Synopsis [Counts the number of 1s in the implication.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -285,7 +285,7 @@ int Ssw_SmlCountEqual( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo )
...
@@ -285,7 +285,7 @@ int Ssw_SmlCountEqual( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo )
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -307,7 +307,7 @@ int Ssw_SmlNodeIsZero( Ssw_Sml_t * p, Aig_Obj_t * pObj )
...
@@ -307,7 +307,7 @@ int Ssw_SmlNodeIsZero( Ssw_Sml_t * p, Aig_Obj_t * pObj )
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Synopsis [Returns 1 if simulation info is composed of all zeros.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -324,7 +324,7 @@ int Ssw_SmlNodeIsZeroFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f )
...
@@ -324,7 +324,7 @@ int Ssw_SmlNodeIsZeroFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f )
Synopsis [Counts the number of one's in the patten the object.]
Synopsis [Counts the number of one's in the patten the object.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -353,7 +353,7 @@ int Ssw_SmlNodeCountOnesReal( Ssw_Sml_t * p, Aig_Obj_t * pObj )
...
@@ -353,7 +353,7 @@ int Ssw_SmlNodeCountOnesReal( Ssw_Sml_t * p, Aig_Obj_t * pObj )
Synopsis [Counts the number of one's in the patten the object.]
Synopsis [Counts the number of one's in the patten the object.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -389,7 +389,7 @@ int Ssw_SmlNodeCountOnesRealVec( Ssw_Sml_t * p, Vec_Ptr_t * vObjs )
...
@@ -389,7 +389,7 @@ int Ssw_SmlNodeCountOnesRealVec( Ssw_Sml_t * p, Vec_Ptr_t * vObjs )
Synopsis [Generated const 0 pattern.]
Synopsis [Generated const 0 pattern.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -405,7 +405,7 @@ void Ssw_SmlSavePattern0( Ssw_Man_t * p, int fInit )
...
@@ -405,7 +405,7 @@ void Ssw_SmlSavePattern0( Ssw_Man_t * p, int fInit )
Synopsis [[Generated const 1 pattern.]
Synopsis [[Generated const 1 pattern.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -431,14 +431,14 @@ void Ssw_SmlSavePattern1( Ssw_Man_t * p, int fInit )
...
@@ -431,14 +431,14 @@ void Ssw_SmlSavePattern1( Ssw_Man_t * p, int fInit )
Synopsis [Creates the counter-example from the successful pattern.]
Synopsis [Creates the counter-example from the successful pattern.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
int
*
Ssw_SmlCheckOutputSavePattern
(
Ssw_Sml_t
*
p
,
Aig_Obj_t
*
pObjPo
)
int
*
Ssw_SmlCheckOutputSavePattern
(
Ssw_Sml_t
*
p
,
Aig_Obj_t
*
pObjPo
)
{
{
Aig_Obj_t
*
pFanin
,
*
pObjPi
;
Aig_Obj_t
*
pFanin
,
*
pObjPi
;
unsigned
*
pSims
;
unsigned
*
pSims
;
int
i
,
k
,
BestPat
,
*
pModel
;
int
i
,
k
,
BestPat
,
*
pModel
;
...
@@ -461,10 +461,10 @@ int * Ssw_SmlCheckOutputSavePattern( Ssw_Sml_t * p, Aig_Obj_t * pObjPo )
...
@@ -461,10 +461,10 @@ int * Ssw_SmlCheckOutputSavePattern( Ssw_Sml_t * p, Aig_Obj_t * pObjPo )
Aig_ManForEachCi
(
p
->
pAig
,
pObjPi
,
i
)
Aig_ManForEachCi
(
p
->
pAig
,
pObjPi
,
i
)
{
{
pModel
[
i
]
=
Abc_InfoHasBit
(
Ssw_ObjSim
(
p
,
pObjPi
->
Id
),
BestPat
);
pModel
[
i
]
=
Abc_InfoHasBit
(
Ssw_ObjSim
(
p
,
pObjPi
->
Id
),
BestPat
);
//
printf(
"%d", pModel[i] );
//
Abc_Print( 1,
"%d", pModel[i] );
}
}
pModel
[
Aig_ManCiNum
(
p
->
pAig
)]
=
pObjPo
->
Id
;
pModel
[
Aig_ManCiNum
(
p
->
pAig
)]
=
pObjPo
->
Id
;
//
printf(
"\n" );
//
Abc_Print( 1,
"\n" );
return
pModel
;
return
pModel
;
}
}
...
@@ -485,7 +485,7 @@ int * Ssw_SmlCheckOutput( Ssw_Sml_t * p )
...
@@ -485,7 +485,7 @@ int * Ssw_SmlCheckOutput( Ssw_Sml_t * p )
int
i
;
int
i
;
// make sure the reference simulation pattern does not detect the bug
// make sure the reference simulation pattern does not detect the bug
pObj
=
Aig_ManCo
(
p
->
pAig
,
0
);
pObj
=
Aig_ManCo
(
p
->
pAig
,
0
);
assert
(
Aig_ObjFanin0
(
pObj
)
->
fPhase
==
(
unsigned
)
Aig_ObjFaninC0
(
pObj
)
);
assert
(
Aig_ObjFanin0
(
pObj
)
->
fPhase
==
(
unsigned
)
Aig_ObjFaninC0
(
pObj
)
);
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
{
{
if
(
!
Ssw_SmlObjIsConstWord
(
p
,
Aig_ObjFanin0
(
pObj
)
)
)
if
(
!
Ssw_SmlObjIsConstWord
(
p
,
Aig_ObjFanin0
(
pObj
)
)
)
...
@@ -504,7 +504,7 @@ int * Ssw_SmlCheckOutput( Ssw_Sml_t * p )
...
@@ -504,7 +504,7 @@ int * Ssw_SmlCheckOutput( Ssw_Sml_t * p )
Synopsis [Assigns random patterns to the PI node.]
Synopsis [Assigns random patterns to the PI node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -529,7 +529,7 @@ void Ssw_SmlAssignRandom( Ssw_Sml_t * p, Aig_Obj_t * pObj )
...
@@ -529,7 +529,7 @@ void Ssw_SmlAssignRandom( Ssw_Sml_t * p, Aig_Obj_t * pObj )
Synopsis [Assigns random patterns to the PI node.]
Synopsis [Assigns random patterns to the PI node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -551,7 +551,7 @@ void Ssw_SmlAssignRandomFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
...
@@ -551,7 +551,7 @@ void Ssw_SmlAssignRandomFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
Synopsis [Assigns constant patterns to the PI node.]
Synopsis [Assigns constant patterns to the PI node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -566,14 +566,14 @@ void Ssw_SmlObjAssignConst( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iF
...
@@ -566,14 +566,14 @@ void Ssw_SmlObjAssignConst( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iF
pSims
=
Ssw_ObjSim
(
p
,
pObj
->
Id
)
+
p
->
nWordsFrame
*
iFrame
;
pSims
=
Ssw_ObjSim
(
p
,
pObj
->
Id
)
+
p
->
nWordsFrame
*
iFrame
;
for
(
i
=
0
;
i
<
p
->
nWordsFrame
;
i
++
)
for
(
i
=
0
;
i
<
p
->
nWordsFrame
;
i
++
)
pSims
[
i
]
=
fConst1
?
~
(
unsigned
)
0
:
0
;
pSims
[
i
]
=
fConst1
?
~
(
unsigned
)
0
:
0
;
}
}
/**Function*************************************************************
/**Function*************************************************************
Synopsis [Assigns constant patterns to the PI node.]
Synopsis [Assigns constant patterns to the PI node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -587,14 +587,14 @@ void Ssw_SmlObjAssignConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, in
...
@@ -587,14 +587,14 @@ void Ssw_SmlObjAssignConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, in
assert
(
Aig_ObjIsCi
(
pObj
)
);
assert
(
Aig_ObjIsCi
(
pObj
)
);
pSims
=
Ssw_ObjSim
(
p
,
pObj
->
Id
)
+
p
->
nWordsFrame
*
iFrame
;
pSims
=
Ssw_ObjSim
(
p
,
pObj
->
Id
)
+
p
->
nWordsFrame
*
iFrame
;
pSims
[
iWord
]
=
fConst1
?
~
(
unsigned
)
0
:
0
;
pSims
[
iWord
]
=
fConst1
?
~
(
unsigned
)
0
:
0
;
}
}
/**Function*************************************************************
/**Function*************************************************************
Synopsis [Assigns constant patterns to the PI node.]
Synopsis [Assigns constant patterns to the PI node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -607,14 +607,14 @@ void Ssw_SmlObjSetWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, unsigned Word, int iWor
...
@@ -607,14 +607,14 @@ void Ssw_SmlObjSetWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, unsigned Word, int iWor
assert
(
Aig_ObjIsCi
(
pObj
)
);
assert
(
Aig_ObjIsCi
(
pObj
)
);
pSims
=
Ssw_ObjSim
(
p
,
pObj
->
Id
)
+
p
->
nWordsFrame
*
iFrame
;
pSims
=
Ssw_ObjSim
(
p
,
pObj
->
Id
)
+
p
->
nWordsFrame
*
iFrame
;
pSims
[
iWord
]
=
Word
;
pSims
[
iWord
]
=
Word
;
}
}
/**Function*************************************************************
/**Function*************************************************************
Synopsis [Assings distance-1 simulation info for the PIs.]
Synopsis [Assings distance-1 simulation info for the PIs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -627,7 +627,7 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
...
@@ -627,7 +627,7 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
assert
(
p
->
nFrames
>
0
);
assert
(
p
->
nFrames
>
0
);
if
(
p
->
nFrames
==
1
)
if
(
p
->
nFrames
==
1
)
{
{
// copy the PI info
// copy the PI info
Aig_ManForEachCi
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachCi
(
p
->
pAig
,
pObj
,
i
)
Ssw_SmlObjAssignConst
(
p
,
pObj
,
Abc_InfoHasBit
(
pPat
,
i
),
0
);
Ssw_SmlObjAssignConst
(
p
,
pObj
,
Abc_InfoHasBit
(
pPat
,
i
),
0
);
// flip one bit
// flip one bit
...
@@ -644,7 +644,7 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
...
@@ -644,7 +644,7 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
for
(
f
=
0
;
f
<
p
->
nFrames
;
f
++
)
for
(
f
=
0
;
f
<
p
->
nFrames
;
f
++
)
Saig_ManForEachPi
(
p
->
pAig
,
pObj
,
i
)
Saig_ManForEachPi
(
p
->
pAig
,
pObj
,
i
)
Ssw_SmlObjAssignConst
(
p
,
pObj
,
Abc_InfoHasBit
(
pPat
,
nTruePis
*
f
+
i
),
f
);
Ssw_SmlObjAssignConst
(
p
,
pObj
,
Abc_InfoHasBit
(
pPat
,
nTruePis
*
f
+
i
),
f
);
// copy the latch info
// copy the latch info
k
=
0
;
k
=
0
;
Saig_ManForEachLo
(
p
->
pAig
,
pObj
,
i
)
Saig_ManForEachLo
(
p
->
pAig
,
pObj
,
i
)
Ssw_SmlObjAssignConst
(
p
,
pObj
,
Abc_InfoHasBit
(
pPat
,
nTruePis
*
p
->
nFrames
+
k
++
),
0
);
Ssw_SmlObjAssignConst
(
p
,
pObj
,
Abc_InfoHasBit
(
pPat
,
nTruePis
*
p
->
nFrames
+
k
++
),
0
);
...
@@ -665,7 +665,7 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
...
@@ -665,7 +665,7 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
Synopsis [Assings distance-1 simulation info for the PIs.]
Synopsis [Assings distance-1 simulation info for the PIs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -697,7 +697,7 @@ void Ssw_SmlAssignDist1Plus( Ssw_Sml_t * p, unsigned * pPat )
...
@@ -697,7 +697,7 @@ void Ssw_SmlAssignDist1Plus( Ssw_Sml_t * p, unsigned * pPat )
Synopsis [Simulates one node.]
Synopsis [Simulates one node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -763,7 +763,7 @@ void Ssw_SmlNodeSimulate( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
...
@@ -763,7 +763,7 @@ void Ssw_SmlNodeSimulate( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
Synopsis [Simulates one node.]
Synopsis [Simulates one node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -794,7 +794,7 @@ int Ssw_SmlNodesCompareInFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pO
...
@@ -794,7 +794,7 @@ int Ssw_SmlNodesCompareInFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pO
Synopsis [Simulates one node.]
Synopsis [Simulates one node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -828,7 +828,7 @@ void Ssw_SmlNodeCopyFanin( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
...
@@ -828,7 +828,7 @@ void Ssw_SmlNodeCopyFanin( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
Synopsis [Simulates one node.]
Synopsis [Simulates one node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -857,7 +857,7 @@ void Ssw_SmlNodeTransferNext( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn,
...
@@ -857,7 +857,7 @@ void Ssw_SmlNodeTransferNext( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn,
Synopsis [Simulates one node.]
Synopsis [Simulates one node.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -886,7 +886,7 @@ void Ssw_SmlNodeTransferFirst( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn
...
@@ -886,7 +886,7 @@ void Ssw_SmlNodeTransferFirst( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn
Synopsis [Assings random simulation info for the PIs.]
Synopsis [Assings random simulation info for the PIs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -919,7 +919,7 @@ void Ssw_SmlInitialize( Ssw_Sml_t * p, int fInit )
...
@@ -919,7 +919,7 @@ void Ssw_SmlInitialize( Ssw_Sml_t * p, int fInit )
Synopsis [Assings random simulation info for the PIs.]
Synopsis [Assings random simulation info for the PIs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -946,7 +946,7 @@ void Ssw_SmlInitializeSpecial( Ssw_Sml_t * p, Vec_Int_t * vInit )
...
@@ -946,7 +946,7 @@ void Ssw_SmlInitializeSpecial( Ssw_Sml_t * p, Vec_Int_t * vInit )
Synopsis [Assings random simulation info for the PIs.]
Synopsis [Assings random simulation info for the PIs.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -971,7 +971,7 @@ void Ssw_SmlReinitialize( Ssw_Sml_t * p )
...
@@ -971,7 +971,7 @@ void Ssw_SmlReinitialize( Ssw_Sml_t * p )
Synopsis [Check if any of the POs becomes non-constant.]
Synopsis [Check if any of the POs becomes non-constant.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -996,7 +996,7 @@ int Ssw_SmlCheckNonConstOutputs( Ssw_Sml_t * p )
...
@@ -996,7 +996,7 @@ int Ssw_SmlCheckNonConstOutputs( Ssw_Sml_t * p )
Synopsis [Simulates AIG manager.]
Synopsis [Simulates AIG manager.]
Description [Assumes that the PI simulation info is attached.]
Description [Assumes that the PI simulation info is attached.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1035,7 +1035,7 @@ p->nSimRounds++;
...
@@ -1035,7 +1035,7 @@ p->nSimRounds++;
Synopsis [Converts simulation information to be not normallized.]
Synopsis [Converts simulation information to be not normallized.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1067,7 +1067,7 @@ void Ssw_SmlUnnormalize( Ssw_Sml_t * p )
...
@@ -1067,7 +1067,7 @@ void Ssw_SmlUnnormalize( Ssw_Sml_t * p )
Synopsis [Simulates AIG manager.]
Synopsis [Simulates AIG manager.]
Description [Assumes that the PI simulation info is attached.]
Description [Assumes that the PI simulation info is attached.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1108,7 +1108,7 @@ void Ssw_SmlSimulateOneDyn_rec( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f, int * pV
...
@@ -1108,7 +1108,7 @@ void Ssw_SmlSimulateOneDyn_rec( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f, int * pV
Synopsis [Simulates AIG manager.]
Synopsis [Simulates AIG manager.]
Description [Assumes that the PI simulation info is attached.]
Description [Assumes that the PI simulation info is attached.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1139,7 +1139,7 @@ p->nSimRounds++;
...
@@ -1139,7 +1139,7 @@ p->nSimRounds++;
Synopsis [Allocates simulation manager.]
Synopsis [Allocates simulation manager.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1164,7 +1164,7 @@ Ssw_Sml_t * Ssw_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFr
...
@@ -1164,7 +1164,7 @@ Ssw_Sml_t * Ssw_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFr
Synopsis [Allocates simulation manager.]
Synopsis [Allocates simulation manager.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1180,7 +1180,7 @@ void Ssw_SmlClean( Ssw_Sml_t * p )
...
@@ -1180,7 +1180,7 @@ void Ssw_SmlClean( Ssw_Sml_t * p )
Synopsis [Get simulation data.]
Synopsis [Get simulation data.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1202,7 +1202,7 @@ Vec_Ptr_t * Ssw_SmlSimDataPointers( Ssw_Sml_t * p )
...
@@ -1202,7 +1202,7 @@ Vec_Ptr_t * Ssw_SmlSimDataPointers( Ssw_Sml_t * p )
Synopsis [Deallocates simulation manager.]
Synopsis [Deallocates simulation manager.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1219,7 +1219,7 @@ void Ssw_SmlStop( Ssw_Sml_t * p )
...
@@ -1219,7 +1219,7 @@ void Ssw_SmlStop( Ssw_Sml_t * p )
Synopsis [Performs simulation of the uninitialized circuit.]
Synopsis [Performs simulation of the uninitialized circuit.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1239,7 +1239,7 @@ Ssw_Sml_t * Ssw_SmlSimulateComb( Aig_Man_t * pAig, int nWords )
...
@@ -1239,7 +1239,7 @@ Ssw_Sml_t * Ssw_SmlSimulateComb( Aig_Man_t * pAig, int nWords )
Synopsis [Performs simulation of the initialized circuit.]
Synopsis [Performs simulation of the initialized circuit.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1260,7 +1260,7 @@ Ssw_Sml_t * Ssw_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nW
...
@@ -1260,7 +1260,7 @@ Ssw_Sml_t * Ssw_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nW
Synopsis [Performs next round of sequential simulation.]
Synopsis [Performs next round of sequential simulation.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1279,7 +1279,7 @@ void Ssw_SmlResimulateSeq( Ssw_Sml_t * p )
...
@@ -1279,7 +1279,7 @@ void Ssw_SmlResimulateSeq( Ssw_Sml_t * p )
Synopsis [Returns the number of frames simulated in the manager.]
Synopsis [Returns the number of frames simulated in the manager.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1295,7 +1295,7 @@ int Ssw_SmlNumFrames( Ssw_Sml_t * p )
...
@@ -1295,7 +1295,7 @@ int Ssw_SmlNumFrames( Ssw_Sml_t * p )
Synopsis [Returns the total number of simulation words.]
Synopsis [Returns the total number of simulation words.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1312,7 +1312,7 @@ int Ssw_SmlNumWordsTotal( Ssw_Sml_t * p )
...
@@ -1312,7 +1312,7 @@ int Ssw_SmlNumWordsTotal( Ssw_Sml_t * p )
Description [The simulation info is normalized unless procedure
Description [The simulation info is normalized unless procedure
Ssw_SmlUnnormalize() is called in advance.]
Ssw_SmlUnnormalize() is called in advance.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1329,7 +1329,7 @@ unsigned * Ssw_SmlSimInfo( Ssw_Sml_t * p, Aig_Obj_t * pObj )
...
@@ -1329,7 +1329,7 @@ unsigned * Ssw_SmlSimInfo( Ssw_Sml_t * p, Aig_Obj_t * pObj )
Synopsis [Creates sequential counter-example from the simulation info.]
Synopsis [Creates sequential counter-example from the simulation info.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -1391,7 +1391,7 @@ Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
...
@@ -1391,7 +1391,7 @@ Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
// verify the counter example
// verify the counter example
if
(
!
Saig_ManVerifyCex
(
p
->
pAig
,
pCex
)
)
if
(
!
Saig_ManVerifyCex
(
p
->
pAig
,
pCex
)
)
{
{
printf
(
"Ssw_SmlGetCounterExample(): Counter-example is invalid.
\n
"
);
Abc_Print
(
1
,
"Ssw_SmlGetCounterExample(): Counter-example is invalid.
\n
"
);
Abc_CexFree
(
pCex
);
Abc_CexFree
(
pCex
);
pCex
=
NULL
;
pCex
=
NULL
;
}
}
...
@@ -1404,4 +1404,3 @@ Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
...
@@ -1404,4 +1404,3 @@ Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswSimSat.c
View file @
c3168ba6
...
@@ -62,17 +62,17 @@ void Ssw_ManResimulateBit( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr )
...
@@ -62,17 +62,17 @@ void Ssw_ManResimulateBit( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr )
RetValue1
=
Ssw_ClassesRefineConst1
(
p
->
ppClasses
,
0
);
RetValue1
=
Ssw_ClassesRefineConst1
(
p
->
ppClasses
,
0
);
RetValue2
=
Ssw_ClassesRefine
(
p
->
ppClasses
,
0
);
RetValue2
=
Ssw_ClassesRefine
(
p
->
ppClasses
,
0
);
// make sure refinement happened
// make sure refinement happened
if
(
Aig_ObjIsConst1
(
pRepr
)
)
if
(
Aig_ObjIsConst1
(
pRepr
)
)
{
{
assert
(
RetValue1
);
assert
(
RetValue1
);
if
(
RetValue1
==
0
)
if
(
RetValue1
==
0
)
printf
(
"
\n
Ssw_ManResimulateBit() Error: RetValue1 does not hold.
\n
"
);
Abc_Print
(
1
,
"
\n
Ssw_ManResimulateBit() Error: RetValue1 does not hold.
\n
"
);
}
}
else
else
{
{
assert
(
RetValue2
);
assert
(
RetValue2
);
if
(
RetValue2
==
0
)
if
(
RetValue2
==
0
)
printf
(
"
\n
Ssw_ManResimulateBit() Error: RetValue2 does not hold.
\n
"
);
Abc_Print
(
1
,
"
\n
Ssw_ManResimulateBit() Error: RetValue2 does not hold.
\n
"
);
}
}
}
}
p
->
timeSimSat
+=
clock
()
-
clk
;
p
->
timeSimSat
+=
clock
()
-
clk
;
...
@@ -105,13 +105,13 @@ void Ssw_ManResimulateWord( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr,
...
@@ -105,13 +105,13 @@ void Ssw_ManResimulateWord( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr,
{
{
assert
(
RetValue1
);
assert
(
RetValue1
);
if
(
RetValue1
==
0
)
if
(
RetValue1
==
0
)
printf
(
"
\n
Ssw_ManResimulateWord() Error: RetValue1 does not hold.
\n
"
);
Abc_Print
(
1
,
"
\n
Ssw_ManResimulateWord() Error: RetValue1 does not hold.
\n
"
);
}
}
else
else
{
{
assert
(
RetValue2
);
assert
(
RetValue2
);
if
(
RetValue2
==
0
)
if
(
RetValue2
==
0
)
printf
(
"
\n
Ssw_ManResimulateWord() Error: RetValue2 does not hold.
\n
"
);
Abc_Print
(
1
,
"
\n
Ssw_ManResimulateWord() Error: RetValue2 does not hold.
\n
"
);
}
}
p
->
timeSimSat
+=
clock
()
-
clk
;
p
->
timeSimSat
+=
clock
()
-
clk
;
}
}
...
@@ -122,4 +122,3 @@ p->timeSimSat += clock() - clk;
...
@@ -122,4 +122,3 @@ p->timeSimSat += clock() - clk;
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswSweep.c
View file @
c3168ba6
...
@@ -98,7 +98,7 @@ void Ssw_CheckConstraints( Ssw_Man_t * p )
...
@@ -98,7 +98,7 @@ void Ssw_CheckConstraints( Ssw_Man_t * p )
Counter
++
;
Counter
++
;
}
}
}
}
printf
(
"Total constraints = %d. Added constraints = %d.
\n
"
,
nConstrPairs
/
2
,
Counter
);
Abc_Print
(
1
,
"Total constraints = %d. Added constraints = %d.
\n
"
,
nConstrPairs
/
2
,
Counter
);
}
}
/**Function*************************************************************
/**Function*************************************************************
...
@@ -148,7 +148,7 @@ void Ssw_SmlSavePatternAig( Ssw_Man_t * p, int f )
...
@@ -148,7 +148,7 @@ void Ssw_SmlSavePatternAig( Ssw_Man_t * p, int f )
Synopsis [Saves one counter-example into internal storage.]
Synopsis [Saves one counter-example into internal storage.]
Description []
Description []
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
...
@@ -178,14 +178,14 @@ void Ssw_SmlAddPatternDyn( Ssw_Man_t * p )
...
@@ -178,14 +178,14 @@ void Ssw_SmlAddPatternDyn( Ssw_Man_t * p )
Synopsis [Performs fraiging for one node.]
Synopsis [Performs fraiging for one node.]
Description [Returns the fraiged node.]
Description [Returns the fraiged node.]
SideEffects []
SideEffects []
SeeAlso []
SeeAlso []
***********************************************************************/
***********************************************************************/
int
Ssw_ManSweepNode
(
Ssw_Man_t
*
p
,
Aig_Obj_t
*
pObj
,
int
f
,
int
fBmc
,
Vec_Int_t
*
vPairs
)
int
Ssw_ManSweepNode
(
Ssw_Man_t
*
p
,
Aig_Obj_t
*
pObj
,
int
f
,
int
fBmc
,
Vec_Int_t
*
vPairs
)
{
{
Aig_Obj_t
*
pObjRepr
,
*
pObjFraig
,
*
pObjFraig2
,
*
pObjReprFraig
;
Aig_Obj_t
*
pObjRepr
,
*
pObjFraig
,
*
pObjFraig2
,
*
pObjReprFraig
;
int
RetValue
;
int
RetValue
;
clock_t
clk
;
clock_t
clk
;
...
@@ -202,7 +202,7 @@ int Ssw_ManSweepNode( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc, Vec_Int_
...
@@ -202,7 +202,7 @@ int Ssw_ManSweepNode( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc, Vec_Int_
assert
(
(
pObj
->
fPhase
==
pObjRepr
->
fPhase
)
==
(
Aig_ObjPhaseReal
(
pObjFraig
)
==
Aig_ObjPhaseReal
(
pObjReprFraig
))
);
assert
(
(
pObj
->
fPhase
==
pObjRepr
->
fPhase
)
==
(
Aig_ObjPhaseReal
(
pObjFraig
)
==
Aig_ObjPhaseReal
(
pObjReprFraig
))
);
// if the fraiged nodes are the same, return
// if the fraiged nodes are the same, return
if
(
Aig_Regular
(
pObjFraig
)
==
Aig_Regular
(
pObjReprFraig
)
)
if
(
Aig_Regular
(
pObjFraig
)
==
Aig_Regular
(
pObjReprFraig
)
)
return
0
;
return
0
;
// add constraints on demand
// add constraints on demand
if
(
!
fBmc
&&
p
->
pPars
->
fDynamic
)
if
(
!
fBmc
&&
p
->
pPars
->
fDynamic
)
{
{
...
@@ -248,7 +248,7 @@ p->timeMarkCones += clock() - clk;
...
@@ -248,7 +248,7 @@ p->timeMarkCones += clock() - clk;
assert
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
!=
pObjRepr
);
assert
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
!=
pObjRepr
);
if
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
==
pObjRepr
)
if
(
Aig_ObjRepr
(
p
->
pAig
,
pObj
)
==
pObjRepr
)
{
{
printf
(
"Ssw_ManSweepNode(): Failed to refine representative.
\n
"
);
Abc_Print
(
1
,
"Ssw_ManSweepNode(): Failed to refine representative.
\n
"
);
}
}
return
1
;
return
1
;
}
}
...
@@ -299,7 +299,7 @@ clk = clock();
...
@@ -299,7 +299,7 @@ clk = clock();
// quit if this is the last timeframe
// quit if this is the last timeframe
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
if
(
f
==
p
->
pPars
->
nFramesK
-
1
)
break
;
break
;
// transfer latch input to the latch outputs
// transfer latch input to the latch outputs
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Aig_ManForEachCo
(
p
->
pAig
,
pObj
,
i
)
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
)
);
// build logic cones for register outputs
// build logic cones for register outputs
...
@@ -340,14 +340,14 @@ void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num )
...
@@ -340,14 +340,14 @@ void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num )
pFile
=
fopen
(
pBuffer
,
"w"
);
pFile
=
fopen
(
pBuffer
,
"w"
);
if
(
pFile
==
NULL
)
if
(
pFile
==
NULL
)
{
{
printf
(
"Cannot open file %s for writing.
\n
"
,
pBuffer
);
Abc_Print
(
1
,
"Cannot open file %s for writing.
\n
"
,
pBuffer
);
return
;
return
;
}
}
fclose
(
pFile
);
fclose
(
pFile
);
pNew
=
Saig_ManCreateEquivMiter
(
p
,
vPairs
);
pNew
=
Saig_ManCreateEquivMiter
(
p
,
vPairs
);
Ioa_WriteAiger
(
pNew
,
pBuffer
,
0
,
0
);
Ioa_WriteAiger
(
pNew
,
pBuffer
,
0
,
0
);
Aig_ManStop
(
pNew
);
Aig_ManStop
(
pNew
);
printf
(
"AIG with %4d disproved equivs is dumped into file
\"
%s
\"
.
\n
"
,
Vec_IntSize
(
vPairs
)
/
2
,
pBuffer
);
Abc_Print
(
1
,
"AIG with %4d disproved equivs is dumped into file
\"
%s
\"
.
\n
"
,
Vec_IntSize
(
vPairs
)
/
2
,
pBuffer
);
}
}
...
@@ -363,7 +363,7 @@ void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num )
...
@@ -363,7 +363,7 @@ void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num )
***********************************************************************/
***********************************************************************/
int
Ssw_ManSweep
(
Ssw_Man_t
*
p
)
int
Ssw_ManSweep
(
Ssw_Man_t
*
p
)
{
{
static
int
Counter
;
static
int
Counter
;
Bar_Progress_t
*
pProgress
=
NULL
;
Bar_Progress_t
*
pProgress
=
NULL
;
Aig_Obj_t
*
pObj
,
*
pObj2
,
*
pObjNew
;
Aig_Obj_t
*
pObj
,
*
pObj2
,
*
pObjNew
;
...
@@ -412,7 +412,7 @@ p->timeReduce += clock() - clk;
...
@@ -412,7 +412,7 @@ p->timeReduce += clock() - clk;
if
(
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
if
(
Saig_ObjIsLo
(
p
->
pAig
,
pObj
)
)
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
vDisproved
);
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
vDisproved
);
else
if
(
Aig_ObjIsNode
(
pObj
)
)
else
if
(
Aig_ObjIsNode
(
pObj
)
)
{
{
pObjNew
=
Aig_And
(
p
->
pFrames
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Ssw_ObjChild1Fra
(
p
,
pObj
,
f
)
);
pObjNew
=
Aig_And
(
p
->
pFrames
,
Ssw_ObjChild0Fra
(
p
,
pObj
,
f
),
Ssw_ObjChild1Fra
(
p
,
pObj
,
f
)
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
pObjNew
);
Ssw_ObjSetFrame
(
p
,
pObj
,
f
,
pObjNew
);
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
vDisproved
);
p
->
fRefined
|=
Ssw_ManSweepNode
(
p
,
pObj
,
f
,
0
,
vDisproved
);
...
@@ -435,4 +435,3 @@ p->timeReduce += clock() - clk;
...
@@ -435,4 +435,3 @@ p->timeReduce += clock() - clk;
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
src/proof/ssw/sswUnique.c
View file @
c3168ba6
...
@@ -61,7 +61,7 @@ void Ssw_UniqueRegisterPairInfo( Ssw_Man_t * p )
...
@@ -61,7 +61,7 @@ void Ssw_UniqueRegisterPairInfo( Ssw_Man_t * p )
// Vec_IntPush( p->vDiffPairs, 1 );
// Vec_IntPush( p->vDiffPairs, 1 );
else
if
(
Aig_ObjPhaseReal
(
pObj0
)
!=
Aig_ObjPhaseReal
(
pObj1
)
)
else
if
(
Aig_ObjPhaseReal
(
pObj0
)
!=
Aig_ObjPhaseReal
(
pObj1
)
)
Vec_IntPush
(
p
->
vDiffPairs
,
1
);
Vec_IntPush
(
p
->
vDiffPairs
,
1
);
else
else
{
{
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObj0
),
Aig_Regular
(
pObj1
)
);
RetValue
=
Ssw_NodesAreEquiv
(
p
,
Aig_Regular
(
pObj0
),
Aig_Regular
(
pObj1
)
);
Vec_IntPush
(
p
->
vDiffPairs
,
RetValue
!=
1
);
Vec_IntPush
(
p
->
vDiffPairs
,
RetValue
!=
1
);
...
@@ -72,7 +72,7 @@ void Ssw_UniqueRegisterPairInfo( Ssw_Man_t * p )
...
@@ -72,7 +72,7 @@ void Ssw_UniqueRegisterPairInfo( Ssw_Man_t * p )
Counter
=
0
;
Counter
=
0
;
Vec_IntForEachEntry
(
p
->
vDiffPairs
,
RetValue
,
i
)
Vec_IntForEachEntry
(
p
->
vDiffPairs
,
RetValue
,
i
)
Counter
+=
RetValue
;
Counter
+=
RetValue
;
//
printf(
"The number of different register pairs = %d.\n", Counter );
//
Abc_Print( 1,
"The number of different register pairs = %d.\n", Counter );
}
}
...
@@ -96,7 +96,7 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
...
@@ -96,7 +96,7 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
assert
(
p
->
vDiffPairs
&&
Vec_IntSize
(
p
->
vDiffPairs
)
==
Saig_ManRegNum
(
p
->
pAig
)
);
assert
(
p
->
vDiffPairs
&&
Vec_IntSize
(
p
->
vDiffPairs
)
==
Saig_ManRegNum
(
p
->
pAig
)
);
// compute the first support in terms of LOs
// compute the first support in terms of LOs
ppObjs
[
0
]
=
pRepr
;
ppObjs
[
0
]
=
pRepr
;
ppObjs
[
1
]
=
pObj
;
ppObjs
[
1
]
=
pObj
;
Aig_SupportNodes
(
p
->
pAig
,
ppObjs
,
2
,
p
->
vCommon
);
Aig_SupportNodes
(
p
->
pAig
,
ppObjs
,
2
,
p
->
vCommon
);
// keep only LOs
// keep only LOs
...
@@ -116,7 +116,7 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
...
@@ -116,7 +116,7 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
Vec_PtrShrink
(
p
->
vCommon
,
k
);
Vec_PtrShrink
(
p
->
vCommon
,
k
);
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"Node = %5d : Supp = %3d. Regs = %3d. Feasible = %s. "
,
Abc_Print
(
1
,
"Node = %5d : Supp = %3d. Regs = %3d. Feasible = %s. "
,
Aig_ObjId
(
pObj
),
RetValue
,
Vec_PtrSize
(
p
->
vCommon
),
Aig_ObjId
(
pObj
),
RetValue
,
Vec_PtrSize
(
p
->
vCommon
),
fFeasible
?
"yes"
:
"no "
);
fFeasible
?
"yes"
:
"no "
);
...
@@ -129,10 +129,10 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
...
@@ -129,10 +129,10 @@ int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fV
if
(
Value0
!=
Value1
)
if
(
Value0
!=
Value1
)
RetValue
=
0
;
RetValue
=
0
;
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"%d"
,
Value0
^
Value1
);
Abc_Print
(
1
,
"%d"
,
Value0
^
Value1
);
}
}
if
(
fVerbose
)
if
(
fVerbose
)
printf
(
"
\n
"
);
Abc_Print
(
1
,
"
\n
"
);
return
RetValue
&&
fFeasible
;
return
RetValue
&&
fFeasible
;
}
}
...
@@ -166,7 +166,7 @@ int Ssw_ManUniqueAddConstraint( Ssw_Man_t * p, Vec_Ptr_t * vCommon, int f1, int
...
@@ -166,7 +166,7 @@ int Ssw_ManUniqueAddConstraint( Ssw_Man_t * p, Vec_Ptr_t * vCommon, int f1, int
}
}
if
(
Aig_ObjIsConst1
(
Aig_Regular
(
pTotal
))
)
if
(
Aig_ObjIsConst1
(
Aig_Regular
(
pTotal
))
)
{
{
//
printf(
"Skipped\n" );
//
Abc_Print( 1,
"Skipped\n" );
return
0
;
return
0
;
}
}
// create CNF
// create CNF
...
@@ -194,4 +194,3 @@ int Ssw_ManUniqueAddConstraint( Ssw_Man_t * p, Vec_Ptr_t * vCommon, int f1, int
...
@@ -194,4 +194,3 @@ int Ssw_ManUniqueAddConstraint( Ssw_Man_t * p, Vec_Ptr_t * vCommon, int f1, int
ABC_NAMESPACE_IMPL_END
ABC_NAMESPACE_IMPL_END
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