Version abc61216

abc.dsp

@@ -410,6 +410,10 @@ SOURCE=.\src\base\io\ioRead.c
 # End Source File
 # Begin Source File
 
+SOURCE=.\src\base\io\ioReadAiger.c
+# End Source File
+# Begin Source File
+
 SOURCE=.\src\base\io\ioReadBaf.c
 # End Source File
 # Begin Source File
@@ -438,6 +442,10 @@ SOURCE=.\src\base\io\ioUtil.c
 # End Source File
 # Begin Source File
 
+SOURCE=.\src\base\io\ioWriteAiger.c
+# End Source File
+# Begin Source File
+
 SOURCE=.\src\base\io\ioWriteBaf.c
 # End Source File
 # Begin Source File

abc.rc

 # global parameters
 set check         # checks intermediate networks
 #set checkfio      # prints warnings when fanins/fanouts are duplicated
-#set checkread     # checks new networks after reading from file
+set checkread     # checks new networks after reading from file
 set backup        # saves backup networks retrived by "undo" and "recall"
 set savesteps 1   # sets the maximum number of backup networks to save 
 set progressbar   # display the progress bar

src/aig/ivy/ivyMem.c

@@ -87,15 +87,16 @@ void Ivy_ManAddMemory( Ivy_Man_t * p )
 {
     char * pMemory;
     int i, nBytes;
-    assert( sizeof(Ivy_Obj_t) <= 64 );
+    int EntrySizeMax = 128;
+    assert( sizeof(Ivy_Obj_t) <= EntrySizeMax );
     assert( p->pListFree == NULL );
 //    assert( (Ivy_ManObjNum(p) & IVY_PAGE_MASK) == 0 );
     // allocate new memory page
-    nBytes = sizeof(Ivy_Obj_t) * (1<<IVY_PAGE_SIZE) + 64;
+    nBytes = sizeof(Ivy_Obj_t) * (1<<IVY_PAGE_SIZE) + EntrySizeMax;
     pMemory = ALLOC( char, nBytes );
     Vec_PtrPush( p->vChunks, pMemory );
     // align memory at the 32-byte boundary
-    pMemory = pMemory + 64 - (((int)pMemory) & 63);
+    pMemory = pMemory + EntrySizeMax - (((int)pMemory) & (EntrySizeMax-1));
     // remember the manager in the first entry
     Vec_PtrPush( p->vPages, pMemory );
     // break the memory down into nodes

src/base/abc/abcCheck.c

@@ -422,6 +422,10 @@ bool Abc_NtkCheckObj( Abc_Ntk_t * pNtk, Abc_Obj_t * pObj )
         fprintf( stdout, "NetworkCheck: Object \"%s\" has incorrect ID.\n", Abc_ObjName(pObj) );
         return 0;
     }
+
+    if ( !Abc_FrameIsFlagEnabled("checkfio") )
+        return Value;
+
     // go through the fanins of the object and make sure fanins have this object as a fanout
     Abc_ObjForEachFanin( pObj, pFanin, i )
     {
@@ -443,9 +447,6 @@ bool Abc_NtkCheckObj( Abc_Ntk_t * pNtk, Abc_Obj_t * pObj )
         }
     }
 
-    if ( !Abc_FrameIsFlagEnabled("checkfio") )
-        return Value;
-
     // make sure fanins are not duplicated
     for ( i = 0; i < pObj->vFanins.nSize; i++ )
         for ( k = i + 1; k < pObj->vFanins.nSize; k++ )
@@ -706,10 +707,10 @@ bool Abc_NtkCompareBoxes( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fComb )
     // for each PI of pNet1 find corresponding PI of pNet2 and reorder them
     Abc_NtkForEachBox( pNtk1, pObj1, i )
     {
-        if ( strcmp( Abc_ObjName(pObj1), Abc_ObjName(Abc_NtkBox(pNtk2,i)) ) != 0 )
+        if ( strcmp( Abc_ObjName(Abc_ObjFanout0(pObj1)), Abc_ObjName(Abc_ObjFanout0(Abc_NtkBox(pNtk2,i))) ) != 0 )
         {
             printf( "Box #%d is different in network 1 ( \"%s\") and in network 2 (\"%s\").\n", 
-                i, Abc_ObjName(pObj1), Abc_ObjName(Abc_NtkBox(pNtk2,i)) );
+                i, Abc_ObjName(Abc_ObjFanout0(pObj1)), Abc_ObjName(Abc_ObjFanout0(Abc_NtkBox(pNtk2,i))) );
             return 0;
         }
     }

src/base/abc/abcNames.c

@@ -320,7 +320,7 @@ void Abc_NtkOrderObjsByName( Abc_Ntk_t * pNtk, int fComb )
     Abc_NtkForEachPo( pNtk, pObj, i )
         pObj->pCopy = (Abc_Obj_t *)Abc_ObjName(pObj);
     Abc_NtkForEachBox( pNtk, pObj, i )
-        pObj->pCopy = (Abc_Obj_t *)Abc_ObjName(pObj);
+        pObj->pCopy = (Abc_Obj_t *)Abc_ObjName(Abc_ObjFanout0(pObj));
     // order objects alphabetically
     qsort( (void *)Vec_PtrArray(pNtk->vPis), Vec_PtrSize(pNtk->vPis), sizeof(Abc_Obj_t *), 
         (int (*)(const void *, const void *)) Abc_NodeCompareNames );

src/base/abci/abc.c

@@ -7542,7 +7542,7 @@ int Abc_CommandIf( Abc_Frame_t * pAbc, int argc, char ** argv )
     pPars->fTruth      =  0;
     pPars->nLatches    =  pNtk? Abc_NtkLatchNum(pNtk) : 0;
     pPars->fLiftLeaves =  0;
-    pPars->pLutLib     =  NULL; // Abc_FrameReadLibLut();
+    pPars->pLutLib     =  Abc_FrameReadLibLut();
     pPars->pTimesArr   =  NULL; 
     pPars->pTimesArr   =  NULL;   
     pPars->pFuncCost   =  NULL;   
@@ -7562,6 +7562,8 @@ int Abc_CommandIf( Abc_Frame_t * pAbc, int argc, char ** argv )
             globalUtilOptind++;
             if ( pPars->nLutSize < 0 ) 
                 goto usage;
+            // if the LUT size is specified, disable library
+            pPars->pLutLib = NULL; 
             break;
         case 'C':
             if ( globalUtilOptind >= argc )
@@ -7709,7 +7711,7 @@ usage:
         sprintf( LutSize, "library" );
     else
         sprintf( LutSize, "%d", pPars->nLutSize );
-    fprintf( pErr, "usage: if [-K num] [-C num] [-D float] [-pafrstvh]\n" );
+    fprintf( pErr, "usage: if [-K num] [-C num] [-D float] [-pafrsvh]\n" );
     fprintf( pErr, "\t           performs FPGA technology mapping of the network\n" );
     fprintf( pErr, "\t-K num   : the number of LUT inputs (2 < num < %d) [default = %s]\n", IF_MAX_LUTSIZE+1, LutSize );
     fprintf( pErr, "\t-C num   : the max number of cuts to use (1 < num < 2^12) [default = %d]\n", pPars->nCutsMax );
@@ -7720,7 +7722,7 @@ usage:
     fprintf( pErr, "\t-r       : enables expansion/reduction of the best cuts [default = %s]\n", pPars->fExpRed? "yes": "no" );
     fprintf( pErr, "\t-l       : optimizes latch paths for delay, other paths for area [default = %s]\n", pPars->fLatchPaths? "yes": "no" );
     fprintf( pErr, "\t-s       : toggles sequential mapping [default = %s]\n", pPars->fSeqMap? "yes": "no" );
-    fprintf( pErr, "\t-t       : toggles the use of true sequential cuts [default = %s]\n", pPars->fLiftLeaves? "yes": "no" );
+//    fprintf( pErr, "\t-t       : toggles the use of true sequential cuts [default = %s]\n", pPars->fLiftLeaves? "yes": "no" );
     fprintf( pErr, "\t-v       : toggles verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" );
     fprintf( pErr, "\t-h       : prints the command usage\n");
     return 1;

src/base/abci/abcPrint.c

@@ -124,7 +124,7 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
 /*
     {
         FILE * pTable;
-        pTable = fopen( "a/seqmap__stats.txt", "a+" );
+        pTable = fopen( "iscas/seqmap__stats.txt", "a+" );
         fprintf( pTable, "%s ",  pNtk->pName );
         fprintf( pTable, "%d ", Abc_NtkPiNum(pNtk) );
         fprintf( pTable, "%d ", Abc_NtkPoNum(pNtk) );

src/base/io/io.h

@@ -51,6 +51,8 @@ extern "C" {
 
 /*=== abcRead.c ==========================================================*/
 extern Abc_Ntk_t *        Io_Read( char * pFileName, int fCheck );
+/*=== abcReadAiger.c ==========================================================*/
+extern Abc_Ntk_t *        Io_ReadAiger( char * pFileName, int fCheck );
 /*=== abcReadBaf.c ==========================================================*/
 extern Abc_Ntk_t *        Io_ReadBaf( char * pFileName, int fCheck );
 /*=== abcReadBlif.c ==========================================================*/
@@ -75,6 +77,8 @@ extern Abc_Obj_t *        Io_ReadCreateConst( Abc_Ntk_t * pNtk, char * pName, bo
 extern Abc_Obj_t *        Io_ReadCreateInv( Abc_Ntk_t * pNtk, char * pNameIn, char * pNameOut );
 extern Abc_Obj_t *        Io_ReadCreateBuf( Abc_Ntk_t * pNtk, char * pNameIn, char * pNameOut );
 extern FILE *             Io_FileOpen( const char * FileName, const char * PathVar, const char * Mode, int fVerbose );
+/*=== abcWriteAiger.c ==========================================================*/
+extern void               Io_WriteAiger( Abc_Ntk_t * pNtk, char * pFileName );
 /*=== abcWriteBaf.c ==========================================================*/
 extern void               Io_WriteBaf( Abc_Ntk_t * pNtk, char * pFileName );
 /*=== abcWriteBlif.c ==========================================================*/

src/base/io/ioRead.c

@@ -60,6 +60,8 @@ Abc_Ntk_t * Io_Read( char * pFileName, int fCheck )
         pNtk = Io_ReadEqn( pFileName, fCheck );
     else if ( Extra_FileNameCheckExtension( pFileName, "baf" ) )
         return Io_ReadBaf( pFileName, fCheck );
+    else if ( Extra_FileNameCheckExtension( pFileName, "aig" ) )
+        return Io_ReadAiger( pFileName, fCheck );
     else 
     {
         fprintf( stderr, "Unknown file format\n" );

src/base/io/ioReadAiger.c

+/**CFile****************************************************************
+
+  FileName    [ioReadAiger.c]
+
+  SystemName  [ABC: Logic synthesis and verification system.]
+
+  PackageName [Command processing package.]
+
+  Synopsis    [Procedures to read binary AIGER format developed by
+  Armin Biere, Johannes Kepler University (http://fmv.jku.at/)]
+
+  Author      [Alan Mishchenko]
+  
+  Affiliation [UC Berkeley]
+
+  Date        [Ver. 1.0. Started - December 16, 2006.]
+
+  Revision    [$Id: ioReadAiger.c,v 1.00 2006/12/16 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "io.h"
+
+////////////////////////////////////////////////////////////////////////
+///                        DECLARATIONS                              ///
+////////////////////////////////////////////////////////////////////////
+
+static unsigned Io_ReadAigerDecode( char ** ppPos );
+
+////////////////////////////////////////////////////////////////////////
+///                     FUNCTION DEFINITIONS                         ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+  Synopsis    [Reads the AIG in the binary AIGER format.]
+
+  Description []
+  
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+Abc_Ntk_t * Io_ReadAiger( char * pFileName, int fCheck )
+{
+    ProgressBar * pProgress;
+    FILE * pFile;
+    Vec_Ptr_t * vNodes, * vTerms;
+    Abc_Obj_t * pObj, * pNode0, * pNode1;
+    Abc_Ntk_t * pNtkNew;
+    int nTotal, nInputs, nOutputs, nLatches, nAnds, nFileSize, iTerm, nDigits, i;
+    char * pContents, * pDrivers, * pSymbols, * pCur, * pName, * pType;
+    unsigned uLit0, uLit1, uLit;
+
+    // read the file into the buffer
+    nFileSize = Extra_FileSize( pFileName );
+    pFile = fopen( pFileName, "rb" );
+    pContents = ALLOC( char, nFileSize );
+    fread( pContents, nFileSize, 1, pFile );
+    fclose( pFile );
+
+    // check if the input file format is correct
+    if ( strncmp(pContents, "aig", 3) != 0 )
+    {
+        fprintf( stdout, "Wrong input file format." );
+        return NULL;
+    }
+
+    // allocate the empty AIG
+    pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
+    pName = Extra_FileNameGeneric( pFileName );
+    pNtkNew->pName = Extra_UtilStrsav( pName );
+    pNtkNew->pSpec = Extra_UtilStrsav( pFileName );
+    free( pName );
+
+
+    // read the file type
+    pCur = pContents;         while ( *pCur++ != ' ' );
+    // read the number of objects
+    nTotal = atoi( pCur );    while ( *pCur++ != ' ' );
+    // read the number of inputs
+    nInputs = atoi( pCur );   while ( *pCur++ != ' ' );
+    // read the number of latches
+    nLatches = atoi( pCur );  while ( *pCur++ != ' ' );
+    // read the number of outputs
+    nOutputs = atoi( pCur );  while ( *pCur++ != ' ' );
+    // read the number of nodes
+    nAnds = atoi( pCur );     while ( *pCur++ != '\n' );  
+    // check the parameters
+    if ( nTotal != nInputs + nLatches + nAnds )
+    {
+        fprintf( stdout, "The paramters are wrong." );
+        return NULL;
+    }
+
+    // prepare the array of nodes
+    vNodes = Vec_PtrAlloc( 1 + nInputs + nLatches + nAnds );
+    Vec_PtrPush( vNodes, Abc_AigConst1(pNtkNew) );
+
+    // create the PIs
+    for ( i = 0; i < nInputs; i++ )
+    {
+        pObj = Abc_NtkCreatePi(pNtkNew);    
+        Vec_PtrPush( vNodes, pObj );
+    }
+    // create the POs
+    for ( i = 0; i < nOutputs; i++ )
+    {
+        pObj = Abc_NtkCreatePo(pNtkNew);   
+    }
+    // create the latches
+    nDigits = Extra_Base10Log( nLatches );
+    for ( i = 0; i < nLatches; i++ )
+    {
+        pObj = Abc_NtkCreateLatch(pNtkNew);
+        Abc_LatchSetInit0( pObj );
+        pNode0 = Abc_NtkCreateBi(pNtkNew);
+        pNode1 = Abc_NtkCreateBo(pNtkNew);
+        Abc_ObjAddFanin( pObj, pNode0 );
+        Abc_ObjAddFanin( pNode1, pObj );
+        Vec_PtrPush( vNodes, pNode1 );
+        // assign names to latch and its input
+        Abc_ObjAssignName( pObj, Abc_ObjNameDummy("_L", i, nDigits), NULL );
+    } 
+    
+    // remember the beginning of latch/PO literals
+    pDrivers = pCur;
+
+    // scroll to the beginning of the binary data
+    for ( i = 0; i < nLatches + nOutputs; )
+        if ( *pCur++ == '\n' )
+            i++;
+
+    // create the AND gates
+    pProgress = Extra_ProgressBarStart( stdout, nAnds );
+    for ( i = 0; i < nAnds; i++ )
+    {
+        Extra_ProgressBarUpdate( pProgress, i, NULL );
+        uLit = ((i + 1 + nInputs + nLatches) << 1);
+        uLit1 = uLit  - Io_ReadAigerDecode( &pCur );
+        uLit0 = uLit1 - Io_ReadAigerDecode( &pCur );
+        assert( uLit1 > uLit0 );
+        pNode0 = Abc_ObjNotCond( Vec_PtrEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
+        pNode1 = Abc_ObjNotCond( Vec_PtrEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
+        assert( Vec_PtrSize(vNodes) == i + 1 + nInputs + nLatches );
+        Vec_PtrPush( vNodes, Abc_AigAnd(pNtkNew->pManFunc, pNode0, pNode1) );
+    }
+    Extra_ProgressBarStop( pProgress );
+
+    // remember the place where symbols begin
+    pSymbols = pCur;
+
+    // read the latch driver literals
+    pCur = pDrivers;
+    Abc_NtkForEachLatchInput( pNtkNew, pObj, i )
+    {
+        uLit0 = atoi( pCur );  while ( *pCur++ != '\n' );
+        pNode0 = Abc_ObjNotCond( Vec_PtrEntry(vNodes, uLit0 >> 1), (uLit0 & 1) ^ (uLit0 < 2) );
+        Abc_ObjAddFanin( pObj, pNode0 );
+    }
+    // read the PO driver literals
+    Abc_NtkForEachPo( pNtkNew, pObj, i )
+    {
+        uLit0 = atoi( pCur );  while ( *pCur++ != '\n' );
+        pNode0 = Abc_ObjNotCond( Vec_PtrEntry(vNodes, uLit0 >> 1), (uLit0 & 1) ^ (uLit0 < 2) );
+        Abc_ObjAddFanin( pObj, pNode0 );
+    }
+
+    // read the names if present
+    pCur = pSymbols;
+    while ( pCur < pContents + nFileSize && *pCur != 'c' )
+    {
+        // get the terminal type
+        pType = pCur;
+        if ( *pCur == 'i' )
+            vTerms = pNtkNew->vPis;
+        else if ( *pCur == 'l' )
+            vTerms = pNtkNew->vBoxes;
+        else if ( *pCur == 'o' )
+            vTerms = pNtkNew->vPos;
+        else
+        {
+            fprintf( stdout, "Wrong terminal type." );
+            return NULL;
+        }
+        // get the terminal number
+        iTerm = atoi( ++pCur );  while ( *pCur++ != ' ' );
+        // get the node
+        if ( iTerm >= Vec_PtrSize(vTerms) )
+        {
+            fprintf( stdout, "The number of terminal is out of bound." );
+            return NULL;
+        }
+        pObj = Vec_PtrEntry( vTerms, iTerm );
+        if ( *pType == 'l' )
+            pObj = Abc_ObjFanout0(pObj);
+        // assign the name
+        pName = pCur;          while ( *pCur++ != '\n' );
+        // assign this name
+        *(pCur-1) = 0;
+        Abc_ObjAssignName( pObj, pName, NULL );
+        if ( *pType == 'l' )
+            Abc_ObjAssignName( Abc_ObjFanin0(Abc_ObjFanin0(pObj)), Abc_ObjName(pObj), "L" );
+        // mark the node as named
+        pObj->pCopy = (Abc_Obj_t *)Abc_ObjName(pObj);
+    }
+    // skipping the comments
+    free( pContents );
+    Vec_PtrFree( vNodes );
+
+    // assign the remaining names
+    Abc_NtkForEachPi( pNtkNew, pObj, i )
+    {
+        if ( pObj->pCopy ) continue;
+        Abc_ObjAssignName( pObj, Abc_ObjName(pObj), NULL );
+    }
+    Abc_NtkForEachLatchOutput( pNtkNew, pObj, i )
+    {
+        if ( pObj->pCopy ) continue;
+        Abc_ObjAssignName( pObj, Abc_ObjName(pObj), NULL );
+        Abc_ObjAssignName( Abc_ObjFanin0(Abc_ObjFanin0(pObj)), Abc_ObjName(pObj), NULL );
+    }
+    Abc_NtkForEachPo( pNtkNew, pObj, i )
+    {
+        if ( pObj->pCopy ) continue;
+        Abc_ObjAssignName( pObj, Abc_ObjName(pObj), NULL );
+    }
+
+    // remove the extra nodes
+//    Abc_AigCleanup( pNtkNew->pManFunc );
+
+    // check the result
+    if ( fCheck && !Abc_NtkCheckRead( pNtkNew ) )
+    {
+        printf( "Io_ReadAiger: The network check has failed.\n" );
+        Abc_NtkDelete( pNtkNew );
+        return NULL;
+    }
+    return pNtkNew;
+}
+
+
+/**Function*************************************************************
+
+  Synopsis    [Extracts one unsigned AIG edge from the input buffer.]
+
+  Description [This procedure is a slightly modified version of Armin Biere's
+  procedure "unsigned decode (FILE * file)". ]
+  
+  SideEffects [Updates the current reading position.]
+
+  SeeAlso     []
+
+***********************************************************************/
+unsigned Io_ReadAigerDecode( char ** ppPos )
+{
+    unsigned x = 0, i = 0;
+    unsigned char ch;
+
+//    while ((ch = getnoneofch (file)) & 0x80)
+    while ((ch = *(*ppPos)++) & 0x80)
+        x |= (ch & 0x7f) << (7 * i++);
+
+    return x | (ch << (7 * i));
+}
+
+
+////////////////////////////////////////////////////////////////////////
+///                       END OF FILE                                ///
+////////////////////////////////////////////////////////////////////////
+
+

src/base/io/ioReadBaf.c

@@ -30,7 +30,7 @@
 
 /**Function*************************************************************
 
-  Synopsis    [Writes the AIG in the binary format.]
+  Synopsis    [Reads the AIG in the binary format.]
 
   Description []
   
@@ -150,7 +150,7 @@ Abc_Ntk_t * Io_ReadBaf( char * pFileName, int fCheck )
     Vec_PtrFree( vNodes );
 
     // remove the extra nodes
-    Abc_AigCleanup( pNtkNew->pManFunc );
+//    Abc_AigCleanup( pNtkNew->pManFunc );
 
     // check the result
     if ( fCheck && !Abc_NtkCheckRead( pNtkNew ) )

src/base/io/module.make

 SRC +=  src/base/io/io.c \
     src/base/io/ioRead.c \
+    src/base/io/ioReadAiger.c \
     src/base/io/ioReadBaf.c \
     src/base/io/ioReadBench.c \
     src/base/io/ioReadBlif.c \
@@ -8,6 +9,7 @@ SRC +=  src/base/io/io.c \
     src/base/io/ioReadPla.c \
     src/base/io/ioReadVerilog.c \
     src/base/io/ioUtil.c \
+    src/base/io/ioWriteAiger.c \
     src/base/io/ioWriteBaf.c \
     src/base/io/ioWriteBench.c \
     src/base/io/ioWriteBlif.c \

src/map/fpga/fpgaCutUtils.c

@@ -340,7 +340,7 @@ float Fpga_CutGetAreaRefed( Fpga_Man_t * pMan, Fpga_Cut_t * pCut )
         return 0;
     aResult  = Fpga_CutDeref( pMan, NULL, pCut, 0 );
     aResult2 = Fpga_CutRef( pMan, NULL, pCut, 0 );
-    assert( aResult == aResult2 );
+    assert( Fpga_FloatEqual( pMan, aResult, aResult2 ) );
     return aResult;
 }
 
@@ -362,7 +362,7 @@ float Fpga_CutGetAreaDerefed( Fpga_Man_t * pMan, Fpga_Cut_t * pCut )
         return 0;
     aResult2 = Fpga_CutRef( pMan, NULL, pCut, 0 );
     aResult  = Fpga_CutDeref( pMan, NULL, pCut, 0 );
-    assert( aResult == aResult2 );
+    assert( Fpga_FloatEqual( pMan, aResult, aResult2 ) );
     return aResult;
 }
 

src/map/fpga/fpgaInt.h

@@ -278,6 +278,10 @@ struct Fpga_NodeVecStruct_t_
           pFanout  = pFanout2,                                   \
           pFanout2 = Fpga_NodeReadNextFanout(pNode, pFanout) )
 
+static inline Fpga_FloatMoreThan( Fpga_Man_t * p, float Arg1, float Arg2 ) { return Arg1 > Arg2 + p->fEpsilon; }
+static inline Fpga_FloatLessThan( Fpga_Man_t * p, float Arg1, float Arg2 ) { return Arg1 < Arg2 - p->fEpsilon; }
+static inline Fpga_FloatEqual( Fpga_Man_t * p, float Arg1, float Arg2 )    { return Arg1 > Arg2 - p->fEpsilon && Arg1 < Arg2 + p->fEpsilon; }
+
 ////////////////////////////////////////////////////////////////////////
 ///                       GLOBAL VARIABLES                           ///
 ////////////////////////////////////////////////////////////////////////

src/map/fpga/fpgaMatch.c

@@ -140,7 +140,7 @@ clk = clock();
         Fpga_CutGetParameters( p, pCut );
 //p->time2 += clock() - clk;
         // drop the cut if it does not meet the required times
-        if ( pCut->tArrival > pNode->tRequired )
+        if ( Fpga_FloatMoreThan(p, pCut->tArrival, pNode->tRequired) )
             continue;
         // if no cut is assigned, use the current one
         if ( pNode->pCutBest == NULL )
@@ -152,11 +152,11 @@ clk = clock();
         // (1) delay oriented mapping (first traversal), delay first, area-flow as a tie-breaker
         // (2) area recovery (subsequent traversals), area-flow first, delay as a tie-breaker
         if ( (fDelayOriented && 
-               (pNode->pCutBest->tArrival >  pCut->tArrival || 
-                pNode->pCutBest->tArrival == pCut->tArrival && pNode->pCutBest->aFlow > pCut->aFlow)) ||
+               (Fpga_FloatMoreThan(p, pNode->pCutBest->tArrival, pCut->tArrival) || 
+                Fpga_FloatEqual(p, pNode->pCutBest->tArrival, pCut->tArrival) && Fpga_FloatMoreThan(p, pNode->pCutBest->aFlow, pCut->aFlow) )) ||
              (!fDelayOriented && 
-               (pNode->pCutBest->aFlow >  pCut->aFlow || 
-                pNode->pCutBest->aFlow == pCut->aFlow && pNode->pCutBest->tArrival > pCut->tArrival))  )
+               (Fpga_FloatMoreThan(p, pNode->pCutBest->aFlow, pCut->aFlow) || 
+                Fpga_FloatEqual(p, pNode->pCutBest->aFlow, pCut->aFlow) && Fpga_FloatMoreThan(p, pNode->pCutBest->tArrival, pCut->tArrival)))  )
         {
             pNode->pCutBest = pCut;
         }
@@ -289,7 +289,7 @@ clk = clock();
         pCut->tArrival = Fpga_TimeCutComputeArrival( p, pCut );
 //p->time2 += clock() - clk;
         // drop the cut if it does not meet the required times
-        if ( pCut->tArrival > pNode->tRequired )
+        if ( Fpga_FloatMoreThan( p, pCut->tArrival, pNode->tRequired ) )
             continue;
         // get the area of this cut
         pCut->aFlow = Fpga_CutGetAreaDerefed( p, pCut );
@@ -300,8 +300,8 @@ clk = clock();
             continue;
         }
         // choose the best cut as follows: exact area first, delay as a tie-breaker
-        if ( pNode->pCutBest->aFlow >  pCut->aFlow || 
-             pNode->pCutBest->aFlow == pCut->aFlow && pNode->pCutBest->tArrival > pCut->tArrival  )
+        if ( Fpga_FloatMoreThan(p, pNode->pCutBest->aFlow, pCut->aFlow) || 
+             Fpga_FloatEqual(p, pNode->pCutBest->aFlow, pCut->aFlow) && Fpga_FloatMoreThan(p, pNode->pCutBest->tArrival, pCut->tArrival) )
         {
             pNode->pCutBest = pCut;
         }
@@ -410,7 +410,7 @@ clk = clock();
         pCut->tArrival = Fpga_TimeCutComputeArrival( p, pCut );
 //p->time2 += clock() - clk;
         // drop the cut if it does not meet the required times
-        if ( pCut->tArrival > pNode->tRequired )
+        if ( Fpga_FloatMoreThan( p, pCut->tArrival, pNode->tRequired ) )
             continue;
         // get the area of this cut
         pCut->aFlow = Fpga_CutGetSwitchDerefed( p, pNode, pCut );
@@ -421,8 +421,8 @@ clk = clock();
             continue;
         }
         // choose the best cut as follows: exact area first, delay as a tie-breaker
-        if ( pNode->pCutBest->aFlow >  pCut->aFlow || 
-             pNode->pCutBest->aFlow == pCut->aFlow && pNode->pCutBest->tArrival > pCut->tArrival  )
+        if ( Fpga_FloatMoreThan(p, pNode->pCutBest->aFlow, pCut->aFlow) || 
+             Fpga_FloatEqual(p, pNode->pCutBest->aFlow, pCut->aFlow) && Fpga_FloatMoreThan(p, pNode->pCutBest->tArrival, pCut->tArrival) )
         {
             pNode->pCutBest = pCut;
         }

src/map/if/if.h

@@ -273,10 +273,10 @@ static inline float      If_CutLutArea( If_Man_t * p, If_Cut_t * pCut )      { r
 #define If_ObjForEachCutStart( pObj, pCut, i, Start )                          \
     for ( i = Start; (i < (int)(pObj)->nCuts) && ((pCut) = (pObj)->Cuts + i); i++ )
 // iterator over the leaves of the cut
-//#define If_CutForEachLeaf( p, pCut, pLeaf, i )                                 \
-//    for ( i = 0; (i < (int)(pCut)->nLeaves) && ((pLeaf) = If_ManObj(p, (pCut)->pLeaves[i])); i++ )
 #define If_CutForEachLeaf( p, pCut, pLeaf, i )                                 \
-    for ( i = 0; (i < (int)(pCut)->nLeaves) && ((pLeaf) = If_ManObj(p, p->pPars->fLiftLeaves? (pCut)->pLeaves[i] >> 8 : (pCut)->pLeaves[i])); i++ )
+    for ( i = 0; (i < (int)(pCut)->nLeaves) && ((pLeaf) = If_ManObj(p, (pCut)->pLeaves[i])); i++ )
+//#define If_CutForEachLeaf( p, pCut, pLeaf, i )                                 \
+//    for ( i = 0; (i < (int)(pCut)->nLeaves) && ((pLeaf) = If_ManObj(p, p->pPars->fLiftLeaves? (pCut)->pLeaves[i] >> 8 : (pCut)->pLeaves[i])); i++ )
 // iterator over the leaves of the sequential cut
 #define If_CutForEachLeafSeq( p, pCut, pLeaf, Shift, i )                       \
     for ( i = 0; (i < (int)(pCut)->nLeaves) && ((pLeaf) = If_ManObj(p, (pCut)->pLeaves[i] >> 8)) && (((Shift) = ((pCut)->pLeaves[i] & 255)) >= 0); i++ )

src/map/if/ifCut.c

@@ -257,9 +257,11 @@ static inline int If_CutMergeOrdered2( If_Cut_t * pC0, If_Cut_t * pC1, If_Cut_t
         pC->pLeaves[k++] = pC1->pLeaves[i];
         pC->nLeaves++;
     }
+/*
     assert( pC->nLeaves <= pC->nLimit );
     for ( i = 1; i < (int)pC->nLeaves; i++ )
         assert( pC->pLeaves[i-1] < pC->pLeaves[i] );
+*/
     return 1;
 }
 
@@ -574,7 +576,8 @@ float If_CutAreaDerefed( If_Man_t * p, If_Cut_t * pCut, int nLevels )
     assert( p->pPars->fSeqMap || pCut->nLeaves > 1 );
     aResult2 = If_CutRef( p, pCut, nLevels );
     aResult  = If_CutDeref( p, pCut, nLevels );
-    assert( aResult == aResult2 );
+    assert( aResult > aResult2 - p->fEpsilon );
+    assert( aResult < aResult2 + p->fEpsilon );
     return aResult;
 }
 
@@ -595,7 +598,8 @@ float If_CutAreaRefed( If_Man_t * p, If_Cut_t * pCut, int nLevels )
     assert( p->pPars->fSeqMap || pCut->nLeaves > 1 );
     aResult2 = If_CutDeref( p, pCut, nLevels );
     aResult  = If_CutRef( p, pCut, nLevels );
-    assert( aResult == aResult2 );
+    assert( aResult > aResult2 - p->fEpsilon );
+    assert( aResult < aResult2 + p->fEpsilon );
     return aResult;
 }
 

src/map/if/ifMap.c

@@ -189,6 +189,7 @@ void If_ObjPerformMappingChoice( If_Man_t * p, If_Obj_t * pObj, int Mode )
     pCut = p->ppCuts[iCut];
     // generate cuts
     for ( pTemp = pObj; pTemp; pTemp = pTemp->pEquiv )
+    {
         If_ObjForEachCutStart( pTemp, pCutTemp, i, 1 )
         {
             assert( pTemp->nCuts > 1 );
@@ -221,6 +222,10 @@ void If_ObjPerformMappingChoice( If_Man_t * p, If_Obj_t * pObj, int Mode )
             if ( p->nCuts >= p->pPars->nCutsMax * p->pPars->nCutsMax )
                 break;
         }
+        // quit if we exceeded the number of cuts
+        if ( p->nCuts >= p->pPars->nCutsMax * p->pPars->nCutsMax )
+            break;
+    }
     assert( p->nCuts > 0 );
     // sort if we have more cuts
     If_ManSortCuts( p, Mode );

src/map/if/ifSeq.c

@@ -96,7 +96,7 @@ int If_ManPerformMappingSeq( If_Man_t * p )
     // print the statistic into a file
     {
         FILE * pTable;
-        pTable = fopen( "a/seqmap__stats.txt", "a+" );
+        pTable = fopen( "iscas/seqmap__stats.txt", "a+" );
         fprintf( pTable, "%d ", p->Period );
         fprintf( pTable, "\n" );
         fclose( pTable );
@@ -198,7 +198,7 @@ int If_ManBinarySearchPeriod( If_Man_t * p, int Mode )
     // report the results
     if ( p->pPars->fVerbose )
     {
-        p->AreaGlo = p->pPars->fLiftLeaves? If_ManScanMappingSeq(p) : If_ManScanMapping(p);
+        p->AreaGlo = p->pPars->fLiftLeaves? 0/*If_ManScanMappingSeq(p)*/ : If_ManScanMapping(p);
         printf( "Attempt = %2d.  Iters = %3d.  Area = %10.2f.  Fi = %6.2f.  ", p->nAttempts, c, p->AreaGlo, (float)p->Period );
         if ( fConverged )
             printf( "  Feasible" );
@@ -358,7 +358,9 @@ int If_ManPrepareMappingSeq( If_Man_t * p )
             pCut->Delay  -= p->Period;
             pCut->fCompl ^= pObj->fCompl0;
 
-            pTemp = If_ManObj(p, pCut->pLeaves[0] >> 8);
+            // there is a bug here, which shows when there are choices...
+//            pTemp = If_ManObj(p, pCut->pLeaves[0] >> 8);
+            pTemp = If_ManObj(p, pCut->pLeaves[0]);
             assert( !If_ObjIsLatch(pTemp) );
         }
     }

src/map/if/ifTime.c

@@ -186,7 +186,7 @@ void If_CutSortInputPins( If_Man_t * p, If_Cut_t * pCut, int * pPinPerm, float *
     If_Obj_t * pLeaf;
     int i, j, best_i, temp;
     // start the trivial permutation and collect pin delays
-    If_CutForEachLeaf( p, pCut, pLeaf, i );
+    If_CutForEachLeaf( p, pCut, pLeaf, i )
     {
         pPinPerm[i] = i;
         pPinDelays[i] = If_ObjCutBest(pLeaf)->Delay;
@@ -206,8 +206,12 @@ void If_CutSortInputPins( If_Man_t * p, If_Cut_t * pCut, int * pPinPerm, float *
         pPinPerm[best_i] = temp;
     }
     // verify
+    assert( pPinPerm[0] < pCut->nLeaves );
     for ( i = 1; i < (int)pCut->nLeaves; i++ )
+    {
+        assert( pPinPerm[i] < (int)pCut->nLeaves );
         assert( pPinDelays[pPinPerm[i-1]] >= pPinDelays[pPinPerm[i]] );
+    }
 }
 
 ////////////////////////////////////////////////////////////////////////

src/map/if/ifUtil.c

@@ -269,7 +269,11 @@ float If_ManScanMappingSeq_rec( If_Man_t * p, If_Obj_t * pObj, Vec_Ptr_t * vMapp
     If_Cut_t * pCutBest;
     float aArea;
     int i, Shift;
-    if ( pObj->nRefs++ || If_ObjIsCi(pObj) || If_ObjIsConst1(pObj) )
+    // treat latches transparently
+    if ( If_ObjIsLatch(pObj) )
+        return If_ManScanMappingSeq_rec( p, If_ObjFanin0(pObj), vMapped );
+    // consider trivial cases
+    if ( pObj->nRefs++ || If_ObjIsPi(pObj) || If_ObjIsConst1(pObj) )
         return 0.0;
     // store the node in the structure by level
     assert( If_ObjIsAnd(pObj) );

src/misc/vec/vecPtr.h

@@ -388,10 +388,11 @@ static inline void Vec_PtrFillExtra( Vec_Ptr_t * p, int nSize, void * Entry )
     int i;
     if ( p->nSize >= nSize )
         return;
-    if ( p->nSize < 2 * nSize )
+    assert( p->nSize < nSize );
+    if ( 2 * p->nSize > nSize )
         Vec_PtrGrow( p, 2 * nSize );
     else
-        Vec_PtrGrow( p, p->nSize );
+        Vec_PtrGrow( p, nSize );
     for ( i = p->nSize; i < nSize; i++ )
         p->pArray[i] = Entry;
     p->nSize = nSize;

src/opt/ret/retLvalue.c

@@ -127,6 +127,14 @@ clkIter = clock() - clk;
         NodeLag = Abc_NodeComputeLag( Abc_NodeGetLValue(pNode), FiBest );
         Vec_IntWriteEntry( vLags, pNode->Id, NodeLag );
     }
+/*
+    Abc_NtkForEachPo( pNtk, pNode, i )
+        printf( "%d ", Abc_NodeGetLValue(Abc_ObjFanin0(pNode)) );
+    printf( "\n" );
+    Abc_NtkForEachLatch( pNtk, pNode, i )
+        printf( "%d/%d ", Abc_NodeGetLValue(Abc_ObjFanout0(pNode)), Abc_NodeGetLValue(Abc_ObjFanout0(pNode)) + FiBest );
+    printf( "\n" );
+*/
 
     // print the result
 //    if ( fVerbose )
@@ -134,7 +142,7 @@ clkIter = clock() - clk;
 /*
     {
         FILE * pTable;
-        pTable = fopen( "a/seqmap__stats.txt", "a+" );
+        pTable = fopen( "iscas/seqmap__stats2.txt", "a+" );
         fprintf( pTable, "%d ", FiBest );
         fprintf( pTable, "\n" );
         fclose( pTable );

src/opt/rwr/rwrEva.c

@@ -28,6 +28,7 @@
 static Dec_Graph_t * Rwr_CutEvaluate( Rwr_Man_t * p, Abc_Obj_t * pRoot, Cut_Cut_t * pCut, Vec_Ptr_t * vFaninsCur, int nNodesSaved, int LevelMax, int * pGainBest );
 static int Rwr_CutIsBoolean( Abc_Obj_t * pObj, Vec_Ptr_t * vLeaves );
 static int Rwr_CutCountNumNodes( Abc_Obj_t * pObj, Cut_Cut_t * pCut );
+static int Rwr_NodeGetDepth_rec( Abc_Obj_t * pObj, Vec_Ptr_t * vLeaves );
 
 ////////////////////////////////////////////////////////////////////////
 ///                     FUNCTION DEFINITIONS                         ///
@@ -186,6 +187,13 @@ p->timeRes += clock() - clk;
     // copy the leaves
     Vec_PtrForEachEntry( p->vFanins, pFanin, i )
         Dec_GraphNode(p->pGraph, i)->pFunc = pFanin;
+/*
+    printf( "(" );
+    Vec_PtrForEachEntry( p->vFanins, pFanin, i )
+        printf( " %d", Abc_ObjRegular(pFanin)->vFanouts.nSize - 1 );
+    printf( " )  " );
+*/
+//    printf( "%d ", Rwr_NodeGetDepth_rec( pNode, p->vFanins ) );
 
     p->nScores[p->pMap[uTruthBest]]++;
     p->nNodesGained += GainBest;
@@ -384,6 +392,32 @@ int Rwr_CutCountNumNodes( Abc_Obj_t * pObj, Cut_Cut_t * pCut )
     return Counter;
 }
 
+
+/**Function*************************************************************
+
+  Synopsis    [Returns depth of the cut.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+int Rwr_NodeGetDepth_rec( Abc_Obj_t * pObj, Vec_Ptr_t * vLeaves )
+{
+    Abc_Obj_t * pLeaf;
+    int i, Depth0, Depth1;
+    if ( Abc_ObjIsCi(pObj) )
+        return 0;
+    Vec_PtrForEachEntry( vLeaves, pLeaf, i )
+        if ( pObj == Abc_ObjRegular(pLeaf) )
+            return 0;
+    Depth0 = Rwr_NodeGetDepth_rec( Abc_ObjFanin0(pObj), vLeaves );
+    Depth1 = Rwr_NodeGetDepth_rec( Abc_ObjFanin1(pObj), vLeaves );
+    return 1 + ABC_MAX( Depth0, Depth1 );
+}
+
 ////////////////////////////////////////////////////////////////////////
 ///                       END OF FILE                                ///
 ////////////////////////////////////////////////////////////////////////