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Commit 6b6e5861 by Alan Mishchenko
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Integrating barrier buffers.

parent 6e59e4e5
Showing with 185 additions and 17 deletions
src/base/abc/abc.h
......@@ -671,6 +671,9 @@ extern ABC_DLL Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk
extern ABC_DLL Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk );
extern ABC_DLL Abc_Ntk_t * Abc_NtkInsertNewLogic( Abc_Ntk_t * pNtkH, Abc_Ntk_t * pNtkL );
extern ABC_DLL void Abc_NtkPrintBoxInfo( Abc_Ntk_t * pNtk );
/*=== abcHieGia.c ==========================================================*/
extern ABC_DLL Gia_Man_t * Abc_NtkFlattenHierarchyGia( Abc_Ntk_t * pNtk, Vec_Ptr_t ** pvBuffers, int fVerbose );
extern ABC_DLL void Abc_NtkInsertHierarchyGia( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew, int fVerbose );
/*=== abcLatch.c ==========================================================*/
extern ABC_DLL int Abc_NtkLatchIsSelfFeed( Abc_Obj_t * pLatch );
extern ABC_DLL int Abc_NtkCountSelfFeedLatches( Abc_Ntk_t * pNtk );
......
src/base/abc/abcHieGia.c
......@@ -86,7 +86,7 @@ int Abc_NodeStrashToGia( Gia_Man_t * pNew, Abc_Obj_t * pNode )
SeeAlso []
***********************************************************************/
void Gia_ManFlattenLogicHierarchy2_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int * pCounter, Vec_Int_t * vBufs )
void Abc_NtkFlattenHierarchyGia2_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int * pCounter, Vec_Int_t * vBufs )
{
Vec_Ptr_t * vDfs = (Vec_Ptr_t *)pNtk->pData;
Abc_Obj_t * pObj, * pTerm;
......@@ -112,7 +112,7 @@ void Gia_ManFlattenLogicHierarchy2_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int
if ( vBufs )
Abc_ObjForEachFanin( pObj, pTerm, k )
Abc_ObjFanout0(Abc_NtkPi(pModel, k))->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanout0(Abc_NtkPi(pModel, k))->iTemp );
Gia_ManFlattenLogicHierarchy2_rec( pNew, pModel, pCounter, vBufs );
Abc_NtkFlattenHierarchyGia2_rec( pNew, pModel, pCounter, vBufs );
if ( vBufs )
Abc_ObjForEachFanout( pObj, pTerm, k )
Abc_ObjFanin0(Abc_NtkPo(pModel, k))->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanin0(Abc_NtkPo(pModel, k))->iTemp );
......@@ -131,7 +131,7 @@ void Gia_ManFlattenLogicHierarchy2_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int
}
}
}
Gia_Man_t * Gia_ManFlattenLogicHierarchy2( Abc_Ntk_t * pNtk )
Gia_Man_t * Abc_NtkFlattenHierarchyGia2( Abc_Ntk_t * pNtk )
{
int fUseBufs = 1;
int fUseInter = 0;
......@@ -165,7 +165,7 @@ Gia_Man_t * Gia_ManFlattenLogicHierarchy2( Abc_Ntk_t * pNtk )
// call recursively
Gia_ManHashAlloc( pNew );
Gia_ManFlattenLogicHierarchy2_rec( pNew, pNtk, &Counter, pNew->vBarBufs );
Abc_NtkFlattenHierarchyGia2_rec( pNew, pNtk, &Counter, pNew->vBarBufs );
Gia_ManHashStop( pNew );
printf( "Hierarchy reader flattened %d instances of logic boxes.\n", Counter );
......@@ -230,7 +230,7 @@ int Gia_ManFlattenLogicPrepare( Abc_Ntk_t * pNtk )
}
return Abc_NtkPiNum(pNtk) + Abc_NtkPoNum(pNtk);
}
int Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc_Obj_t * pObj, Vec_Ptr_t * vBuffers )
int Abc_NtkFlattenHierarchyGia_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc_Obj_t * pObj, Vec_Ptr_t * vBuffers )
{
Abc_Ntk_t * pModel;
Abc_Obj_t * pBox, * pFanin;
......@@ -238,7 +238,7 @@ int Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc
if ( pObj->iTemp != -1 )
return pObj->iTemp;
if ( Abc_ObjIsNet(pObj) || Abc_ObjIsPo(pObj) || Abc_ObjIsBi(pObj) )
return (pObj->iTemp = Gia_ManFlattenLogicHierarchy_rec(pNew, vSupers, Abc_ObjFanin0(pObj), vBuffers));
return (pObj->iTemp = Abc_NtkFlattenHierarchyGia_rec(pNew, vSupers, Abc_ObjFanin0(pObj), vBuffers));
if ( Abc_ObjIsPi(pObj) )
{
pBox = (Abc_Obj_t *)Vec_PtrPop( vSupers );
......@@ -247,7 +247,7 @@ int Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc
assert( Abc_ObjFaninNum(pBox) == Abc_NtkPiNum(pModel) );
assert( pObj->iData >= 0 && pObj->iData < Abc_NtkPiNum(pModel) );
pFanin = Abc_ObjFanin( pBox, pObj->iData );
iLit = Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pFanin, vBuffers );
iLit = Abc_NtkFlattenHierarchyGia_rec( pNew, vSupers, pFanin, vBuffers );
Vec_PtrPush( vSupers, pBox );
//if ( vBuffers ) Vec_PtrPush( vBuffers, pFanin ); // save BI
if ( vBuffers ) Vec_PtrPush( vBuffers, pObj ); // save PI
......@@ -263,7 +263,7 @@ int Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc
assert( Abc_ObjFanoutNum(pBox) == Abc_NtkPoNum(pModel) );
assert( pObj->iData >= 0 && pObj->iData < Abc_NtkPoNum(pModel) );
pFanin = Abc_NtkPo( pModel, pObj->iData );
iLit = Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pFanin, vBuffers );
iLit = Abc_NtkFlattenHierarchyGia_rec( pNew, vSupers, pFanin, vBuffers );
Vec_PtrPop( vSupers );
//if ( vBuffers ) Vec_PtrPush( vBuffers, pObj ); // save BO
if ( vBuffers ) Vec_PtrPush( vBuffers, pFanin ); // save PO
......@@ -271,10 +271,10 @@ int Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc
}
assert( Abc_ObjIsNode(pObj) );
Abc_ObjForEachFanin( pObj, pFanin, i )
Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pFanin, vBuffers );
Abc_NtkFlattenHierarchyGia_rec( pNew, vSupers, pFanin, vBuffers );
return (pObj->iTemp = Abc_NodeStrashToGia( pNew, pObj ));
}
Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk, Vec_Ptr_t ** pvBuffers )
Gia_Man_t * Abc_NtkFlattenHierarchyGia( Abc_Ntk_t * pNtk, Vec_Ptr_t ** pvBuffers, int fVerbose )
{
int fUseBufs = 1;
Gia_Man_t * pNew, * pTemp;
......@@ -307,11 +307,11 @@ Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk, Vec_Ptr_t ** pvBuffe
vSupers = Vec_PtrAlloc( 100 );
Gia_ManHashAlloc( pNew );
Abc_NtkForEachPo( pNtk, pTerm, i )
Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pTerm, vBuffers );
Abc_NtkFlattenHierarchyGia_rec( pNew, vSupers, pTerm, vBuffers );
Gia_ManHashStop( pNew );
Vec_PtrFree( vSupers );
printf( "Hierarchy reader flattened %d instances of boxes and added %d barbufs (out of %d).\n",
pNtk->pDesign ? Vec_PtrSize(pNtk->pDesign->vModules)-1 : 0, Vec_PtrSize(vBuffers), &Counter );
pNtk->pDesign ? Vec_PtrSize(pNtk->pDesign->vModules)-1 : 0, Vec_PtrSize(vBuffers), Counter );
// create buffers and POs
Abc_NtkForEachPo( pNtk, pTerm, i )
......@@ -358,6 +358,8 @@ Abc_Obj_t * Gia_ManInsertOne_rec( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew, Abc_Obj_t
void Gia_ManInsertOne( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew )
{
Abc_Obj_t * pObj, * pBox; int i, k;
assert( !Abc_NtkHasMapping(pNtk) );
assert( Abc_NtkHasMapping(pNew) );
// check that PIs point to barbufs
Abc_NtkForEachPi( pNtk, pObj, i )
assert( !pObj->pCopy || Abc_ObjNtk(pObj->pCopy) == pNew );
......@@ -380,11 +382,15 @@ void Gia_ManInsertOne( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew )
Abc_NtkForEachPo( pNtk, pObj, i )
if ( Abc_ObjFaninNum(pObj) == 0 )
Abc_ObjAddFanin( pObj, Gia_ManInsertOne_rec(pNtk, pNew, pObj->pCopy) );
// update the functionality manager
pNtk->pManFunc = pNew->pManFunc;
pNtk->ntkFunc = pNew->ntkFunc;
assert( Abc_NtkHasMapping(pNtk) );
}
void Gia_ManInsertLogicHierarchy( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew )
void Abc_NtkInsertHierarchyGia( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew, int fVerbose )
{
Vec_Ptr_t * vBuffers;
Gia_Man_t * pGia = Gia_ManFlattenLogicHierarchy( pNtk, &vBuffers );
Gia_Man_t * pGia = Abc_NtkFlattenHierarchyGia( pNtk, &vBuffers, 0 );
Abc_Ntk_t * pModel;
Abc_Obj_t * pObj;
int i;
......@@ -422,7 +428,6 @@ void Gia_ManInsertLogicHierarchy( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNew )
Gia_ManInsertOne( pModel, pNew );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abci/abc.c
......@@ -333,6 +333,8 @@ static int Abc_CommandAbc9Read ( Abc_Frame_t * pAbc, int argc, cha
static int Abc_CommandAbc9ReadBlif ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9ReadCBlif ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9ReadStg ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9ReadVer ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9WriteVer ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Write ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Ps ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9PFan ( Abc_Frame_t * pAbc, int argc, char ** argv );
......@@ -937,6 +939,8 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "ABC9", "&read_blif", Abc_CommandAbc9ReadBlif, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&read_cblif", Abc_CommandAbc9ReadCBlif, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&read_stg", Abc_CommandAbc9ReadStg, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&read_ver", Abc_CommandAbc9ReadVer, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&write_ver", Abc_CommandAbc9WriteVer, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&w", Abc_CommandAbc9Write, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&ps", Abc_CommandAbc9Ps, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&pfan", Abc_CommandAbc9PFan, 0 );
......@@ -25693,6 +25697,82 @@ usage:
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9ReadVer( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Abc_Ntk_t * pNtk;
Gia_Man_t * pAig;
FILE * pFile;
char ** pArgvNew;
char * pFileName, * pTemp;
int nArgcNew;
int c, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
{
switch ( c )
{
case 'v':
fVerbose ^= 1;
break;
default:
goto usage;
}
}
pArgvNew = argv + globalUtilOptind;
nArgcNew = argc - globalUtilOptind;
if ( nArgcNew != 1 )
{
Abc_Print( -1, "There is no file name.\n" );
return 1;
}
// get the input file name
pFileName = pArgvNew[0];
// fix the wrong symbol
for ( pTemp = pFileName; *pTemp; pTemp++ )
if ( *pTemp == '>' )
*pTemp = '\\';
if ( (pFile = fopen( pFileName, "r" )) == NULL )
{
Abc_Print( -1, "Cannot open input file \"%s\". ", pFileName );
if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".v", ".blif", NULL, NULL, NULL )) )
Abc_Print( 1, "Did you mean \"%s\"?", pFileName );
Abc_Print( 1, "\n" );
return 1;
}
fclose( pFile );
// read hierarchical Verilog
pNtk = Io_ReadNetlist( pFileName, Io_ReadFileType(pFileName), 0 );
if ( pNtk == NULL )
{
Abc_Print( -1, "Reading hierarchical Verilog has failed.\n" );
return 1;
}
pAig = Abc_NtkFlattenHierarchyGia( pNtk, NULL, fVerbose );
Abc_NtkDelete( pNtk );
Abc_FrameUpdateGia( pAbc, pAig );
return 0;
usage:
Abc_Print( -2, "usage: &read_ver [-vh] <file>\n" );
Abc_Print( -2, "\t a specialized reader for hierarchical Verilog files\n" );
Abc_Print( -2, "\t-v : toggles additional verbose output [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
Abc_Print( -2, "\t<file> : the file name\n");
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9Get( Abc_Frame_t * pAbc, int argc, char ** argv )
{
extern Aig_Man_t * Abc_NtkToDarChoices( Abc_Ntk_t * pNtk );
......@@ -26101,6 +26181,87 @@ usage:
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
{
char * pFileSpec = NULL;
Abc_Ntk_t * pNtkSpec = NULL;
char * pFileName;
char ** pArgvNew;
int c, nArgcNew;
int fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "Svh" ) ) != EOF )
{
switch ( c )
{
case 'S':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-S\" should be followed by a file name.\n" );
goto usage;
}
pFileSpec = argv[globalUtilOptind];
globalUtilOptind++;
break;
case 'v':
fVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
pArgvNew = argv + globalUtilOptind;
nArgcNew = argc - globalUtilOptind;
if ( nArgcNew != 1 )
{
Abc_Print( -1, "Expecting output file name on the command line.\n" );
return 1;
}
pFileName = argv[globalUtilOptind];
if ( pAbc->pNtkCur == NULL )
{
Abc_Print( -1, "There is no mapped file to write.\n" );
return 1;
}
if ( pFileSpec == NULL )
{
Abc_Print( -1, "The specification file is not given.\n" );
return 1;
}
pNtkSpec = Io_ReadNetlist( pFileSpec, Io_ReadFileType(pFileSpec), 0 );
if ( pNtkSpec == NULL )
{
Abc_Print( -1, "Reading hierarchical Verilog for the specification has failed.\n" );
return 1;
}
Abc_NtkInsertHierarchyGia( pNtkSpec, pAbc->pNtkCur, fVerbose );
Io_WriteVerilog( pNtkSpec, pFileName );
Abc_NtkDelete( pNtkSpec );
return 0;
usage:
Abc_Print( -2, "usage: &write_ver [-S <file>] [-vh] <file>\n" );
Abc_Print( -2, "\t writes hierarchical Verilog after mapping\n" );
Abc_Print( -2, "\t-S file : file name for the original hierarchical design (required)\n" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
Abc_Print( -2, "\t<file> : the file name\n");
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_CommandAbc9Ps( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Gps_Par_t Pars, * pPars = &Pars;
src/base/io/io.c
......@@ -231,11 +231,10 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
}
if ( fReadGia )
{
extern Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk );
Abc_Ntk_t * pNtk = Io_ReadNetlist( pFileName, Io_ReadFileType(pFileName), fCheck );
if ( pNtk )
{
Gia_Man_t * pGia = Gia_ManFlattenLogicHierarchy( pNtk );
Gia_Man_t * pGia = Abc_NtkFlattenHierarchyGia( pNtk, NULL, 0 );
Abc_NtkDelete( pNtk );
if ( pGia == NULL )
{
......
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