Commit 53e7d1f9 by Alan Mishchenko

Adding switch 'scorr -f' to dump inductive invariant as an AIG.

parent 69416b7c
...@@ -5025,10 +5025,6 @@ SOURCE=.\src\aig\miniaig\ndr.h ...@@ -5025,10 +5025,6 @@ SOURCE=.\src\aig\miniaig\ndr.h
SOURCE=.\src\aig\uap\uap.h SOURCE=.\src\aig\uap\uap.h
# End Source File # End Source File
# Begin Source File
SOURCE=.\src\aig\uap\uapSat.c
# End Source File
# End Group # End Group
# End Group # End Group
# Begin Group "bool" # Begin Group "bool"
......
...@@ -126,7 +126,7 @@ extern Aig_Man_t * Saig_ManDupDual( Aig_Man_t * pAig, Vec_Int_t * vDcFlops ...@@ -126,7 +126,7 @@ extern Aig_Man_t * Saig_ManDupDual( Aig_Man_t * pAig, Vec_Int_t * vDcFlops
extern void Saig_ManBlockPo( Aig_Man_t * pAig, int nCycles ); extern void Saig_ManBlockPo( Aig_Man_t * pAig, int nCycles );
/*=== saigDup.c ==========================================================*/ /*=== saigDup.c ==========================================================*/
extern Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * p ); extern Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * p );
extern Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs ); extern Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs, int fAddOuts );
extern Aig_Man_t * Saig_ManDupAbstraction( Aig_Man_t * pAig, Vec_Int_t * vFlops ); extern Aig_Man_t * Saig_ManDupAbstraction( Aig_Man_t * pAig, Vec_Int_t * vFlops );
extern int Saig_ManVerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p ); extern int Saig_ManVerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p );
extern Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p ); extern Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p );
......
...@@ -88,7 +88,7 @@ Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * pAig ) ...@@ -88,7 +88,7 @@ Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * pAig )
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs ) Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs, int fAddOuts )
{ {
Aig_Man_t * pAigNew; Aig_Man_t * pAigNew;
Aig_Obj_t * pObj, * pObj2, * pMiter; Aig_Obj_t * pObj, * pObj2, * pMiter;
...@@ -120,9 +120,11 @@ Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs ) ...@@ -120,9 +120,11 @@ Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs )
Aig_ObjCreateCo( pAigNew, pMiter ); Aig_ObjCreateCo( pAigNew, pMiter );
} }
// transfer to register outputs // transfer to register outputs
if ( fAddOuts )
Saig_ManForEachLi( pAig, pObj, i ) Saig_ManForEachLi( pAig, pObj, i )
Aig_ObjCreateCo( pAigNew, Aig_ObjChild0Copy(pObj) ); Aig_ObjCreateCo( pAigNew, Aig_ObjChild0Copy(pObj) );
Aig_ManCleanup( pAigNew ); Aig_ManCleanup( pAigNew );
if ( fAddOuts )
Aig_ManSetRegNum( pAigNew, Aig_ManRegNum(pAig) ); Aig_ManSetRegNum( pAigNew, Aig_ManRegNum(pAig) );
return pAigNew; return pAigNew;
} }
......
...@@ -20581,7 +20581,7 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -20581,7 +20581,7 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv )
// set defaults // set defaults
Ssw_ManSetDefaultParams( pPars ); Ssw_ManSetDefaultParams( pPars );
Extra_UtilGetoptReset(); Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "PQFCLSIVMNcmplkofdseqvwh" ) ) != EOF ) while ( ( c = Extra_UtilGetopt( argc, argv, "PQFCLSIVMNcmplkodsefqvwh" ) ) != EOF )
{ {
switch ( c ) switch ( c )
{ {
...@@ -20713,9 +20713,9 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -20713,9 +20713,9 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'o': case 'o':
pPars->fOutputCorr ^= 1; pPars->fOutputCorr ^= 1;
break; break;
case 'f': // case 'f':
pPars->fSemiFormal ^= 1; // pPars->fSemiFormal ^= 1;
break; // break;
case 'd': case 'd':
pPars->fDynamic ^= 1; pPars->fDynamic ^= 1;
break; break;
...@@ -20725,6 +20725,9 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -20725,6 +20725,9 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'e': case 'e':
pPars->fEquivDump ^= 1; pPars->fEquivDump ^= 1;
break; break;
case 'f':
pPars->fEquivDump2 ^= 1;
break;
case 'q': case 'q':
pPars->fStopWhenGone ^= 1; pPars->fStopWhenGone ^= 1;
break; break;
...@@ -20787,6 +20790,11 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -20787,6 +20790,11 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv )
else else
Abc_Print( 0, "Performing constraint-based scorr without constraints.\n" ); Abc_Print( 0, "Performing constraint-based scorr without constraints.\n" );
} }
if ( pPars->fEquivDump && pPars->fEquivDump2 )
{
Abc_Print( 0, "Command line switches \'-e\' and \'-f\' cannot be used at the same time.\n" );
return 0;
}
// get the new network // get the new network
pNtkRes = Abc_NtkDarSeqSweep2( pNtk, pPars ); pNtkRes = Abc_NtkDarSeqSweep2( pNtk, pPars );
...@@ -20800,7 +20808,7 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv ) ...@@ -20800,7 +20808,7 @@ int Abc_CommandSeqSweep2( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0; return 0;
usage: usage:
Abc_Print( -2, "usage: scorr [-PQFCLSIVMN <num>] [-cmplkodseqvwh]\n" ); Abc_Print( -2, "usage: scorr [-PQFCLSIVMN <num>] [-cmplkodsefqvwh]\n" );
Abc_Print( -2, "\t performs sequential sweep using K-step induction\n" ); Abc_Print( -2, "\t performs sequential sweep using K-step induction\n" );
Abc_Print( -2, "\t-P num : max partition size (0 = no partitioning) [default = %d]\n", pPars->nPartSize ); Abc_Print( -2, "\t-P num : max partition size (0 = no partitioning) [default = %d]\n", pPars->nPartSize );
Abc_Print( -2, "\t-Q num : partition overlap (0 = no overlap) [default = %d]\n", pPars->nOverSize ); Abc_Print( -2, "\t-Q num : partition overlap (0 = no overlap) [default = %d]\n", pPars->nOverSize );
...@@ -20823,6 +20831,7 @@ usage: ...@@ -20823,6 +20831,7 @@ usage:
Abc_Print( -2, "\t-d : toggle dynamic addition of constraints [default = %s]\n", pPars->fDynamic? "yes": "no" ); Abc_Print( -2, "\t-d : toggle dynamic addition of constraints [default = %s]\n", pPars->fDynamic? "yes": "no" );
Abc_Print( -2, "\t-s : toggle local simulation in the cone of influence [default = %s]\n", pPars->fLocalSim? "yes": "no" ); Abc_Print( -2, "\t-s : toggle local simulation in the cone of influence [default = %s]\n", pPars->fLocalSim? "yes": "no" );
Abc_Print( -2, "\t-e : toggle dumping disproved internal equivalences [default = %s]\n", pPars->fEquivDump? "yes": "no" ); Abc_Print( -2, "\t-e : toggle dumping disproved internal equivalences [default = %s]\n", pPars->fEquivDump? "yes": "no" );
Abc_Print( -2, "\t-f : toggle dumping proved internal equivalences [default = %s]\n", pPars->fEquivDump2? "yes": "no" );
Abc_Print( -2, "\t-q : toggle quitting when PO is not a constant candidate [default = %s]\n", pPars->fStopWhenGone? "yes": "no" ); Abc_Print( -2, "\t-q : toggle quitting when PO is not a constant candidate [default = %s]\n", pPars->fStopWhenGone? "yes": "no" );
Abc_Print( -2, "\t-w : toggle printout of flop equivalences [default = %s]\n", pPars->fFlopVerbose? "yes": "no" ); Abc_Print( -2, "\t-w : toggle printout of flop equivalences [default = %s]\n", pPars->fFlopVerbose? "yes": "no" );
Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" ); Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" );
...@@ -70,6 +70,7 @@ struct Ssw_Pars_t_ ...@@ -70,6 +70,7 @@ struct Ssw_Pars_t_
int fVerbose; // verbose stats int fVerbose; // verbose stats
int fFlopVerbose; // verbose printout of redundant flops int fFlopVerbose; // verbose printout of redundant flops
int fEquivDump; // enables dumping equivalences int fEquivDump; // enables dumping equivalences
int fEquivDump2; // enables dumping equivalences
int fStopWhenGone; // stop when PO output is not a candidate constant int fStopWhenGone; // stop when PO output is not a candidate constant
// optimized latch correspondence // optimized latch correspondence
int fLatchCorrOpt; // perform register correspondence (optimized) int fLatchCorrOpt; // perform register correspondence (optimized)
......
...@@ -66,6 +66,7 @@ void Ssw_ManSetDefaultParams( Ssw_Pars_t * p ) ...@@ -66,6 +66,7 @@ void Ssw_ManSetDefaultParams( Ssw_Pars_t * p )
p->fLocalSim = 0; // local simulation p->fLocalSim = 0; // local simulation
p->fVerbose = 0; // verbose stats p->fVerbose = 0; // verbose stats
p->fEquivDump = 0; // enables dumping equivalences p->fEquivDump = 0; // enables dumping equivalences
p->fEquivDump2 = 0; // enables dumping equivalences
// latch correspondence // latch correspondence
p->fLatchCorrOpt = 0; // performs optimized register correspondence p->fLatchCorrOpt = 0; // performs optimized register correspondence
......
...@@ -220,9 +220,14 @@ p->timeMarkCones += Abc_Clock() - clk; ...@@ -220,9 +220,14 @@ p->timeMarkCones += Abc_Clock() - clk;
{ {
pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase ); pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
Ssw_ObjSetFrame( p, pObj, f, pObjFraig2 ); Ssw_ObjSetFrame( p, pObj, f, pObjFraig2 );
if ( p->pPars->fEquivDump2 && vPairs )
{
Vec_IntPush( vPairs, pObjRepr->Id );
Vec_IntPush( vPairs, pObj->Id );
}
return 0; return 0;
} }
if ( vPairs ) if ( p->pPars->fEquivDump && vPairs )
{ {
Vec_IntPush( vPairs, pObjRepr->Id ); Vec_IntPush( vPairs, pObjRepr->Id );
Vec_IntPush( vPairs, pObj->Id ); Vec_IntPush( vPairs, pObj->Id );
...@@ -334,7 +339,7 @@ p->timeBmc += Abc_Clock() - clk; ...@@ -334,7 +339,7 @@ p->timeBmc += Abc_Clock() - clk;
SeeAlso [] SeeAlso []
***********************************************************************/ ***********************************************************************/
void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num ) void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num, int fAddOuts )
{ {
FILE * pFile; FILE * pFile;
char pBuffer[16]; char pBuffer[16];
...@@ -347,7 +352,7 @@ void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num ) ...@@ -347,7 +352,7 @@ void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num )
return; return;
} }
fclose( pFile ); fclose( pFile );
pNew = Saig_ManCreateEquivMiter( p, vPairs ); pNew = Saig_ManCreateEquivMiter( p, vPairs, fAddOuts );
Ioa_WriteAiger( pNew, pBuffer, 0, 0 ); Ioa_WriteAiger( pNew, pBuffer, 0, 0 );
Aig_ManStop( pNew ); Aig_ManStop( pNew );
Abc_Print( 1, "AIG with %4d disproved equivs is dumped into file \"%s\".\n", Vec_IntSize(vPairs)/2, pBuffer ); Abc_Print( 1, "AIG with %4d disproved equivs is dumped into file \"%s\".\n", Vec_IntSize(vPairs)/2, pBuffer );
...@@ -372,7 +377,7 @@ int Ssw_ManSweep( Ssw_Man_t * p ) ...@@ -372,7 +377,7 @@ int Ssw_ManSweep( Ssw_Man_t * p )
Aig_Obj_t * pObj, * pObj2, * pObjNew; Aig_Obj_t * pObj, * pObj2, * pObjNew;
int nConstrPairs, i, f; int nConstrPairs, i, f;
abctime clk; abctime clk;
Vec_Int_t * vDisproved; Vec_Int_t * vObjPairs;
// perform speculative reduction // perform speculative reduction
clk = Abc_Clock(); clk = Abc_Clock();
...@@ -407,18 +412,18 @@ p->timeReduce += Abc_Clock() - clk; ...@@ -407,18 +412,18 @@ p->timeReduce += Abc_Clock() - clk;
Ssw_ClassesClearRefined( p->ppClasses ); Ssw_ClassesClearRefined( p->ppClasses );
if ( p->pPars->fVerbose ) if ( p->pPars->fVerbose )
pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) ); pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) );
vDisproved = p->pPars->fEquivDump? Vec_IntAlloc(1000) : NULL; vObjPairs = (p->pPars->fEquivDump || p->pPars->fEquivDump2)? Vec_IntAlloc(1000) : NULL;
Aig_ManForEachObj( p->pAig, pObj, i ) Aig_ManForEachObj( p->pAig, pObj, i )
{ {
if ( p->pPars->fVerbose ) if ( p->pPars->fVerbose )
Bar_ProgressUpdate( pProgress, i, NULL ); Bar_ProgressUpdate( pProgress, i, NULL );
if ( Saig_ObjIsLo(p->pAig, pObj) ) if ( Saig_ObjIsLo(p->pAig, pObj) )
p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, vDisproved ); p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, vObjPairs );
else if ( Aig_ObjIsNode(pObj) ) else if ( Aig_ObjIsNode(pObj) )
{ {
pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) ); pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
Ssw_ObjSetFrame( p, pObj, f, pObjNew ); Ssw_ObjSetFrame( p, pObj, f, pObjNew );
p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, vDisproved ); p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, vObjPairs );
} }
} }
if ( p->pPars->fVerbose ) if ( p->pPars->fVerbose )
...@@ -427,8 +432,10 @@ p->timeReduce += Abc_Clock() - clk; ...@@ -427,8 +432,10 @@ p->timeReduce += Abc_Clock() - clk;
// cleanup // cleanup
// Ssw_ClassesCheck( p->ppClasses ); // Ssw_ClassesCheck( p->ppClasses );
if ( p->pPars->fEquivDump ) if ( p->pPars->fEquivDump )
Ssw_ManDumpEquivMiter( p->pAig, vDisproved, Counter++ ); Ssw_ManDumpEquivMiter( p->pAig, vObjPairs, Counter++, 1 );
Vec_IntFreeP( &vDisproved ); if ( p->pPars->fEquivDump2 && !p->fRefined )
Ssw_ManDumpEquivMiter( p->pAig, vObjPairs, 0, 0 );
Vec_IntFreeP( &vObjPairs );
return p->fRefined; return p->fRefined;
} }
......
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