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abc
Commit 0f6eeaea by Alan Mishchenko
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Version abc50913

parent c065b2c5
Showing with 95 additions and 82 deletions
Makefile
......@@ -8,7 +8,7 @@ PROG := abc
MODULES := src/base/abc src/base/abci src/base/abcs src/base/cmd src/base/io src/base/main \
src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr src/bdd/parse src/bdd/reo \
src/map/fpga src/map/mapper src/map/mio src/map/super \
src/map/fpga src/map/pga src/map/mapper src/map/mio src/map/super \
src/misc/extra src/misc/mvc src/misc/st src/misc/util src/misc/vec \
src/opt/cut src/opt/dec src/opt/fxu src/opt/rwr src/opt/sim \
src/sat/asat src/sat/csat src/sat/msat src/sat/fraig
......@@ -59,6 +59,10 @@ tags:
$(PROG): $(OBJ)
$(LD) -o $@ $^ $(LIBS)
lib$(PROG).a: $(OBJ)
ar rv $@ $?
ranlib $@
docs:
doxygen doxygen.conf
abc.opt
No preview for this file type
abc.plg
......@@ -6,23 +6,23 @@
--------------------Configuration: abc - Win32 Debug--------------------
</h3>
<h3>Command Lines</h3>
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE4.tmp" with contents
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1DD5.tmp" with contents
[
/nologo /MLd /W3 /Gm /GX /ZI /Od /I "src\base\abc" /I "src\base\abci" /I "src\base\abcs" /I "src\base\cmd" /I "src\base\io" /I "src\base\main" /I "src\bdd\cudd" /I "src\bdd\epd" /I "src\bdd\mtr" /I "src\bdd\parse" /I "src\bdd\dsd" /I "src\bdd\reo" /I "src\sop\ft" /I "src\sat\asat" /I "src\sat\msat" /I "src\sat\fraig" /I "src\opt\cut" /I "src\opt\dec" /I "src\opt\fxu" /I "src\opt\rwr" /I "src\map\fpga" /I "src\map\pga" /I "src\map\mapper" /I "src\map\mapp" /I "src\map\mio" /I "src\map\super" /I "src\misc\extra" /I "src\misc\st" /I "src\misc\mvc" /I "src\misc\util" /I "src\misc\vec" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D "HAVE_ASSERT_H" /FR"Debug/" /Fp"Debug/abc.pch" /YX /Fo"Debug/" /Fd"Debug/" /FD /GZ /c
"C:\_projects\abc\src\base\abc\abcNetlist.c"
"C:\_projects\abc\src\base\abc\abcUtil.c"
"C:\_projects\abc\src\base\abci\abc.c"
"C:\_projects\abc\src\base\abci\abcPrint.c"
"C:\_projects\abc\src\base\abcs\abcSeq.c"
"C:\_projects\abc\src\base\abcs\abcUtils.c"
"C:\_projects\abc\src\base\abcs\abcShare.c"
"C:\_projects\abc\src\base\abcs\abcRetCore.c"
"C:\_projects\abc\src\base\abcs\abcRetDelay.c"
"C:\_projects\abc\src\base\abcs\abcRetImpl.c"
"C:\_projects\abc\src\base\abcs\abcRetUtil.c"
"C:\_projects\abc\src\base\abcs\abcRetCore.c"
"C:\_projects\abc\src\base\abcs\abcSeq.c"
"C:\_projects\abc\src\base\abcs\abcShare.c"
"C:\_projects\abc\src\base\abcs\abcUtils.c"
]
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE4.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE5.tmp" with contents
Creating command line "cl.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1DD5.tmp"
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1DD6.tmp" with contents
[
kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /incremental:yes /pdb:"Debug/abc.pdb" /debug /machine:I386 /out:"_TEST/abc.exe" /pdbtype:sept
.\Debug\abcAig.obj
......@@ -65,7 +65,12 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Debug\abcTiming.obj
.\Debug\abcUnreach.obj
.\Debug\abcVerify.obj
.\Debug\abcRetCore.obj
.\Debug\abcRetDelay.obj
.\Debug\abcRetImpl.obj
.\Debug\abcRetUtil.obj
.\Debug\abcSeq.obj
.\Debug\abcShare.obj
.\Debug\abcUtils.obj
.\Debug\cmd.obj
.\Debug\cmdAlias.obj
......@@ -320,28 +325,23 @@ kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32
.\Debug\mvcPrint.obj
.\Debug\mvcSort.obj
.\Debug\mvcUtils.obj
.\Debug\abcShare.obj
.\Debug\abcRetDelay.obj
.\Debug\abcRetImpl.obj
.\Debug\abcRetUtil.obj
.\Debug\abcRetCore.obj
]
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE5.tmp"
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1DD6.tmp"
<h3>Output Window</h3>
Compiling...
abcNetlist.c
abcUtil.c
abc.c
abcPrint.c
abcSeq.c
abcUtils.c
abcShare.c
abcRetCore.c
abcRetDelay.c
abcRetImpl.c
abcRetUtil.c
abcRetCore.c
abcSeq.c
abcShare.c
abcUtils.c
Linking...
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE6.tmp" with contents
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1DD8.tmp" with contents
[
/nologo /o"Debug/abc.bsc"
.\Debug\abcAig.sbr
......@@ -384,7 +384,12 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE6.tmp" with cont
.\Debug\abcTiming.sbr
.\Debug\abcUnreach.sbr
.\Debug\abcVerify.sbr
.\Debug\abcRetCore.sbr
.\Debug\abcRetDelay.sbr
.\Debug\abcRetImpl.sbr
.\Debug\abcRetUtil.sbr
.\Debug\abcSeq.sbr
.\Debug\abcShare.sbr
.\Debug\abcUtils.sbr
.\Debug\cmd.sbr
.\Debug\cmdAlias.sbr
......@@ -638,13 +643,8 @@ Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE6.tmp" with cont
.\Debug\mvcOpBool.sbr
.\Debug\mvcPrint.sbr
.\Debug\mvcSort.sbr
.\Debug\mvcUtils.sbr
.\Debug\abcShare.sbr
.\Debug\abcRetDelay.sbr
.\Debug\abcRetImpl.sbr
.\Debug\abcRetUtil.sbr
.\Debug\abcRetCore.sbr]
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1CE6.tmp"
.\Debug\mvcUtils.sbr]
Creating command line "bscmake.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP1DD8.tmp"
Creating browse info file...
<h3>Output Window</h3>
......
src/base/abc/abc.h
......@@ -43,12 +43,12 @@
// network types
typedef enum {
ABC_TYPE_NONE = 0, // 0: unknown
ABC_TYPE_NETLIST, // 1: network with PIs/POs, latches, nodes, and nets
ABC_TYPE_LOGIC, // 2: network with PIs/POs, latches, and nodes
ABC_TYPE_STRASH, // 3: structurally hashed AIG (two input AND gates with c-attributes on edges)
ABC_TYPE_SEQ, // 4: sequential AIG (two input AND gates with c- and latch-attributes on edges)
ABC_TYPE_OTHER // 5: unused
ABC_NTK_NONE = 0, // 0: unknown
ABC_NTK_NETLIST, // 1: network with PIs/POs, latches, nodes, and nets
ABC_NTK_LOGIC, // 2: network with PIs/POs, latches, and nodes
ABC_NTK_STRASH, // 3: structurally hashed AIG (two input AND gates with c-attributes on edges)
ABC_NTK_SEQ, // 4: sequential AIG (two input AND gates with c- and latch-attributes on edges)
ABC_NTK_OTHER // 5: unused
} Abc_NtkType_t;
// network functionality
......@@ -206,21 +206,21 @@ struct Abc_Ntk_t_
#define ABC_INFINITY (10000000)
// checking the network type
static inline bool Abc_NtkIsNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_TYPE_NETLIST; }
static inline bool Abc_NtkIsLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_TYPE_LOGIC; }
static inline bool Abc_NtkIsStrash( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_TYPE_STRASH; }
static inline bool Abc_NtkIsSeq( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_TYPE_SEQ; }
static inline bool Abc_NtkIsNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_NETLIST; }
static inline bool Abc_NtkIsLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_LOGIC; }
static inline bool Abc_NtkIsStrash( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_STRASH; }
static inline bool Abc_NtkIsSeq( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_SEQ; }
static inline bool Abc_NtkHasSop( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP; }
static inline bool Abc_NtkHasBdd( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BDD; }
static inline bool Abc_NtkHasAig( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_AIG; }
static inline bool Abc_NtkHasMapping( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP; }
static inline bool Abc_NtkIsSopNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_TYPE_NETLIST; }
static inline bool Abc_NtkIsMappedNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_TYPE_NETLIST; }
static inline bool Abc_NtkIsSopLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_TYPE_LOGIC ; }
static inline bool Abc_NtkIsBddLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BDD && pNtk->ntkType == ABC_TYPE_LOGIC ; }
static inline bool Abc_NtkIsMappedLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_TYPE_LOGIC ; }
static inline bool Abc_NtkIsSopNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_NTK_NETLIST; }
static inline bool Abc_NtkIsMappedNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_NTK_NETLIST; }
static inline bool Abc_NtkIsSopLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_NTK_LOGIC ; }
static inline bool Abc_NtkIsBddLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BDD && pNtk->ntkType == ABC_NTK_LOGIC ; }
static inline bool Abc_NtkIsMappedLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_NTK_LOGIC ; }
static inline bool Abc_NtkIsComb( Abc_Ntk_t * pNtk ) { return pNtk->nLatches == 0; }
// reading data members of the network
......
src/base/abc/abcAig.c
......@@ -160,12 +160,13 @@ Abc_Aig_t * Abc_AigDup( Abc_Aig_t * pMan, Abc_Aig_t * pManNew )
Abc_NtkForEachLatch( pMan->pNtkAig, pObj, i )
pObj->pCopy = Abc_NtkLatch( pManNew->pNtkAig, i );
// copy internal nodes
vNodes = Abc_AigDfs( pMan->pNtkAig, 1, 0 );
vNodes = Abc_AigDfs( pMan->pNtkAig, 0, 0 );
Vec_PtrForEachEntry( vNodes, pObj, i )
{
if ( !Abc_NodeIsAigAnd(pObj) )
continue;
pObj->pCopy = Abc_AigAnd( pManNew, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
// printf( "Old = %4d. New = %4d.\n", pObj->Id, pObj->pCopy->Id );
// transfer latch attributes
Abc_ObjSetFaninL0( pObj->pCopy, Abc_ObjFaninL0(pObj) );
Abc_ObjSetFaninL1( pObj->pCopy, Abc_ObjFaninL1(pObj) );
......@@ -183,7 +184,7 @@ Abc_Aig_t * Abc_AigDup( Abc_Aig_t * pMan, Abc_Aig_t * pManNew )
}
// get the number of nodes before and after
if ( Abc_NtkNodeNum(pMan->pNtkAig) != Abc_NtkNodeNum(pManNew->pNtkAig) )
printf( "Warning: Structural hashing reduced %d nodes (should not happen).\n",
printf( "Warning: Structural hashing during duplication reduced %d nodes (to fix later).\n",
Abc_NtkNodeNum(pMan->pNtkAig) - Abc_NtkNodeNum(pManNew->pNtkAig) );
return pManNew;
}
......
src/base/abc/abcFunc.c
......@@ -193,8 +193,8 @@ int Abc_NtkBddToSop( Abc_Ntk_t * pNtk )
Abc_Obj_t * pNode;
DdManager * dd = pNtk->pManFunc;
DdNode * bFunc;
int RetValue, i;
Vec_Str_t * vCube;
int i;
assert( Abc_NtkIsBddLogic(pNtk) );
Cudd_zddVarsFromBddVars( dd, 2 );
......@@ -211,17 +211,17 @@ int Abc_NtkBddToSop( Abc_Ntk_t * pNtk )
bFunc = pNode->pData;
pNode->pData = Abc_ConvertBddToSop( pNtk->pManFunc, dd, bFunc, bFunc, Abc_ObjFaninNum(pNode), vCube, -1 );
if ( pNode->pData == NULL )
{
Vec_StrFree( vCube );
Cudd_Quit( dd );
return 0;
}
Cudd_RecursiveDeref( dd, bFunc );
}
Vec_StrFree( vCube );
// check for remaining references in the package
RetValue = Cudd_CheckZeroRef( dd );
if ( RetValue > 0 )
printf( "\nThe number of referenced nodes = %d\n\n", RetValue );
// Cudd_PrintInfo( dd, stdout );
Cudd_Quit( dd );
Extra_StopManager( dd );
return 1;
}
......
src/base/abc/abcNetlist.c
......@@ -48,9 +48,9 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsNetlist(pNtk) );
// start the network
if ( !Abc_NtkHasMapping(pNtk) )
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_SOP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
else
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_MAP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_MAP );
// duplicate the nodes
Abc_NtkForEachNode( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj);
......@@ -159,9 +159,9 @@ Abc_Ntk_t * Abc_NtkLogicSopToNetlist( Abc_Ntk_t * pNtk )
// start the netlist by creating PI/PO/Latch objects
if ( Abc_NtkIsSopLogic(pNtk) )
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_NETLIST, ABC_FUNC_SOP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, ABC_FUNC_SOP );
else
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_NETLIST, ABC_FUNC_BDD );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, ABC_FUNC_BDD );
// create the CI nets and remember them in the new CI nodes
Abc_NtkForEachCi( pNtk, pObj, i )
{
......@@ -236,7 +236,7 @@ Abc_Ntk_t * Abc_NtkAigToLogicSop( Abc_Ntk_t * pNtk )
int i, k;
assert( Abc_NtkIsStrash(pNtk) );
// start the network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_SOP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
// create the constant node
Abc_NtkDupConst1( pNtk, pNtkNew );
// duplicate the nodes and create node functions
......@@ -313,7 +313,7 @@ Abc_Ntk_t * Abc_NtkAigToLogicSopBench( Abc_Ntk_t * pNtk )
if ( Abc_NtkGetChoiceNum(pNtk) )
printf( "Warning: Choice nodes are skipped.\n" );
// start the network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_SOP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
// create the constant node
Abc_NtkDupConst1( pNtk, pNtkNew );
// collect the nodes to be used (marks all nodes with current TravId)
......
src/base/abc/abcNtk.c
......@@ -210,7 +210,7 @@ Abc_Ntk_t * Abc_NtkStartRead( char * pName )
{
Abc_Ntk_t * pNtkNew;
// allocate the empty network
pNtkNew = Abc_NtkAlloc( ABC_TYPE_NETLIST, ABC_FUNC_SOP );
pNtkNew = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
// set the specs
pNtkNew->pName = util_strsav( pName );
pNtkNew->pSpec = util_strsav( pName );
......@@ -379,7 +379,7 @@ Abc_Ntk_t * Abc_NtkCreateCone( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots, Vec_Int_t *
// start the network
Abc_NtkCleanCopy( pNtk );
pNtkNew = Abc_NtkAlloc( ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
pNtkNew->pName = util_strsav(pNtk->pName);
// collect the nodes in the TFI of the output
......
src/base/abci/abcBalance.c
......@@ -49,7 +49,7 @@ Abc_Ntk_t * Abc_NtkBalance( Abc_Ntk_t * pNtk, bool fDuplicate )
Abc_Ntk_t * pNtkAig;
assert( Abc_NtkIsStrash(pNtk) );
// perform balancing
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
Abc_NtkBalancePerform( pNtk, pNtkAig, fDuplicate );
Abc_NtkFinalize( pNtk, pNtkAig );
// make sure everything is okay
......
src/base/abci/abcCollapse.c
......@@ -98,7 +98,7 @@ Abc_Ntk_t * Abc_NtkFromGlobalBdds( Abc_Ntk_t * pNtk )
DdManager * dd = pNtk->pManGlob;
int i;
// start the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
// make sure the new manager has the same number of inputs
Cudd_bddIthVar( pNtkNew->pManFunc, dd->size-1 );
// process the POs
......
src/base/abci/abcDsd.c
......@@ -126,7 +126,7 @@ Abc_Ntk_t * Abc_NtkDsdInternal( Abc_Ntk_t * pNtk, bool fVerbose, bool fPrint, bo
}
// start the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
// make sure the new manager has enough inputs
Cudd_bddIthVar( pNtkNew->pManFunc, dd->size-1 );
// put the results into the new network (save new CO drivers in old CO drivers)
......
src/base/abci/abcFpga.c
......@@ -194,7 +194,7 @@ Abc_Ntk_t * Abc_NtkFromFpga( Fpga_Man_t * pMan, Abc_Ntk_t * pNtk )
Abc_Obj_t * pNode, * pNodeNew;
int i, nDupGates;
// create the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
// make the mapper point to the new network
Fpga_CutsCleanSign( pMan );
Fpga_ManCleanData0( pMan );
......
src/base/abci/abcFraig.c
......@@ -148,7 +148,7 @@ Abc_Ntk_t * Abc_NtkFromFraig( Fraig_Man_t * pMan, Abc_Ntk_t * pNtk )
Abc_Obj_t * pNode, * pNodeNew;
int i;
// create the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
// make the mapper point to the new network
Abc_NtkForEachCi( pNtk, pNode, i )
Fraig_NodeSetData1( Fraig_ManReadIthVar(pMan, i), (Fraig_Node_t *)pNode->pCopy );
......@@ -260,7 +260,7 @@ Abc_Ntk_t * Abc_NtkFraigTrust( Abc_Ntk_t * pNtk )
}
// perform strashing
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
Abc_NtkFraigTrustOne( pNtk, pNtkNew );
Abc_NtkFinalize( pNtk, pNtkNew );
......
src/base/abci/abcMap.c
......@@ -222,7 +222,7 @@ Abc_Ntk_t * Abc_NtkFromMap( Map_Man_t * pMan, Abc_Ntk_t * pNtk )
int i, nDupGates;
// create the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_MAP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_MAP );
// make the mapper point to the new network
Map_ManCleanData( pMan );
Abc_NtkForEachCi( pNtk, pNode, i )
......
src/base/abci/abcMiter.c
......@@ -84,7 +84,7 @@ Abc_Ntk_t * Abc_NtkMiterInt( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fComb )
assert( Abc_NtkIsStrash(pNtk2) );
// start the new network
pNtkMiter = Abc_NtkAlloc( ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkMiter = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
sprintf( Buffer, "%s_%s_miter", pNtk1->pName, pNtk2->pName );
pNtkMiter->pName = util_strsav(Buffer);
......@@ -321,7 +321,7 @@ Abc_Ntk_t * Abc_NtkMiterForCofactors( Abc_Ntk_t * pNtk, int Out, int In1, int In
assert( In2 < Abc_NtkCiNum(pNtk) );
// start the new network
pNtkMiter = Abc_NtkAlloc( ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkMiter = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
sprintf( Buffer, "%s_miter", Abc_ObjName(Abc_NtkCo(pNtk, Out)) );
pNtkMiter->pName = util_strsav(Buffer);
......@@ -477,7 +477,7 @@ Abc_Ntk_t * Abc_NtkFrames( Abc_Ntk_t * pNtk, int nFrames, int fInitial )
assert( nFrames > 0 );
assert( Abc_NtkIsStrash(pNtk) );
// start the new network
pNtkFrames = Abc_NtkAlloc( ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkFrames = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
sprintf( Buffer, "%s_%d_frames", pNtk->pName, nFrames );
pNtkFrames->pName = util_strsav(Buffer);
// create new latches (or their initial values) and remember them in the new latches
......
src/base/abci/abcNtbdd.c
......@@ -78,7 +78,7 @@ Abc_Ntk_t * Abc_NtkDeriveFromBdd( DdManager * dd, DdNode * bFunc, char * pNamePo
return NULL;
// start the network
pNtk = Abc_NtkAlloc( ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_BDD );
pNtk->pName = util_strsav(pNamePo);
// make sure the new manager has enough inputs
Cudd_bddIthVar( pNtk->pManFunc, Vec_PtrSize(vNamesPi) );
......@@ -121,7 +121,7 @@ Abc_Ntk_t * Abc_NtkBddToMuxes( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkNew;
assert( Abc_NtkIsBddLogic(pNtk) );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_SOP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
Abc_NtkBddToMuxesPerform( pNtk, pNtkNew );
Abc_NtkFinalize( pNtk, pNtkNew );
// make sure everything is okay
......
src/base/abci/abcPga.c
......@@ -107,7 +107,7 @@ Abc_Ntk_t * Abc_NtkFromPga( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodeCuts )
Vec_Ptr_t * vLeaves, * vVisited;
int i, k, nDupGates;
// create the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
dd = pNtkNew->pManFunc;
// set the constant node
pNode = Abc_AigConst1(pNtk->pManFunc);
......
src/base/abci/abcRenode.c
......@@ -73,7 +73,7 @@ Abc_Ntk_t * Abc_NtkRenode( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax, int fCn
Abc_NtkRenodeSetBounds( pNtk, nThresh, nFaninMax );
// perform renoding for this boundary
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
Abc_NtkRenodeInt( pNtk, pNtkNew );
Abc_NtkFinalize( pNtk, pNtkNew );
......
src/base/abci/abcStrash.c
......@@ -61,7 +61,7 @@ Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup )
if ( Abc_NtkGetChoiceNum( pNtk ) )
printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
// perform strashing
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_TYPE_STRASH, ABC_FUNC_AIG );
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
Abc_NtkStrashPerform( pNtk, pNtkAig, fAllNodes );
Abc_NtkFinalize( pNtk, pNtkAig );
// print warning about self-feed latches
......
src/base/abci/abcUnreach.c
......@@ -282,7 +282,7 @@ Abc_Ntk_t * Abc_NtkConstructExdc( DdManager * dd, Abc_Ntk_t * pNtk, DdNode * bUn
int i;
// start the new network
pNtkNew = Abc_NtkAlloc( ABC_TYPE_LOGIC, ABC_FUNC_BDD );
pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_BDD );
// create PIs corresponding to LOs
Abc_NtkForEachLatch( pNtk, pNode, i )
pNode->pCopy = Abc_NtkCreatePi(pNtkNew);
......
src/base/abcs/abcRetImpl.c
......@@ -117,7 +117,7 @@ int Abc_NtkImplementRetimingBackward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves )
vValues = Vec_IntAlloc( 100 );
// create the network for the initial state computation
pNtkProb = Abc_NtkAlloc( ABC_TYPE_LOGIC, ABC_FUNC_SOP );
pNtkProb = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP );
// perform the backward moves and build the network
Vec_PtrForEachEntry( vMoves, pNode, i )
......
src/base/abcs/abcSeq.c
......@@ -79,7 +79,7 @@ Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 );
// start the network
pNtkNew = Abc_NtkAlloc( ABC_TYPE_SEQ, ABC_FUNC_AIG );
pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG );
// duplicate the name and the spec
pNtkNew->pName = util_strsav(pNtk->pName);
pNtkNew->pSpec = util_strsav(pNtk->pSpec);
......@@ -231,7 +231,7 @@ Abc_Ntk_t * Abc_NtkSeqToLogicSop( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsSeq(pNtk) );
// start the network without latches
nCutNodes = pNtk->vLats->nSize; pNtk->vLats->nSize = 0;
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_TYPE_LOGIC, ABC_FUNC_SOP );
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
pNtk->vLats->nSize = nCutNodes;
// create the constant node
Abc_NtkDupConst1( pNtk, pNtkNew );
......
src/base/abcs/module.make
SRC += src/base/abcs/abcRetime.c \
src/base/abcs/abcSeq.c
SRC += src/base/abcs/abcRetCore.c \
src/base/abcs/abcRetDelay.c \
src/base/abcs/abcRetImpl.c \
src/base/abcs/abcRetUtil.c \
src/base/abcs/abcSeq.c \
src/base/abcs/abcShare.c \
src/base/abcs/abcUtils.c
src/base/io/ioReadBench.c
......@@ -100,6 +100,7 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
if ( vTokens->nSize == 1 )
{
printf( "%s: Wrong input file format.\n", Extra_FileReaderGetFileName(p) );
Vec_StrFree( vString );
Abc_NtkDelete( pNtk );
return NULL;
}
......@@ -144,6 +145,7 @@ Abc_Ntk_t * Io_ReadBenchNetwork( Extra_FileReader_t * p )
else
{
printf( "Cannot determine gate type \"%s\" in line %d.\n", pType, Extra_FileReaderGetLineNumber(p, 0) );
Vec_StrFree( vString );
Abc_NtkDelete( pNtk );
return NULL;
}
......
src/base/io/ioReadBlif.c
......@@ -292,12 +292,12 @@ Abc_Ntk_t * Io_ReadBlifNetwork( Io_ReadBlif_t * p )
}
pModelName = vTokens->pArray[1];
// allocate the empty network
p->pNtk = Abc_NtkAlloc( ABC_TYPE_NETLIST, ABC_FUNC_SOP );
p->pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
p->pNtk->pName = util_strsav( pModelName );
p->pNtk->pSpec = util_strsav( p->pFileName );
}
else
p->pNtk = Abc_NtkAlloc( ABC_TYPE_NETLIST, ABC_FUNC_SOP );
p->pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
// read the inputs/outputs
pProgress = Extra_ProgressBarStart( stdout, Extra_FileReaderGetFileSize(p->pReader) );
......
src/base/io/ioReadPla.c
......@@ -229,6 +229,7 @@ Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p )
{
Abc_ObjRemoveFanins(pNode);
pNode->pData = Abc_SopRegister( pNtk->pManFunc, " 0\n" );
Vec_StrFree( ppSops[i] );
continue;
}
Vec_StrPush( ppSops[i], 0 );
......
src/base/io/ioReadVerilog.c
......@@ -271,7 +271,7 @@ Abc_Ntk_t * Io_ReadVerNetwork( Io_ReadVer_t * p )
pModelName = vTokens->pArray[1];
// allocate the empty network
pNtk = Abc_NtkAlloc( ABC_TYPE_NETLIST, ABC_FUNC_SOP );
pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
pNtk->pName = util_strsav( pModelName );
pNtk->pSpec = util_strsav( p->pFileName );
......
src/sat/csat/csat_apis.c
......@@ -72,7 +72,7 @@ CSAT_Manager CSAT_InitManager()
CSAT_Manager_t * mng;
mng = ALLOC( CSAT_Manager_t, 1 );
memset( mng, 0, sizeof(CSAT_Manager_t) );
mng->pNtk = Abc_NtkAlloc( ABC_TYPE_LOGIC, ABC_FUNC_SOP );
mng->pNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP );
mng->pNtk->pName = util_strsav("csat_network");
mng->tName2Node = stmm_init_table(strcmp, stmm_strhash);
mng->tNode2Name = stmm_init_table(stmm_ptrcmp, stmm_ptrhash);
......
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